summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/i440bx/Kconfig
blob: 9ac8d734fc9a8bef232c7decd595192b1e6e58ac (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
##
## This file is part of the coreboot project.
##
## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc.
##

config NORTHBRIDGE_INTEL_I440BX
	bool
	select HAVE_DEBUG_RAM_SETUP
	select LATE_CBMEM_INIT

config SDRAMPWR_4DIMM
	bool
	depends on NORTHBRIDGE_INTEL_I440BX
	default n
	help
	  This option affects how the SDRAMC register is programmed.
	  Memory clock signals will not be routed properly if this option
	  is set wrong.

	  If your board has 4 DIMM slots, you must use select this option, in
	  your Kconfig file of the board. On boards with 3 DIMM slots,
	  do _not_ select this option.