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##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config SOC_BROADCOM_CYGNUS
bool
default n
select ARCH_BOOTBLOCK_ARMV7
select ARCH_RAMSTAGE_ARMV7
select ARCH_ROMSTAGE_ARMV7
select ARCH_VERSTAGE_ARMV7
select BOOTBLOCK_CONSOLE
select EARLY_CONSOLE
select GENERIC_UDELAY
select HAVE_MONOTONIC_TIMER
select HAVE_UART_MEMORY_MAPPED
select HAVE_UART_SPECIAL
select HAS_PRECBMEM_TIMESTAMP_REGION
select RETURN_FROM_VERSTAGE
select GENERIC_GPIO_LIB
if SOC_BROADCOM_CYGNUS
config BOOTBLOCK_CPU_INIT
string
default "soc/broadcom/cygnus/bootblock.c"
config CONSOLE_SERIAL_UART_ADDRESS
hex
depends on DRIVERS_UART
default 0x18023000
config CYGNUS_DDR800
bool "DDR Speed at 800MHz"
default y
config CYGNUS_DDR_AUTO_SELF_REFRESH_ENABLE
bool "Enable DDR auto self-refresh"
default y
help
Warning: M0 expects that auto self-refresh is enabled. Modify
with caution.
config CYGNUS_SHMOO_REUSE_DDR_32BIT
bool "Indicate if DDR width is 32-bit"
default n
config CYGNUS_SDRAM_TEST_DDR
bool "Run a write-read test on DDR after initialization"
default n
config CYGNUS_PRINT_SHMOO_DEBUG
bool "Print debug info for shmoo"
default n
config CYGNUS_GPIO_TEST
bool "Run a test on gpio"
default n
endif
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