blob: 46714444a4e0e1c065b7fa6f1fdc31e75cf76553 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
|
#
# This file is part of the coreboot project.
#
# Copyright (C) 2014 Imagination Technologies
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; version 2 of
# the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
# MA 02110-1301 USA
#
config CPU_IMGTEC_PISTACHIO
select CPU_MIPS
select DYNAMIC_CBMEM
select GENERIC_UDELAY
select HAVE_MONOTONIC_TIMER
select HAVE_UART_MEMORY_MAPPED
select HAVE_UART_SPECIAL
select SPI_ATOMIC_SEQUENCING
bool
if CPU_IMGTEC_PISTACHIO
config BOOTBLOCK_CPU_INIT
string
default "soc/imgtec/pistachio/bootblock.c"
config CBFS_ROM_OFFSET
hex
default 0x8100
config CBFS_HEADER_ROM_OFFSET
# Effectively the maximum size of the bootblock
hex
default 0x8000
endif
|
