romstage « braswell « intel « soc « src - coreboot - Some coreboot project code with my work

summary refs log tree commit diff

path: root/src/soc/intel/braswell/romstage

Mode	Name	Size
-rw-r--r--	Makefile.inc	72	log plain
-rw-r--r--	early_spi.c	1927	log plain
-rw-r--r--	pmc.c	955	log plain
-rw-r--r--	romstage.c	8175	log plain