1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <delay.h>
#include <arch/io.h>
#include <broadwell/iobp.h>
#include <broadwell/rcba.h>
#define IOBP_RETRY 1000
static inline int iobp_poll(void)
{
unsigned try;
for (try = IOBP_RETRY; try > 0; try--) {
u16 status = RCBA16(IOBPS);
if ((status & IOBPS_READY) == 0)
return 1;
udelay(10);
}
printk(BIOS_ERR, "IOBP: timeout waiting for transaction to complete\n");
return 0;
}
u32 pch_iobp_read(u32 address)
{
u16 status;
if (!iobp_poll())
return 0;
/* Set the address */
RCBA32(IOBPIRI) = address;
/* READ OPCODE */
status = RCBA16(IOBPS);
status &= ~IOBPS_MASK;
status |= IOBPS_READ;
RCBA16(IOBPS) = status;
/* Undocumented magic */
RCBA16(IOBPU) = IOBPU_MAGIC;
/* Set ready bit */
status = RCBA16(IOBPS);
status |= IOBPS_READY;
RCBA16(IOBPS) = status;
if (!iobp_poll())
return 0;
/* Check for successful transaction */
status = RCBA16(IOBPS);
if (status & IOBPS_TX_MASK) {
printk(BIOS_ERR, "IOBP: read 0x%08x failed\n", address);
return 0;
}
/* Read IOBP data */
return RCBA32(IOBPD);
}
void pch_iobp_write(u32 address, u32 data)
{
u16 status;
if (!iobp_poll())
return;
/* Set the address */
RCBA32(IOBPIRI) = address;
/* WRITE OPCODE */
status = RCBA16(IOBPS);
status &= ~IOBPS_MASK;
status |= IOBPS_WRITE;
RCBA16(IOBPS) = status;
RCBA32(IOBPD) = data;
/* Undocumented magic */
RCBA16(IOBPU) = IOBPU_MAGIC;
/* Set ready bit */
status = RCBA16(IOBPS);
status |= IOBPS_READY;
RCBA16(IOBPS) = status;
if (!iobp_poll())
return;
/* Check for successful transaction */
status = RCBA16(IOBPS);
if (status & IOBPS_TX_MASK)
printk(BIOS_ERR, "IOBP: write 0x%08x failed\n", address);
}
void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue)
{
u32 data = pch_iobp_read(address);
/* Update the data */
data &= andvalue;
data |= orvalue;
pch_iobp_write(address, data);
}
void pch_iobp_exec(u32 addr, u16 op_code, u8 route_id, u32 *data, u8 *resp)
{
if (!data || !resp)
return;
*resp = -1;
if (!iobp_poll())
return;
/* RCBA2330[31:0] = Address */
RCBA32(IOBPIRI) = addr;
/* RCBA2338[15:8] = opcode */
RCBA16(IOBPS) = (RCBA16(IOBPS) & 0x00ff) | op_code;
/* RCBA233A[15:8] = 0xf0 RCBA233A[7:0] = Route ID */
RCBA16(IOBPU) = IOBPU_MAGIC | route_id;
RCBA32(IOBPD) = *data;
/* Set RCBA2338[0] to trigger IOBP transaction*/
RCBA16(IOBPS) = RCBA16(IOBPS) | 0x1;
if (!iobp_poll())
return;
*resp = (RCBA16(IOBPS) & IOBPS_TX_MASK) >> 1;
*data = RCBA32(IOBPD);
}
|
