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#define __SIMPLE_DEVICE__ 1
#include <device/pci_ops.h>
#include <soc/rcba.h>
#include <soc/iobp.h>
#include <soc/pci_devs.h>
#include "pch.h"
#include "usb.h"
static void finalize_ehci(void)
{
/*
if (pch_is_lp()) {
if (EHCI dev is disabled) {
RCBA32_OR(0x3a84, 5);
}
}
*/
pch_iobp_update(0xe5004001,0xffffffff,0xc0);
// if (EHCI1_DEV is disabled) {
//pci_or_config32(EHCI1_DEV, 0xdc, 0x28);
//} else {
pci_or_config32(PCH_DEV_EHCI, 0xdc, 0x27);
//}
pci_or_config32(PCH_DEV_EHCI, 0x78, 3);
/*
if (!pch_is_lp()) {
if (EHCI2_DEV is disabled) {
pci_or_config32(EHCI2_DEV, 0xdc, 0x28);
} else {
pci_or_config32(EHCI2_DEV, 0xdc, 0x27);
}
pci_or_config32(EHCI2_DEV, 0x78, 3);
}
*/
}
void finalize_usb(void)
{
finalize_ehci();
pch_iobp_update(0xe5004001,0xffffffff,0xc0);
uint32_t xhcc = pci_read_config32(PCH_DEV_XHCI, 0x40);
pci_write_config32(PCH_DEV_XHCI, 0x40, xhcc | 0x100);
/* D3IL1E | xHCIL1E | IIL1E >= 1024 bb_cclk */
pci_write_config8(PCH_DEV_XHCI, 0x42, ((xhcc >> 16) & 0x7f) | 0x36);
pci_or_config16(PCH_DEV_XHCI, 0x44, 0x288);
uint32_t orval;
if (!pch_is_lp()) {
orval = 0x40;
} else {
if (!is_wildcat_point_lp()) {
orval = 0x40000;
} else {
orval = 0x40040;
}
}
pci_or_config32(PCH_DEV_XHCI, 0xa0, orval);
if (!is_wildcat_point_lp()) {
if (!pch_is_lp()) {
orval = 0;
} else {
orval = 0x1800;
}
} else {
orval = xhcc;
}
pci_update_config32(PCH_DEV_XHCI, 0xa4, 0xffffdfff, orval);
}
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