blob: 753d8e0a7e66130336ba06451ef899b773b03aa4 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
|
config SOC_INTEL_COMMON_BLOCK_GPIO
bool
select HAVE_DEBUG_GPIO
help
Intel Processor common GPIO support
if SOC_INTEL_COMMON_BLOCK_GPIO
# Use to program Interrupt Polarity Control (IPCx) register
# Each bit represents IRQx Active High Polarity Disable configuration:
# when set to 1, the interrupt polarity associated with IRQx is inverted
# to appear as Active Low to IOAPIC and vice versa
config SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG
bool
default n
# Used to configure Pad Tolerance as 1.8V or 3.3V
config SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL
bool
default n
# Used to configure IOSSTATE and IOSTERM
config SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY
bool
default n
# Used to provide support for legacy macros
config SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS
bool
default n
# Indicate if multiple ACPI devices are used for each gpio community.
config SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES
bool
default n
# Indicate if SoC supports dual-routing of GPIOs (to different paths like SCI,
# NMI, SMI, IOAPIC). This is required to support IRQ and wake on the same pad.
config SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
bool
default n
endif
|
