blob: e652a369d8cc6cadecbb822d6960588b9f3ea0ed (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
|
/*
* This file is part of the coreboot project.
*
* Copyright 2017 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef SOC_INTEL_COMMON_BLOCK_SPI_H
#define SOC_INTEL_COMMON_BLOCK_SPI_H
/*
* SoC overrides
*
* All new SoC must implement below functionality.
*/
/* Function to convert input device function to bus number
* Input: Device Function number
* Output: -1 translate to Error, >=0 is bus number
*/
int spi_soc_devfn_to_bus(unsigned int devfn);
/* Function to convert input bus number to device function
* Input: Bus number
* Output: -1 translate to Error, >=0 is function number
*/
int spi_soc_bus_to_devfn(unsigned int bus);
#endif /* SOC_INTEL_COMMON_BLOCK_SPI_H */
|