index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
/
skylake
/
include
/
fsp20
/
soc
Mode
Name
Size
-rw-r--r--
ramstage.h
1141
log
plain
-rw-r--r--
romstage.h
1002
log
plain
