blob: ab251ce05f0306ede262d5c44fd6dad7058087f4 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2016 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <fsp/util.h>
#include <reset.h>
void chipset_handle_reset(enum fsp_status status)
{
switch(status) {
case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
hard_reset();
break;
default:
printk(BIOS_ERR, "unhandled reset type %x\n", status);
die("unknown reset type");
break;
}
}
|
