blob: 5aa9eb547bb86b1e64cc54bc4d36a99e6950e7a9 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2016 Marvell, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <stddef.h>
#include <stdint.h>
#include <stdlib.h>
#include <bootblock_common.h>
#include <console/console.h>
#include <timestamp.h>
#include <console/uart.h>
#include <soc/gic.h>
#include <soc/uart.h>
void bootblock_soc_early_init(void)
{
timestamp_add_now(TS_START_BOOTBLOCK);
asm volatile ("bl fiq_stack_init" : : : "r0", "r1");
enable_bcm_gic();
uart_num = 0;
}
void bootblock_soc_init(void)
{
/* initializing UART1 to free UART0 to be used by romstage */
uart_num = 1;
uart_init(uart_num);
while (1)
;
}
|
