summaryrefslogtreecommitdiff
path: root/src/soc/nvidia/tegra132/Kconfig
blob: 3396cc89a76fb881986ef6d68abff2737c2fba42 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
config SOC_NVIDIA_TEGRA132
	bool
	default n
	select ARCH_BOOTBLOCK_ARMV4
	select ARCH_VERSTAGE_ARMV4
	select ARCH_ROMSTAGE_ARMV4
	select ARCH_RAMSTAGE_ARMV8_64
	select ARM_LPAE
	select DYNAMIC_CBMEM
	select BOOTBLOCK_CONSOLE
	select HAVE_UART_SPECIAL
	select HAVE_UART_MEMORY_MAPPED
	select EARLY_CONSOLE
	select ARM_BOOTBLOCK_CUSTOM

if SOC_NVIDIA_TEGRA132

config BOOTBLOCK_CPU_INIT
	string
	default "soc/nvidia/tegra132/bootblock.c"
	help
	  CPU/SoC-specific bootblock code. This is useful if the
	  bootblock must load microcode or copy data from ROM before
	  searching for the bootblock.

config BOOTBLOCK_ROM_OFFSET
	hex
	default 0x0

config CBFS_HEADER_ROM_OFFSET
	hex "offset of master CBFS header in ROM"
	default 0x40000

config CBFS_ROM_OFFSET
	hex "offset of CBFS data in ROM"
	default 0x40080

config BOOTBLOCK_BASE
	hex
	default 0x40020000

config ROMSTAGE_BASE
	hex
	default 0x4002c000

config SYS_SDRAM_BASE
	hex
	default 0x80000000

config RAMSTAGE_BASE
	hex
	default 0x80200000

config BOOTBLOCK_STACK_TOP
	hex
	default 0x40020000

config BOOTBLOCK_STACK_BOTTOM
	hex
	default 0x4001c000

config ROMSTAGE_STACK_TOP
	hex
	default 0x40020000

config ROMSTAGE_STACK_BOTTOM
	hex
	default 0x4001c000

config RAMSTAGE_STACK_TOP
	hex
	default 0x80020000

config RAMSTAGE_STACK_BOTTOM
	hex
	default 0x8001c000

config CBFS_CACHE_ADDRESS
	hex "memory address to put CBFS cache data"
	default 0x40006000

config CBFS_CACHE_SIZE
	hex "size of CBFS cache data"
	default 0x00016000

config CONSOLE_PRERAM_BUFFER_BASE
	hex "memory address of the CBMEM console buffer"
	default 0x40004020

config MTS_DIRECTORY
	string "Directory where MTS microcode files are located"
	default "3rdparty/cpu/nvidia/tegra132/current/prod"
	help
	  Path to directory where MTS microcode files are located.

endif