blob: 19d523654643f70674c716e1778a62ed9012eb6e (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
|
config SOC_QC_IPQ806X
bool
default n
select ARCH_BOOTBLOCK_ARMV4
select ARCH_ROMSTAGE_ARMV7
select ARCH_RAMSTAGE_ARMV7
select ARM_LPAE
select BOOTBLOCK_CONSOLE
select DYNAMIC_CBMEM
select HAVE_UART_SPECIAL
select SPI_ATOMIC_SEQUENCING
if SOC_QC_IPQ806X
config BOOTBLOCK_ROM_OFFSET
hex
default 0x0
config CBFS_HEADER_ROM_OFFSET
hex "offset of master CBFS header in ROM"
default 0x228000
config CBFS_ROM_OFFSET
hex "offset of CBFS data in ROM"
default 0x228080
config MBN_ENCAPSULATION
depends on USE_BLOBS
bool "bootblock encapsulation for ipq8064"
default y
config SBL_BLOB
depends on USE_BLOBS
string "file name of the Qualcomm SBL blob"
default "3rdparty/cpu/qualcomm/ipq8064/sbls.bin"
help
The path and filename of the binary blob containing
ipq806x early initialization code, as supplied by the
vendor.
config BOOTBLOCK_BASE
hex "256K bytes left for TZBSP"
default 0x40600000
config ROMSTAGE_BASE
hex
default 0x40620000
config RAMSTAGE_BASE
hex
default 0x40640000
config SYS_SDRAM_BASE
hex
default 0x40000000
config STACK_TOP
hex
default 0x40600000
config STACK_BOTTOM
hex
default 0x405fc000
config CBFS_CACHE_ADDRESS
hex "memory address to put CBFS cache data"
default 0x405e6000
config CBFS_CACHE_SIZE
hex "size of CBFS cache data"
default 0x00016000
config TTB_BUFFER
hex "memory address for page tables"
default 0x405f0000
endif
|
