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config SOC_QC_IPQ806X
bool
default n
select ARCH_BOOTBLOCK_ARMV4
select ARCH_VERSTAGE_ARMV4
select ARCH_ROMSTAGE_ARMV7
select ARCH_RAMSTAGE_ARMV7
select ARM_LPAE
select BOOTBLOCK_CONSOLE
select DYNAMIC_CBMEM
select HAVE_UART_SPECIAL
select SPI_ATOMIC_SEQUENCING
if SOC_QC_IPQ806X
config CBFS_SIZE
hex "Size of CBFS filesystem in ROM"
default ROM_SIZE
help
CBFS size needs to match the size of memory allocated to the
coreboot blob elsewhere in the system. Make sure this config option
is fine tuned in the board config file.
config BOOTBLOCK_ROM_OFFSET
hex
default 0x0
config CBFS_HEADER_ROM_OFFSET
hex "offset of master CBFS header in ROM"
default 0x228000
config CBFS_ROM_OFFSET
hex "offset of CBFS data in ROM"
default 0x228080
config MBN_ENCAPSULATION
depends on USE_BLOBS
bool "bootblock encapsulation for ipq8064"
default y
config SBL_BLOB
depends on USE_BLOBS
string "file name of the Qualcomm SBL blob"
default "3rdparty/cpu/qualcomm/ipq8064/sbls.bin"
help
The path and filename of the binary blob containing
ipq806x early initialization code, as supplied by the
vendor.
endif
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