blob: 8f444e053af48b4f4c529add51af6a1c718e15b4 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
|
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/* Register map for Exynos5 sysreg */
#ifndef CPU_SAMSUNG_EXYNOS5250_SYSREG_H
#define CPU_SAMSUNG_EXYNOS5250_SYSREG_H
#include <soc/cpu.h>
/* sysreg map */
struct exynos5_sysreg {
/* Add registers as and when required */
unsigned char res1[0x214];
unsigned int disp1blk_cfg;
unsigned char res2[0x18];
unsigned int usb20_phy_cfg;
};
check_member(exynos5_sysreg, usb20_phy_cfg, 0x230);
static struct exynos5_sysreg * const exynos_sysreg =
(void *)EXYNOS5_SYSREG_BASE;
#define FIMDBYPASS_DISP1 (1 << 15)
#define USB20_PHY_CFG_EN (1 << 0)
#endif
|