1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
|
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* ACPI - create the Fixed ACPI Description Tables (FADT)
*/
#include <string.h>
#include <console/console.h>
#include <acpi/acpi.h>
#include <arch/io.h>
#include <device/device.h>
#include <version.h>
#include "SBPLATFORM.h"
#ifndef FADT_BOOT_ARCH
#if LEGACY_FREE
#define FADT_BOOT_ARCH ACPI_FADT_LEGACY_FREE
#else
#define FADT_BOOT_ARCH (ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042)
#endif
#endif
/*
* Reference section 5.2.9 Fixed ACPI Description Table (FADT)
* in the ACPI 3.0b specification.
*/
void acpi_fill_fadt(acpi_fadt_t *fadt)
{
u16 val = 0;
printk(BIOS_DEBUG, "ACPI_BLK_BASE: 0x%04x\n", ACPI_BLK_BASE);
fadt->preferred_pm_profile = PM_DESKTOP;
fadt->sci_int = 9; /* HUDSON 1 - IRQ 09 - ACPI SCI */
val = PM1_EVT_BLK_ADDRESS;
WritePMIO(SB_PMIOA_REG60, AccWidthUint16, &val);
val = PM1_CNT_BLK_ADDRESS;
WritePMIO(SB_PMIOA_REG62, AccWidthUint16, &val);
val = PM1_TMR_BLK_ADDRESS;
WritePMIO(SB_PMIOA_REG64, AccWidthUint16, &val);
val = GPE0_BLK_ADDRESS;
WritePMIO(SB_PMIOA_REG68, AccWidthUint16, &val);
/* CpuControl is in \_PR.CP00, 6 bytes */
val = CPU_CNT_BLK_ADDRESS;
WritePMIO(SB_PMIOA_REG66, AccWidthUint16, &val);
val = 0;
WritePMIO(SB_PMIOA_REG6A, AccWidthUint16, &val);
val = ACPI_PMA_CNT_BLK_ADDRESS;
WritePMIO(SB_PMIOA_REG6E, AccWidthUint16, &val);
/* AcpiDecodeEnable, When set, SB uses the contents of the
* PM registers at index 60-6B to decode ACPI I/O address.
* AcpiSmiEn & SmiCmdEn*/
val = BIT0 | BIT1 | BIT2 | BIT4;
WritePMIO(SB_PMIOA_REG74, AccWidthUint16, &val);
/* RTC_En_En, TMR_En_En, GBL_EN_EN */
outl(0x1, PM1_CNT_BLK_ADDRESS); /* set SCI_EN */
fadt->pm1a_evt_blk = PM1_EVT_BLK_ADDRESS;
fadt->pm1b_evt_blk = 0x0000;
fadt->pm1a_cnt_blk = PM1_CNT_BLK_ADDRESS;
fadt->pm1b_cnt_blk = 0x0000;
fadt->pm2_cnt_blk = ACPI_PMA_CNT_BLK_ADDRESS;
fadt->pm_tmr_blk = PM1_TMR_BLK_ADDRESS;
fadt->gpe0_blk = GPE0_BLK_ADDRESS;
fadt->gpe1_blk = 0; /* No gpe1 block in hudson1 */
fadt->pm1_evt_len = 4; /* 32 bits */
fadt->pm1_cnt_len = 2; /* 16 bits */
fadt->pm2_cnt_len = 1; /* 8 bits */
fadt->pm_tmr_len = 4; /* 32 bits */
fadt->gpe0_blk_len = 8; /* 64 bits */
fadt->gpe1_blk_len = 0;
fadt->gpe1_base = 0;
fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED;
fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;
fadt->flush_size = 0; /* set to 0 if WBINVD is 1 in flags */
fadt->flush_stride = 0; /* set to 0 if WBINVD is 1 in flags */
fadt->duty_offset = 1; /* CLK_VAL bits 3:1 */
fadt->duty_width = 3; /* CLK_VAL bits 3:1 */
fadt->day_alrm = 0; /* 0x7d these have to be */
fadt->mon_alrm = 0; /* 0x7e added to cmos.layout */
fadt->century = 0; /* 0x7f to make rtc alarm work */
fadt->iapc_boot_arch = FADT_BOOT_ARCH; /* See table 5-10 */
fadt->res2 = 0; /* reserved, MUST be 0 ACPI 3.0 */
fadt->flags = ACPI_FADT_WBINVD | /* See table 5-10 ACPI 3.0a spec */
ACPI_FADT_C1_SUPPORTED |
ACPI_FADT_SLEEP_BUTTON |
ACPI_FADT_S4_RTC_WAKE |
ACPI_FADT_32BIT_TIMER |
ACPI_FADT_RESET_REGISTER |
ACPI_FADT_PCI_EXPRESS_WAKE |
ACPI_FADT_S4_RTC_VALID |
ACPI_FADT_REMOTE_POWER_ON;
/* Format is from 5.2.3.1: Generic Address Structure */
/* reset_reg: see section 4.7.3.6 ACPI 3.0a spec */
/* 8 bit write of value 0x06 to 0xCF9 in IO space */
fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
fadt->reset_reg.bit_width = 8;
fadt->reset_reg.bit_offset = 0;
fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
fadt->reset_reg.addrl = 0xcf9;
fadt->reset_reg.addrh = 0x0;
fadt->reset_value = 6;
fadt->ARM_boot_arch = 0; /* MUST be 0 ACPI 3.0 */
fadt->FADT_MinorVersion = 0; /* MUST be 0 ACPI 3.0 */
fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
fadt->x_pm1a_evt_blk.bit_width = 32;
fadt->x_pm1a_evt_blk.bit_offset = 0;
fadt->x_pm1a_evt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS;
fadt->x_pm1a_evt_blk.addrl = PM1_EVT_BLK_ADDRESS;
fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
fadt->x_pm1b_evt_blk.bit_width = 0;
fadt->x_pm1b_evt_blk.bit_offset = 0;
fadt->x_pm1b_evt_blk.access_size = 0;
fadt->x_pm1b_evt_blk.addrl = 0x0;
fadt->x_pm1b_evt_blk.addrh = 0x0;
fadt->x_pm1a_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
fadt->x_pm1a_cnt_blk.bit_width = 16;
fadt->x_pm1a_cnt_blk.bit_offset = 0;
fadt->x_pm1a_cnt_blk.access_size = 0;
fadt->x_pm1a_cnt_blk.addrl = PM1_CNT_BLK_ADDRESS;
fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
fadt->x_pm1b_cnt_blk.bit_width = 0;
fadt->x_pm1b_cnt_blk.bit_offset = 0;
fadt->x_pm1b_cnt_blk.access_size = 0;
fadt->x_pm1b_cnt_blk.addrl = 0x0;
fadt->x_pm1b_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
fadt->x_pm2_cnt_blk.bit_width = 8; /* Hudson 1 Pm2Control is 8 bits */
fadt->x_pm2_cnt_blk.bit_offset = 0;
fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
fadt->x_pm2_cnt_blk.addrl = ACPI_PMA_CNT_BLK_ADDRESS;
fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO;
fadt->x_pm_tmr_blk.bit_width = 32;
fadt->x_pm_tmr_blk.bit_offset = 0;
fadt->x_pm_tmr_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
fadt->x_pm_tmr_blk.addrl = PM1_TMR_BLK_ADDRESS;
fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO;
fadt->x_gpe0_blk.bit_width = 64; /* EventStatus + Event Enable */
fadt->x_gpe0_blk.bit_offset = 0;
fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
fadt->x_gpe0_blk.addrl = GPE0_BLK_ADDRESS;
fadt->x_gpe0_blk.addrh = 0x0;
fadt->x_gpe1_blk.space_id = ACPI_ADDRESS_SPACE_IO;
fadt->x_gpe1_blk.bit_width = 0;
fadt->x_gpe1_blk.bit_offset = 0;
fadt->x_gpe1_blk.access_size = 0;
fadt->x_gpe1_blk.addrl = 0;
fadt->x_gpe1_blk.addrh = 0x0;
}
|