summaryrefslogtreecommitdiff
path: root/src/southbridge/via/vt8237r/vt8237r.c
blob: d392512f097a10da1294094fad1dc2ac08fdeecd (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
/*
 * This file is part of the coreboot project.
 *
 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 */

#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include "vt8237r.h"
#include "chip.h"

/*
 * Datasheet: http://www.via.com.tw/en/downloads/datasheets/chipsets/
 *		VT8237R_SouthBridge_Revision2.06_Lead-Free.zip
 */

#if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 7
void writeback(struct device *dev, u16 where, u8 what)
{
	u8 regval;

	pci_write_config8(dev, where, what);
	regval = pci_read_config8(dev, where);

	if (regval != what)
		printk(BIOS_DEBUG, "Writeback to %02x failed %02x\n",
			where, regval);
}
#else
void writeback(struct device *dev, u16 where, u8 what)
{
	pci_write_config8(dev, where, what);
}
#endif

void dump_south(device_t dev)
{
	int i, j;

	for (i = 0; i < 256; i += 16) {
		printk(BIOS_DEBUG, "%02x: ", i);
		for (j = 0; j < 16; j++)
			printk(BIOS_DEBUG, "%02x ", pci_read_config8(dev, i + j));
		printk(BIOS_DEBUG, "\n");
	}
}

static void vt8237r_enable(struct device *dev)
{
	u16 vid, did;
	struct southbridge_via_vt8237r_config *sb =
	    (struct southbridge_via_vt8237r_config *)dev->chip_info;

	if (dev->path.type == DEVICE_PATH_PCI) {
		vid = pci_read_config16(dev, PCI_VENDOR_ID);
		did = pci_read_config16(dev, PCI_DEVICE_ID);
		if (vid == PCI_VENDOR_ID_VIA &&
			(did == PCI_DEVICE_ID_VIA_VT8237R_LPC ||
			 did == PCI_DEVICE_ID_VIA_VT8237A_LPC ||
			 did == PCI_DEVICE_ID_VIA_VT8237S_LPC)) {
			pci_write_config8(dev, 0x50, sb->fn_ctrl_lo);
			pci_write_config8(dev, 0x51, sb->fn_ctrl_hi);
		}
	}

	/* TODO: If SATA is disabled, move IDE to fn0 to conform PCI specs. */
}

struct chip_operations southbridge_via_vt8237r_ops = {
	CHIP_NAME("VIA VT8237R Southbridge")
	.enable_dev = vt8237r_enable,
};