summaryrefslogtreecommitdiff
path: root/src/superio/winbond/w83627hf/superio.c
blob: 1fd1eb0bedfddb7a0dad2b66c715d2f073cddfb2 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
/* Copyright 2000  AG Electronics Ltd. */
/* Copyright 2003-2004 Linux Networx */
/* Copyright 2004 Tyan 
   By LYH change from PC87360 */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */

#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <console/console.h>
#include <string.h>
#include <bitops.h>
#include <uart8250.h>
#include <pc80/keyboard.h>
#include "chip.h"
#include "w83627hf.h"


void pnp_enter_ext_func_mode(device_t dev) {
        outb(0x87, dev->path.u.pnp.port);
        outb(0x87, dev->path.u.pnp.port);
}
void pnp_exit_ext_func_mode(device_t dev) {
        outb(0xaa, dev->path.u.pnp.port);
}

void pnp_write_hwm(unsigned long port_base, uint8_t reg, uint8_t value)
{
        outb(reg, port_base+5);
        outb(value, port_base+6);
}

uint8_t pnp_read_hwm(unsigned long port_base, uint8_t reg)
{
        outb(reg, port_base + 5);
        return inb(port_base + 6);
}       

static void enable_hwm_smbus(device_t dev) {
	uint8_t reg, value;
	reg = 0x2b;
	value = pnp_read_config(dev, reg);
	value &= 0x3f;
	pnp_write_config(dev, reg, value);
}

#if 0
static void dump_pnp_device(device_t dev)
{
        int i;
        print_debug("\r\n");

        for(i = 0; i <= 255; i++) {
                uint8_t reg, val;
                if ((i & 0x0f) == 0) {
                        print_debug_hex8(i);
                        print_debug_char(':');
                }
		reg = i;
		if(i!=0xaa) {
                	val = pnp_read_config(dev, reg);
		}
		else {
			val = 0xaa;
		}
                print_debug_char(' ');
                print_debug_hex8(val);
                if ((i & 0x0f) == 0x0f) {
                        print_debug("\r\n");
                }
        }
}
#endif

static void init_hwm(unsigned long base)
{
	uint8_t  reg, value;
	int i;

	unsigned  hwm_reg_values[] = {
//	       reg                mask             data
              0x40     ,       0xff    ,       0x81,  //  ; Start Hardware Monitoring for WIN627
              0x48     ,       0xaa    ,       0x2a,  //  ; Program SIO SMBus BAR to 54h>>1	
//              0x48     ,       0xc8    ,       0x48,  //  ; Program SIO SMBus BAR to 90h>>1
              0x4A     ,       0x21    ,       0x21,  //  ; Program T2 SMBus BAR to 92h>>1 &
                                                     //  ; Program T3 SMBus BAR to 94h>>1
              0x4E     ,       0x80    ,       0x00,  
              0x43     ,       0x00    ,       0xFF,
              0x44     ,       0x00    ,       0x3F,
              0x4C     ,       0xBF    ,       0x18,
              0x4D     ,       0xFF    ,       0x80   //  ; Turn Off Beep
                                                                            
	};

	for(i = 0; i<  sizeof(hwm_reg_values)/sizeof(hwm_reg_values[0]); i+=3 ) { 
		reg = hwm_reg_values[i];	
	 	value = pnp_read_hwm(base, reg);		
		value &= 0xff & hwm_reg_values[i+1];
		value |= 0xff & hwm_reg_values[i+2];
#if 0
		printk_debug("base = 0x%04x, reg = 0x%02x, value = 0x%02x\r\n", base,reg,value);
#endif
		pnp_write_hwm(base,reg, value);
	}
}


static void w83627hf_init(device_t dev)
{
	struct superio_winbond_w83627hf_config *conf;
	struct resource *res0, *res1;
	if (!dev->enabled) {
		return;
	}
	conf = dev->chip_info;
	switch(dev->path.u.pnp.device) {
	case W83627HF_SP1: 
		res0 = find_resource(dev, PNP_IDX_IO0);
		init_uart8250(res0->base, &conf->com1);
		break;
	case W83627HF_SP2:
		res0 = find_resource(dev, PNP_IDX_IO0);
		init_uart8250(res0->base, &conf->com2);
		break;
	case W83627HF_KBC:
		res0 = find_resource(dev, PNP_IDX_IO0);
		res1 = find_resource(dev, PNP_IDX_IO1);
		init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
		break;
        case W83627HF_HWM:
                res0 = find_resource(dev, PNP_IDX_IO0);
                init_hwm(res0->base);
                break;
	}
	
}

void w83627hf_pnp_set_resources(device_t dev)
{

	pnp_enter_ext_func_mode(dev);  

	pnp_set_resources(dev);

#if 0
        dump_pnp_device(dev);
#endif
                
        pnp_exit_ext_func_mode(dev);  
        
}       
        
void w83627hf_pnp_enable_resources(device_t dev)
{       
        pnp_enter_ext_func_mode(dev);  
	
	pnp_enable_resources(dev);               

        switch(dev->path.u.pnp.device) {
	case W83627HF_HWM:
		//set the pin 91,92 as I2C bus
		printk_debug("w83627hf hwm smbus enabled\r\n");
		enable_hwm_smbus(dev);
		break;
	}

#if 0  
        dump_pnp_device(dev);
#endif

        pnp_exit_ext_func_mode(dev);  

}

void w83627hf_pnp_enable(device_t dev)
{

        if (!dev->enabled) {
                pnp_enter_ext_func_mode(dev);   

                pnp_set_logical_device(dev);
                pnp_set_enable(dev, 0);

                pnp_exit_ext_func_mode(dev);  
        }
}

static struct device_operations ops = {
	.read_resources   = pnp_read_resources,
	.set_resources    = w83627hf_pnp_set_resources,
	.enable_resources = w83627hf_pnp_enable_resources,
	.enable           = w83627hf_pnp_enable,
	.init             = w83627hf_init,
};

static struct pnp_info pnp_dev_info[] = {
        { &ops, W83627HF_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
        { &ops, W83627HF_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
        { &ops, W83627HF_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
        { &ops, W83627HF_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
        // No 4 { 0,},
        { &ops, W83627HF_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
        { &ops, W83627HF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
        { &ops, W83627HF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} },
        { &ops, W83627HF_GPIO2,},
        { &ops, W83627HF_GPIO3,},
        { &ops, W83627HF_ACPI, PNP_IRQ0,  },
        { &ops, W83627HF_HWM,  PNP_IO0 | PNP_IRQ0, { 0xff8, 0 } },
};

static void enable_dev(struct device *dev)
{
	pnp_enable_devices(dev, &pnp_ops,
		sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
}

struct chip_operations superio_winbond_w83627hf_ops = {
	.name       = "Winbond w83627hf",
	.enable_dev = enable_dev,
};