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#
# Copyright (c) 2013 - 2014, Sage Electronic Engineering, LLC
# Copyright (C) 2016 Advanced Micro Devices, Inc.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#     * Redistributions of source code must retain the above copyright
#       notice, this list of conditions and the following disclaimer.
#     * Redistributions in binary form must reproduce the above copyright
#       notice, this list of conditions and the following disclaimer in the
#       documentation and/or other materials provided with the distribution.
#     * Neither the name of Advanced Micro Devices, Inc. nor the names of
#       its contributors may be used to endorse or promote products derived
#       from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
# DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#

if CPU_AMD_PI_00630F01 || CPU_AMD_PI_00730F01 || CPU_AMD_PI_00660F01 || SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4

config AGESA_BINARY_PI_VENDORCODE_PATH
	string "AGESA PI directory path"
	default "src/vendorcode/amd/pi/00630F01" if CPU_AMD_PI_00630F01
	default "src/vendorcode/amd/pi/00730F01" if CPU_AMD_PI_00730F01
	default "src/vendorcode/amd/pi/00670F00" if SOC_AMD_STONEYRIDGE_FP4
	default "src/vendorcode/amd/pi/00670F00" if SOC_AMD_STONEYRIDGE_FT4
	default "src/vendorcode/amd/pi/00660F01" if CPU_AMD_PI_00660F01
	help
	  Specify where to find the AGESA header files
	  for AMD platform initialization.

config AGESA_BINARY_PI_FILE
	string "AGESA PI binary file name"
	default "3rdparty/blobs/pi/amd/00630F01/FP3/AGESA.bin" if CPU_AMD_PI_00630F01
	default "3rdparty/blobs/pi/amd/00730F01/FT3b/AGESA.bin" if CPU_AMD_PI_00730F01
	default "3rdparty/blobs/pi/amd/00670F00/FP4/AGESA.bin" if SOC_AMD_STONEYRIDGE_FP4
	default "3rdparty/blobs/pi/amd/00670F00/FT4/AGESA.bin" if SOC_AMD_STONEYRIDGE_FT4
	default "3rdparty/blobs/pi/amd/00660F01/FP4/AGESA.bin" if CPU_AMD_PI_00660F01
	help
	  Specify the binary file to use for AMD platform initialization.

config AGESA_BINARY_PI_AS_STAGE
	bool "AGESA Binary PI is added as stage to CBFS."
	depends on SOC_AMD_STONEYRIDGE_FT4 || SOC_AMD_STONEYRIDGE_FP4
	help
	  AGESA will be added as a stage utilizing --xip cbfstool options
	  as needed relocating the image to the proper location in memory-mapped
	  cpu address space. It's required that the file be in ELF format
	  containing the relocations necessary for relocating at runtime.

config AGESA_SPLIT_MEMORY_FILES
	bool "Split AGESA Binary PI into pre- and post-memory files."
	depends on AGESA_BINARY_PI_AS_STAGE
	default n
	help
	  Specifies that AGESA is split into two binaries for pre- and
	  post-memory.

config AGESA_PRE_MEMORY_BINARY_PI_FILE
	string
	depends on AGESA_SPLIT_MEMORY_FILES
	default "3rdparty/blobs/pi/amd/00670F00/FT4/AGESA_premem.elf" if SOC_AMD_STONEYRIDGE_FT4
	help
	  Specify the binary file to use for pre-memory AMD platform
	  initialization.

config AGESA_POST_MEMORY_BINARY_PI_FILE
	string
	depends on AGESA_SPLIT_MEMORY_FILES
	default "3rdparty/blobs/pi/amd/00670F00/FT4/AGESA_postmem.elf" if SOC_AMD_STONEYRIDGE_FT4
	help
	  Specify the binary file to use for post-memory AMD platform
	  initialization.

config AGESA_CBFS_NAME
	string
	default "AGESA"

config AGESA_PRE_MEMORY_CBFS_NAME
	string
	default "AGESA_PRE_MEM"

config AGESA_POST_MEMORY_CBFS_NAME
	string
	default "AGESA_POST_MEM"

config AGESA_BINARY_PI_LOCATION
	hex "AGESA PI binary address in ROM"
	default 0xFFE00000
	depends on !AGESA_BINARY_PI_AS_STAGE
	help
	  Specify the ROM address at which to store the binary Platform
	  Initialization code.

endif