1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
|
/*
* inteltool - dump all registers on an Intel CPU + chipset based system.
*
* Copyright (C) 2008 by coresystems GmbH
* written by Stefan Reinauer <stepan@coresystems.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <stdio.h>
#include <stdlib.h>
#include "inteltool.h"
int print_rcba(struct pci_dev *sb)
{
int i, size = 0x4000;
volatile uint8_t *rcba;
uint32_t rcba_phys;
printf("\n============= RCBA ==============\n\n");
switch (sb->device_id) {
case PCI_DEVICE_ID_INTEL_ICH6:
case PCI_DEVICE_ID_INTEL_ICH7:
case PCI_DEVICE_ID_INTEL_ICH7M:
case PCI_DEVICE_ID_INTEL_ICH7DH:
case PCI_DEVICE_ID_INTEL_ICH7MDH:
case PCI_DEVICE_ID_INTEL_ICH8:
case PCI_DEVICE_ID_INTEL_ICH8M:
case PCI_DEVICE_ID_INTEL_ICH8ME:
case PCI_DEVICE_ID_INTEL_ICH9DH:
case PCI_DEVICE_ID_INTEL_ICH9DO:
case PCI_DEVICE_ID_INTEL_ICH9R:
case PCI_DEVICE_ID_INTEL_ICH9:
case PCI_DEVICE_ID_INTEL_ICH9M:
case PCI_DEVICE_ID_INTEL_ICH9ME:
case PCI_DEVICE_ID_INTEL_ICH10:
case PCI_DEVICE_ID_INTEL_ICH10R:
case PCI_DEVICE_ID_INTEL_NM10:
case PCI_DEVICE_ID_INTEL_I63XX:
case PCI_DEVICE_ID_INTEL_3400:
case PCI_DEVICE_ID_INTEL_3420:
case PCI_DEVICE_ID_INTEL_3450:
case PCI_DEVICE_ID_INTEL_3400_DESKTOP:
case PCI_DEVICE_ID_INTEL_3400_MOBILE:
case PCI_DEVICE_ID_INTEL_3400_MOBILE_SFF:
case PCI_DEVICE_ID_INTEL_B55_A:
case PCI_DEVICE_ID_INTEL_B55_B:
case PCI_DEVICE_ID_INTEL_H55:
case PCI_DEVICE_ID_INTEL_H57:
case PCI_DEVICE_ID_INTEL_HM55:
case PCI_DEVICE_ID_INTEL_HM57:
case PCI_DEVICE_ID_INTEL_P55:
case PCI_DEVICE_ID_INTEL_PM55:
case PCI_DEVICE_ID_INTEL_Q57:
case PCI_DEVICE_ID_INTEL_QM57:
case PCI_DEVICE_ID_INTEL_QS57:
case PCI_DEVICE_ID_INTEL_Z68:
case PCI_DEVICE_ID_INTEL_P67:
case PCI_DEVICE_ID_INTEL_UM67:
case PCI_DEVICE_ID_INTEL_HM65:
case PCI_DEVICE_ID_INTEL_H67:
case PCI_DEVICE_ID_INTEL_HM67:
case PCI_DEVICE_ID_INTEL_Q65:
case PCI_DEVICE_ID_INTEL_QS67:
case PCI_DEVICE_ID_INTEL_Q67:
case PCI_DEVICE_ID_INTEL_QM67:
case PCI_DEVICE_ID_INTEL_B65:
case PCI_DEVICE_ID_INTEL_C202:
case PCI_DEVICE_ID_INTEL_C204:
case PCI_DEVICE_ID_INTEL_C206:
case PCI_DEVICE_ID_INTEL_H61:
case PCI_DEVICE_ID_INTEL_Z77:
case PCI_DEVICE_ID_INTEL_Z75:
case PCI_DEVICE_ID_INTEL_Q77:
case PCI_DEVICE_ID_INTEL_Q75:
case PCI_DEVICE_ID_INTEL_B75:
case PCI_DEVICE_ID_INTEL_H77:
case PCI_DEVICE_ID_INTEL_C216:
case PCI_DEVICE_ID_INTEL_QM77:
case PCI_DEVICE_ID_INTEL_QS77:
case PCI_DEVICE_ID_INTEL_HM77:
case PCI_DEVICE_ID_INTEL_UM77:
case PCI_DEVICE_ID_INTEL_HM76:
case PCI_DEVICE_ID_INTEL_HM75:
case PCI_DEVICE_ID_INTEL_HM70:
case PCI_DEVICE_ID_INTEL_NM70:
case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL:
case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM:
case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE:
case PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_PREM:
case PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP:
case PCI_DEVICE_ID_INTEL_C8_MOBILE:
case PCI_DEVICE_ID_INTEL_C8_DESKTOP:
case PCI_DEVICE_ID_INTEL_Z87:
case PCI_DEVICE_ID_INTEL_Z85:
case PCI_DEVICE_ID_INTEL_HM86:
case PCI_DEVICE_ID_INTEL_H87:
case PCI_DEVICE_ID_INTEL_HM87:
case PCI_DEVICE_ID_INTEL_Q85:
case PCI_DEVICE_ID_INTEL_Q87:
case PCI_DEVICE_ID_INTEL_QM87:
case PCI_DEVICE_ID_INTEL_B85:
case PCI_DEVICE_ID_INTEL_C222:
case PCI_DEVICE_ID_INTEL_C224:
case PCI_DEVICE_ID_INTEL_C226:
case PCI_DEVICE_ID_INTEL_H81:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_PRE:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_SKL:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_SKL:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_SKL:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_KBL:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_KBL:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_KBL:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_BASE:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_PREM:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_IHDCP_PREM:
rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe;
break;
case PCI_DEVICE_ID_INTEL_ICH:
case PCI_DEVICE_ID_INTEL_ICH0:
case PCI_DEVICE_ID_INTEL_ICH2:
case PCI_DEVICE_ID_INTEL_ICH4:
case PCI_DEVICE_ID_INTEL_ICH4M:
case PCI_DEVICE_ID_INTEL_ICH5:
printf("This southbridge does not have RCBA.\n");
return 1;
default:
printf("Error: Dumping RCBA on this southbridge is not (yet) supported.\n");
return 1;
}
rcba = map_physical(rcba_phys, size);
if (rcba == NULL) {
perror("Error mapping RCBA");
exit(1);
}
printf("RCBA = 0x%08x (MEM)\n\n", rcba_phys);
for (i = 0; i < size; i += 4) {
if (*(uint32_t *)(rcba + i))
printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(rcba + i));
}
u32 pch_iobp_read(volatile uint8_t *rcba, u32 address);
/* read usb iobp */
for (i = 0; i < 14; i++) {
u32 address = (0xe50041 + i) << 8;
u32 v = pch_iobp_read(rcba, address);
printf("iobp 0x%x: 0x%x (f4 = %d, txamp = %d)\n",
address, v, (v >> 8) & 7, (v >> 11) & 7);
}
unmap_physical((void *)rcba, size);
return 0;
}
#define RCBA8(x) (*((volatile u8 *)(rcba + x)))
#define RCBA16(x) (*((volatile u16 *)(rcba + x)))
#define RCBA32(x) (*((volatile u32 *)(rcba + x)))
#define RCBA64(x) (*((volatile u64 *)(rcba + x)))
/* IO Buffer Programming */
#define IOBPIRI 0x2330
#define IOBPD 0x2334
#define IOBPS 0x2338
#define IOBPS_READY 0x0001
#define IOBPS_TX_MASK 0x0006
#define IOBPS_MASK 0xff00
#define IOBPS_READ 0x0600
#define IOBPS_WRITE 0x0700
#define IOBPU 0x233a
#define IOBPU_MAGIC 0xf000
#define IOBP_RETRY 1000
static inline int iobp_poll(volatile uint8_t *rcba)
{
unsigned try;
for (try = IOBP_RETRY; try > 0; try--) {
u16 status = RCBA16(IOBPS);
if ((status & IOBPS_READY) == 0)
return 1;
// udelay(10);
}
printf("IOBP: timeout waiting for transaction to complete\n");
return 0;
}
u32 pch_iobp_read(volatile uint8_t *rcba, u32 address)
{
u16 status;
if (!iobp_poll(rcba))
return 0;
/* Set the address */
RCBA32(IOBPIRI) = address;
/* READ OPCODE */
status = RCBA16(IOBPS);
status &= ~IOBPS_MASK;
status |= IOBPS_READ;
RCBA16(IOBPS) = status;
/* Undocumented magic */
RCBA16(IOBPU) = IOBPU_MAGIC;
/* Set ready bit */
status = RCBA16(IOBPS);
status |= IOBPS_READY;
RCBA16(IOBPS) = status;
if (!iobp_poll(rcba))
return 0;
/* Check for successful transaction */
status = RCBA16(IOBPS);
if (status & IOBPS_TX_MASK) {
printf("IOBP: read 0x%08x failed\n", address);
return 0;
}
/* Read IOBP data */
return RCBA32(IOBPD);
}
|
