diff options
| author | Michael Kinney <michael.d.kinney@intel.com> | 2016-03-08 14:54:30 -0800 |
|---|---|---|
| committer | Michael Kinney <michael.d.kinney@intel.com> | 2016-03-13 12:00:36 -0700 |
| commit | 195c94360f726702b4a9a2290f02db2cd547d903 (patch) | |
| tree | 7eba06de161613bca1536ee78c3c613bcc4b77d5 | |
| parent | a1e8e34d745cbf770db002e0596e714bd64e6056 (diff) | |
| download | edk2-platforms-195c94360f726702b4a9a2290f02db2cd547d903.tar.xz | |
UefiCpuPkg/Include: Add top level MSR include file
Add top level MSR include file that includes the Architecural MSR
include file and all family specific MSR files from the Msr
subdirectory
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR).
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
| -rw-r--r-- | UefiCpuPkg/Include/Register/Msr.h | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/UefiCpuPkg/Include/Register/Msr.h b/UefiCpuPkg/Include/Register/Msr.h new file mode 100644 index 0000000000..ffa6d4416a --- /dev/null +++ b/UefiCpuPkg/Include/Register/Msr.h @@ -0,0 +1,48 @@ +/** @file
+ MSR Definitions.
+
+ Provides defines for Machine Specific Registers(MSR) indexes. Data structures
+ are provided for MSRs that contain one or more bit fields. If the MSR value
+ returned is a single 32-bit or 64-bit value, then a data structure is not
+ provided for that MSR.
+
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Specification Reference:
+ Intel(R) 64 and IA-32 Architectures Software Developer's Manual, Volume 3,
+ December 2015, Chapter 35 Model-Specific-Registers (MSR), Chapter 35.
+
+**/
+
+#ifndef __MSR_H__
+#define __MSR_H__
+
+#include <Register/ArchitecturalMsr.h>
+#include <Register/Msr/Core2Msr.h>
+#include <Register/Msr/AtomMsr.h>
+#include <Register/Msr/SilvermontMsr.h>
+#include <Register/Msr/NehalemMsr.h>
+#include <Register/Msr/Xeon5600Msr.h>
+#include <Register/Msr/XeonE7Msr.h>
+#include <Register/Msr/SandyBridgeMsr.h>
+#include <Register/Msr/IvyBridgeMsr.h>
+#include <Register/Msr/HaswellMsr.h>
+#include <Register/Msr/HaswellEMsr.h>
+#include <Register/Msr/BroadwellMsr.h>
+#include <Register/Msr/XeonDMsr.h>
+#include <Register/Msr/SkylakeMsr.h>
+#include <Register/Msr/XeonPhiMsr.h>
+#include <Register/Msr/Pentium4Msr.h>
+#include <Register/Msr/CoreMsr.h>
+#include <Register/Msr/PentiumMMsr.h>
+#include <Register/Msr/P6Msr.h>
+#include <Register/Msr/PentiumMsr.h>
+
+#endif
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