diff options
| author | jyao1 <jyao1> | 2014-08-04 08:24:27 +0000 |
|---|---|---|
| committer | jyao1 <jyao1@6f19259b-4bc3-4df7-8a09-765794883524> | 2014-08-04 08:24:27 +0000 |
| commit | 4a00645100049d31dd8937b0ada6db40e56fe2c6 (patch) | |
| tree | 4be352c317823ca58116aa31827d709258f876ba | |
| parent | a0e0fb6d9fa37f430c483c04e6333e3c32308a56 (diff) | |
| download | edk2-platforms-4a00645100049d31dd8937b0ada6db40e56fe2c6.tar.xz | |
Clean up code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed off by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15744 6f19259b-4bc3-4df7-8a09-765794883524
| -rw-r--r-- | IntelFspPkg/FspSecCore/FspSecCore.inf | 3 | ||||
| -rw-r--r-- | IntelFspWrapperPkg/IntelFspWrapperPkg.dec | 4 |
2 files changed, 2 insertions, 5 deletions
diff --git a/IntelFspPkg/FspSecCore/FspSecCore.inf b/IntelFspPkg/FspSecCore/FspSecCore.inf index d3ec2fc64f..18c5e76a6b 100644 --- a/IntelFspPkg/FspSecCore/FspSecCore.inf +++ b/IntelFspPkg/FspSecCore/FspSecCore.inf @@ -44,9 +44,6 @@ [Binaries.Ia32]
RAW|Vtf0/Bin/ResetVec.ia32.raw |GCC
-[Binaries.X64]
- RAW|Vtf0/Bin/ResetVec.x64.raw |GCC
-
[Packages]
MdePkg/MdePkg.dec
IntelFspPkg/IntelFspPkg.dec
diff --git a/IntelFspWrapperPkg/IntelFspWrapperPkg.dec b/IntelFspWrapperPkg/IntelFspWrapperPkg.dec index 0fea5f2269..1422e568e8 100644 --- a/IntelFspWrapperPkg/IntelFspWrapperPkg.dec +++ b/IntelFspWrapperPkg/IntelFspWrapperPkg.dec @@ -37,8 +37,8 @@ gFspNonVolatileStorageHobGuid = { 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0 } }
[Ppis]
- gFspInitDonePpiGuid = { 0xf5ef05e4, 0xd538, 0x4774, 0x8f, 0x1b, 0xe9, 0x77, 0x30, 0x11, 0xe0, 0x38 }
- gTopOfTemporaryRamPpiGuid = { 0x2f3962b2, 0x57c5, 0x44ec, 0x9e, 0xfc, 0xa6, 0x9f, 0xd3, 0x02, 0x03, 0x2b }
+ gFspInitDonePpiGuid = { 0xf5ef05e4, 0xd538, 0x4774, { 0x8f, 0x1b, 0xe9, 0x77, 0x30, 0x11, 0xe0, 0x38 } }
+ gTopOfTemporaryRamPpiGuid = { 0x2f3962b2, 0x57c5, 0x44ec, { 0x9e, 0xfc, 0xa6, 0x9f, 0xd3, 0x02, 0x03, 0x2b } }
[Protocols]
|