Minnowboard3 Next Pre-production.

Add code for Minnowboard3 Next pre-production board.
Build Command: BuildBios /vs13 /MX /A Broxton Release.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>

22 files changed, 121 insertions, 46 deletions

diff --git a/BuildBIOS.bat b/BuildBIOS.bat
index 7b2394f3bd..2cec70f7ca 100644
--- a/BuildBIOS.bat
+++ b/BuildBIOS.bat
@@ -56,7 +56,8 @@ echo        /x64   Set Arch to X64  (default: X64)
 echo        /IA32  Set Arch to IA32 (default: X64)

 echo        /A     Set FabId to A (default:  FAB_B)

 echo        /B     Set FabId to B (default:  FAB_B)

-echo        /MN    Minnow3 Board (default: MN)

+echo        /MN    MinnowBoard 3(default: MN)

+echo        /MX    MinnowBoard 3 Next

 echo        /BG    Benson Glacier Board

 echo        PlatformName:  Broxton

 echo        BuildTargets:  Release, Debug

diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Next/BoardInitPreMem/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Next/BoardInitPreMem/BoardInit.c
index 7df8fd1c05..a3a0cd857d 100644
--- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Next/BoardInitPreMem/BoardInit.c
+++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Next/BoardInitPreMem/BoardInit.c
@@ -68,7 +68,6 @@ MinnowBoard3NextPreMemInit (
              &Instance

              );

   if (!EFI_ERROR (Status)) {

-     DEBUG ((EFI_D_INFO,  "Minnow Board 3 Next Pre Mem Init: Skip\n"));

     return EFI_SUCCESS;

   }

 

diff --git a/Platform/BroxtonPlatformPkg/BuildBxtBios.bat b/Platform/BroxtonPlatformPkg/BuildBxtBios.bat
index e08f5d10b2..ede285e382 100644
--- a/Platform/BroxtonPlatformPkg/BuildBxtBios.bat
+++ b/Platform/BroxtonPlatformPkg/BuildBxtBios.bat
@@ -177,7 +177,12 @@ if /i "%~1"=="/BG" (
     shift

     goto OptLoop

 )

-

+if /i "%~1"=="/MX" (

+    set BoardId=MX

+    echo.

+    shift

+    goto OptLoop

+)

 if /i "%~1"=="/m" (

     if defined NUMBER_OF_PROCESSORS (

         set /a build_threads=%NUMBER_OF_PROCESSORS%

@@ -202,6 +207,8 @@ if /i "%~1" == "%Minnow_RVP%" (
     set BOARD_ID=MINNOW3

   ) else if %BoardId%==BG (

     set BOARD_ID=BENSONV

+  ) else if %BoardId%==MX (

+    set BOARD_ID=MINNEXT

   )

     set ENBDT_PF_BUILD=TRUE

     set PLATFORM_NAME=BroxtonPlatformPkg

@@ -270,6 +277,14 @@ if %BoardId%==MN (
   )

 )

 

+if %BoardId%==MX (

+  if %FabId%==B (

+    echo BOARD_REV = B >> Conf\BiosId.env

+  ) else (

+    echo BOARD_REV = A >> Conf\BiosId.env

+  )

+)

+

 :: Set the Build_Type, Version_Major, and Version_Minor environment variables

 find /v "#" Conf\BiosId.env > ver_strings

 for /f "tokens=1,3" %%i in (ver_strings) do set %%i=%%j

diff --git a/Platform/BroxtonPlatformPkg/BuildIFWI.bat b/Platform/BroxtonPlatformPkg/BuildIFWI.bat
index a27362ae0a..556bd4abbd 100644
--- a/Platform/BroxtonPlatformPkg/BuildIFWI.bat
+++ b/Platform/BroxtonPlatformPkg/BuildIFWI.bat
@@ -2,13 +2,13 @@
 SetLocal EnableDelayedExpansion EnableExtensions
 
 :: Assign initial values
-set thisscript=%0

+set thisscript=%0
 set exitCode=0
 set "Build_Flags= "
 set Arch=X64
 set SkipUsageFlag=FALSE
-set FabId=B

-set BoardId=MN

+set FabId=B
+set BoardId=MN
 set buildthread=
 set WORKSPACE=%CD%
 if %WORKSPACE:~-1%==\ (
@@ -82,29 +82,36 @@ if /i "%~1"=="/FspW" (
     goto OptLoop
 )
 if /i "%~1"=="/A" (
-    set FabId=A

+    set FabId=A
     set Build_Flags=%Build_Flags% /A
     shift
     goto OptLoop
 )
 if /i "%~1"=="/B" (
-    set FabId=B

+    set FabId=B
     set Build_Flags=%Build_Flags% /B
     shift
     goto OptLoop
 )
-if /i "%~1"=="/MN" (

-    set BoardId=MN

-    set Build_Flags=%Build_Flags% /MN

-    shift

-    goto OptLoop

-)

-if /i "%~1"=="/BG" (

-    set BoardId=BG

-    set Build_Flags=%Build_Flags% /BG

-    shift

-    goto OptLoop

-)

+if /i "%~1"=="/MN" (
+    set BoardId=MN
+    set Build_Flags=%Build_Flags% /MN
+    shift
+    goto OptLoop
+)
+if /i "%~1"=="/BG" (
+    set BoardId=BG
+    set Build_Flags=%Build_Flags% /BG
+    shift
+    goto OptLoop
+)
+
+if /i "%~1"=="/MX" (
+    set BoardId=MX
+    set Build_Flags=%Build_Flags% /MX
+    shift
+    goto OptLoop
+)
 
 if /i "%~1"=="/m" (
     set buildthread=/m
@@ -117,7 +124,7 @@ if /i "%~1"=="/m" (
 :: Require 2 input parameters
 if "%~2"=="" (
    echo. & echo -- ERROR: Not Enough Arguments Provided
-   echo -- Please review the Help screen %thisscript% "/?" -- & echo.

+   echo -- Please review the Help screen %thisscript% "/?" -- & echo.
    goto exit
 )
 
@@ -130,8 +137,8 @@ echo ===========================================================================
 echo Build_IFWI:  Calling BIOS build Script...
 echo.
 
-echo - call BuildBxtBios.bat %buildthread% %Build_Flags% %Platform_Type% %Build_Target%

-call %WORKSPACE%\%PLATFORM_PATH%\BuildBxtBios.bat %buildthread% %Build_Flags% %Platform_Type% %Build_Target%

+echo - call BuildBxtBios.bat %buildthread% %Build_Flags% %Platform_Type% %Build_Target%
+call %WORKSPACE%\%PLATFORM_PATH%\BuildBxtBios.bat %buildthread% %Build_Flags% %Platform_Type% %Build_Target%
 if ErrorLevel 1 (
     echo echo  -- Error Building BIOS  & echo.
     set exitCode=1
@@ -152,7 +159,7 @@ del /f/q ver_strings >nul
 :: Translate Release Build Type
 if "%BUILD_TYPE%"=="R" set BUILD_TYPE=R
 
-set BIOS_Name=%BOARD_ID%%BOARD_REV%_%Arch%_%BUILD_TYPE%_%VERSION_MAJOR%_%VERSION_MINOR%

+set BIOS_Name=%BOARD_ID%%BOARD_REV%_%Arch%_%BUILD_TYPE%_%VERSION_MAJOR%_%VERSION_MINOR%
 
 :: Start Integration process
 echo ================================================================================
@@ -161,8 +168,8 @@ echo.
 echo BIOS ROM input:  %BIOS_Name%
 echo.
 pushd %STITCH_PATH%
-   echo  - call IFWIStitch_Simple.bat %STITCH_PATH%\%BIOS_Name% %FabId% %BoardId%

-   call %STITCH_PATH%\IFWIStitch_Simple.bat %STITCH_PATH%\%BIOS_Name% %FabId% %BoardId%

+   echo  - call IFWIStitch_Simple.bat %STITCH_PATH%\%BIOS_Name% %FabId% %BoardId%
+   call %STITCH_PATH%\IFWIStitch_Simple.bat %STITCH_PATH%\%BIOS_Name% %FabId% %BoardId%
    @echo off
 popd
 if ErrorLevel 1 (
@@ -171,7 +178,7 @@ if ErrorLevel 1 (
 )
 echo.
 echo Build_IFWI is finished.
-echo The final IFWI file is located in %WORKSPACE%\%PLATFORM_PATH%\Common\Tools\Stitch\

+echo The final IFWI file is located in %WORKSPACE%\%PLATFORM_PATH%\Common\Tools\Stitch\
 echo ======================================================================
 
 
@@ -181,12 +188,12 @@ goto Exit
 if /i "%SkipUsageFlag%" == "TRUE" goto Exit
 echo Script to build BIOS firmware and stitch the entire IFWI.
 echo.
-echo Usage: %thisscript% [options] ^<PlatformType^> ^<BuildTarget^>

+echo Usage: %thisscript% [options] ^<PlatformType^> ^<BuildTarget^>
 echo.
 echo.    /?       Display this help text
 echo     /l       Log a copy of the build output to EDK2.log
 echo     /c       CleanAll before building
-echo     /m 	  Set the build thread count to number of processors

+echo     /m 	  Set the build thread count to number of processors
 echo     /FspW    Build FSP and FSP Wrapper
 echo     /x64     Set Arch to X64 (default)
 echo     /vs08    Set compiler to VisualStudio 2008
diff --git a/Platform/BroxtonPlatformPkg/Common/Console/LpssUartSerialDxe/LpssUartSerialDxe.inf b/Platform/BroxtonPlatformPkg/Common/Console/LpssUartSerialDxe/LpssUartSerialDxe.inf
index 138cf73104..4509ec1180 100644
--- a/Platform/BroxtonPlatformPkg/Common/Console/LpssUartSerialDxe/LpssUartSerialDxe.inf
+++ b/Platform/BroxtonPlatformPkg/Common/Console/LpssUartSerialDxe/LpssUartSerialDxe.inf
@@ -45,6 +45,7 @@
   IntelFrameworkPkg/IntelFrameworkPkg.dec

   IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec

   BroxtonSiPkg/BroxtonSiPkg.dec

+  BroxtonPlatformPkg/PlatformPkg.dec

 

 [LibraryClasses]

   PcdLib

@@ -78,6 +79,7 @@
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits|8       ## CONSUMES

   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity|1         ## CONSUMES

   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits|1       ## CONSUMES

+  gPlatformModuleTokenSpaceGuid.PcdSerialIoUartNumber      ## CONSUMES

 

 [UserExtensions.TianoCore."ExtraFiles"]

   IsaSerialDxeExtra.uni

diff --git a/Platform/BroxtonPlatformPkg/Common/Console/LpssUartSerialDxe/Serial.c b/Platform/BroxtonPlatformPkg/Common/Console/LpssUartSerialDxe/Serial.c
index fa6a2667e9..c273d78f8c 100644
--- a/Platform/BroxtonPlatformPkg/Common/Console/LpssUartSerialDxe/Serial.c
+++ b/Platform/BroxtonPlatformPkg/Common/Console/LpssUartSerialDxe/Serial.c
@@ -1652,7 +1652,7 @@ IsaSerialWrite (
 

   CharBuffer  = (UINT8 *) Buffer;

 

-  PchSerialIoUartOut (Uart2, CharBuffer, *BufferSize);

+  PchSerialIoUartOut (PcdGet8 (PcdSerialIoUartNumber), CharBuffer, *BufferSize);

 

   gBS->RestoreTPL (Tpl);

 

@@ -1696,7 +1696,7 @@ IsaSerialRead (
 

   Tpl     = gBS->RaiseTPL (TPL_NOTIFY);

 

-  *BufferSize = PchSerialIoUartIn(Uart2, Buffer, *BufferSize, FALSE);

+  *BufferSize = PchSerialIoUartIn(PcdGet8 (PcdSerialIoUartNumber), Buffer, *BufferSize, FALSE);

 

   gBS->RestoreTPL (Tpl);

 

diff --git a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/BaseFspWrapperPlatformLibSample.inf b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/BaseFspWrapperPlatformLibSample.inf
index e9b20a452f..d12dccd975 100644
--- a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/BaseFspWrapperPlatformLibSample.inf
+++ b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/BaseFspWrapperPlatformLibSample.inf
@@ -88,4 +88,5 @@
   gIntelFsp2WrapperTokenSpaceGuid.PcdFspStackSize          ## CONSUMES

   gPlatformModuleTokenSpaceGuid.PcdFlashFvIBBLSize   ## CONSUMES

   gPlatformModuleTokenSpaceGuid.PcdUpdateFspmUpdFunc

+  gPlatformModuleTokenSpaceGuid.PcdSerialIoUartNumber

 

diff --git a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/FspPlatformInfoLibSample.c b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/FspPlatformInfoLibSample.c
index 5eae2165dd..d085f265b3 100644
--- a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/FspPlatformInfoLibSample.c
+++ b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/FspPlatformInfoLibSample.c
@@ -126,7 +126,7 @@ UpdateFspUpdConfigs (
   FspmUpd = (FSPM_UPD *)FspUpdRgnPtr;

   DEBUG ((DEBUG_INFO, "GetFspFspmUpdDataPointer - 0x%x\n", FspmUpd));

 

-  FspmUpd->FspmConfig.SerialDebugPortDevice     = 2;

+  FspmUpd->FspmConfig.SerialDebugPortDevice     = PcdGet8(PcdSerialIoUartNumber);

   FspmUpd->FspmConfig.SerialDebugPortType       = 2;// Skip the serial port init since we already did it

   FspmUpd->FspmConfig.SerialDebugPortStrideSize = 2;

   FspmUpd->FspmConfig.SerialDebugPortAddress    = 0;

diff --git a/Platform/BroxtonPlatformPkg/Common/Include/BoardFunctionsPei.h b/Platform/BroxtonPlatformPkg/Common/Include/BoardFunctionsPei.h
index 366b275e3c..92e10b3bae 100644
--- a/Platform/BroxtonPlatformPkg/Common/Include/BoardFunctionsPei.h
+++ b/Platform/BroxtonPlatformPkg/Common/Include/BoardFunctionsPei.h
@@ -36,6 +36,7 @@
 #include <FspmUpd.h>

 #include <FspsUpd.h>

 #include <SmipGenerated.h>

+#include <ScPreMemPolicyCommon.h>

 

 typedef

 EFI_STATUS

@@ -55,5 +56,11 @@ EFI_STATUS
   IN  UINT8                            BoardId

   );

 

+typedef

+EFI_STATUS

+(EFIAPI *UPDATE_PCIE_CONFIG_FUNC) (

+  IN  SC_PCIE_PREMEM_CONFIG  *PciePreMemConfig

+  );

+

 #endif

 

diff --git a/Platform/BroxtonPlatformPkg/Common/Include/Guid/PlatformInfo.h b/Platform/BroxtonPlatformPkg/Common/Include/Guid/PlatformInfo.h
index 455c6833ef..b2fbd0bd27 100644
--- a/Platform/BroxtonPlatformPkg/Common/Include/Guid/PlatformInfo.h
+++ b/Platform/BroxtonPlatformPkg/Common/Include/Guid/PlatformInfo.h
@@ -165,6 +165,7 @@ typedef enum {
   BOARD_ID_LFH_CRB         = 0x07,     // Leaf Hill

   BOARD_ID_MINNOW          = 0x0F,     // Minnow Board

   BOARD_ID_BENSON          = 0x0C,     // Benson Glacier

+  BOARD_ID_MINNOW_NEXT     = 0x03,     // Minnow Board Next

   BOARD_ID_APL_UNKNOWN     = 0xFF

 } APL_BOARD_ID_LIST;

 

diff --git a/Platform/BroxtonPlatformPkg/Common/Include/Guid/PlatformInfo_Aplk.h b/Platform/BroxtonPlatformPkg/Common/Include/Guid/PlatformInfo_Aplk.h
index b29bd62e8b..0bf9fb6eb7 100644
--- a/Platform/BroxtonPlatformPkg/Common/Include/Guid/PlatformInfo_Aplk.h
+++ b/Platform/BroxtonPlatformPkg/Common/Include/Guid/PlatformInfo_Aplk.h
@@ -150,6 +150,7 @@ typedef struct {
 typedef enum {

   BOARD_ID_LFH_CRB         = 0x07,     // Leaf Hill

   BOARD_ID_MINNOW          = 0x0F,     // Minnow Board

+  BOARD_ID_MINNOW_NEXT     = 0x03,     // Minnow Board Next

   BOARD_ID_BENSON          = 0x0C,     // Benson Glacier

   BOARD_ID_APL_UNKNOWN     = 0xFF

 } APL_BOARD_ID_LIST;

diff --git a/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSerialPortLib.c b/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSerialPortLib.c
index 2c63f9878f..7770619f97 100644
--- a/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSerialPortLib.c
+++ b/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSerialPortLib.c
@@ -171,8 +171,11 @@ SerialPortInitialize (
   VOID

   )

 {

-

-  PchSerialIoUartInit (PcdGet8 (PcdSerialIoUartNumber), TRUE, 115200, 3, FALSE);

+  //

+  //PchSerialIoUartInit (PcdGet8 (PcdSerialIoUartNumber), TRUE, 115200, 3, FALSE);

+  //

+  PchSerialIoUartInit (0, TRUE, 115200, 3, FALSE);

+  PchSerialIoUartInit (2, TRUE, 115200, 3, FALSE);

 

   return RETURN_SUCCESS;

 }

diff --git a/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSerialPortLib.inf b/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSerialPortLib.inf
index 5ea0c46577..d986462276 100644
--- a/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSerialPortLib.inf
+++ b/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSerialPortLib.inf
@@ -54,7 +54,7 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate

   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase

   gClientCommonModuleTokenSpaceGuid.PcdStatusCodeFlagsCmosIndex

-  gBxtRefCodePkgTokenSpaceGuid.PcdSerialIoUartNumber

+  gPlatformModuleTokenSpaceGuid.PcdSerialIoUartNumber

 

 [Sources]

   BaseSerialPortLib.c

diff --git a/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSerialPortLibNoInit.inf b/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSerialPortLibNoInit.inf
index 6a9cf86b25..38964c4a3d 100644
--- a/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSerialPortLibNoInit.inf
+++ b/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSerialPortLibNoInit.inf
@@ -54,7 +54,7 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate

   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase

   gClientCommonModuleTokenSpaceGuid.PcdStatusCodeFlagsCmosIndex

-  gBxtRefCodePkgTokenSpaceGuid.PcdSerialIoUartNumber

+  gPlatformModuleTokenSpaceGuid.PcdSerialIoUartNumber

 

 [Sources]

   BaseSerialPortLibNoInit.c

diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPreMemPei/BoardGpiosPreMem.c b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPreMemPei/BoardGpiosPreMem.c
index 7116ba19bd..b95e907b68 100644
--- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPreMemPei/BoardGpiosPreMem.c
+++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPreMemPei/BoardGpiosPreMem.c
@@ -71,6 +71,17 @@ BXT_GPIO_PAD_INIT  IshI2cGpio[] =
 };

 

 //

+// Turn on an LED so we know there is life in this board

+//

+BXT_GPIO_PAD_INIT  SignsOfLifeGpio[] =

+{

+  //

+  //                  Group Pin#:  pad_name,    PMode,GPIO_Config,HostSw,GPO_STATE,INT_Trigger,  Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, IOSTerm,     MMIO_Offset,      Community

+  //

+  BXT_GPIO_PAD_CONF(L"GPIO_26",                  M0   ,    GPO   , GPIO_D,  LO    ,   NA       , Wake_Disabled, P_NONE ,   NA    ,    NA,     NA   ,DisPuPd,    GPIO_PADBAR+0x00D0,  NORTH), // MB3N - SATA_LED

+};

+

+//

 // North Peak GPIO settings before memory initialization, as it needs to be enabled before memory init

 //

 BXT_GPIO_PAD_INIT  NorthPeakGpio[] =

@@ -162,8 +173,14 @@ BXT_GPIO_PAD_INIT  UartGpio [] =
   //

   //                   Group Pin#:  pad_name,    PMode,GPIO_Config,HostSw,GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L, Inverted,GPI_ROUT,IOSstae, IOSTerm,   MMIO_Offset,      Community

   //

-  BXT_GPIO_PAD_CONF(L"GPIO_46 LPSS_UART2_RXD",   M1   ,    NA    ,  NA   ,  NA    ,   NA       , Wake_Disabled, P_20K_H,   NA    ,    NA,      NA  ,     NA, GPIO_PADBAR+0x0170,  NORTH),

-  BXT_GPIO_PAD_CONF(L"GPIO_47 LPSS_UART2_TXD",   M1   ,    NA    ,  NA   ,  NA    ,   NA       , Wake_Disabled, P_20K_H,   NA    ,    NA,      NA  ,     NA, GPIO_PADBAR+0x0178,  NORTH),

+  BXT_GPIO_PAD_CONF(L"GPIO_38 LPSS_UART0_RXD",   M1   ,    NA    ,  NA   ,  NA    ,   NA       , Wake_Disabled, P_20K_H,    NA   ,    NA,     NA   ,     NA, GPIO_PADBAR+0x0130, NORTH),     // SOC_UART1_TXD

+  BXT_GPIO_PAD_CONF(L"GPIO_39 LPSS_UART0_TXD",   M1   ,    NA    ,  NA   ,  NA    ,   NA       , Wake_Disabled, P_20K_H,    NA   ,    NA,     NA   ,     NA, GPIO_PADBAR+0x0138, NORTH),     // SOC_UART1_RXD

+  BXT_GPIO_PAD_CONF(L"GPIO_42 LPSS_UART1_RXD",   M1   ,    NA    ,  NA   ,  NA    ,   NA       , Wake_Disabled, P_20K_H,    NA   ,    NA,     NA   ,     NA, GPIO_PADBAR+0x0150, NORTH),     // SOC_UART1_TXD

+  BXT_GPIO_PAD_CONF(L"GPIO_43 LPSS_UART1_TXD",   M1   ,    NA    ,  NA   ,  NA    ,   NA       , Wake_Disabled, P_20K_H,    NA   ,    NA,     NA   ,     NA, GPIO_PADBAR+0x0158, NORTH),     // SOC_UART1_RXD

+  BXT_GPIO_PAD_CONF(L"GPIO_46 LPSS_UART2_RXD",   M1   ,    NA    ,  NA   ,  NA    ,   NA       , Wake_Disabled, P_20K_H,    NA   ,    NA,     NA   ,     NA, GPIO_PADBAR+0x0170, NORTH),     // SOC_UART2_TXD

+  BXT_GPIO_PAD_CONF(L"GPIO_47 LPSS_UART2_TXD",   M1   ,    NA    ,  NA   ,  NA    ,   NA       , Wake_Disabled, P_20K_H,    NA   ,    NA,     NA   ,     NA, GPIO_PADBAR+0x0178, NORTH),     // SOC_UART2_RXD

+  BXT_GPIO_PAD_CONF(L"GPIO_112 GP_SSP_1_FS0",    M2   ,    NA    ,  NA   ,  NA    ,   NA       , Wake_Disabled, P_20K_H,    NA   ,    NA,     NA   ,     NA, GPIO_PADBAR+0x0218, NORTHWEST), // SOC_UART3_RXD

+  BXT_GPIO_PAD_CONF(L"GPIO_113 GP_SSP_1_FS1",    M2   ,    NA    ,  NA   ,  NA    ,   NA       , Wake_Disabled, P_20K_H,    NA   ,    NA,     NA   ,     NA, GPIO_PADBAR+0x0220, NORTHWEST), // SOC_UART3_TXD

 };

 

 

@@ -214,16 +231,16 @@ MultiPlatformGpioProgramPreMem (
   )

 {

   // PAD programming

+  GpioPadConfigTable (sizeof (SignsOfLifeGpio) / sizeof (SignsOfLifeGpio[0]), SignsOfLifeGpio);

   GpioPadConfigTable (sizeof (IshI2cGpio) / sizeof (IshI2cGpio[0]), IshI2cGpio);

   GpioPadConfigTable (sizeof (NorthPeakGpio) / sizeof (NorthPeakGpio[0]), NorthPeakGpio);

   GpioPadConfigTable (sizeof (LpssSpi1Gpio) / sizeof (LpssSpi1Gpio[0]), LpssSpi1Gpio);

 

   GpioPadConfigTable (sizeof (PcieGpio) / sizeof (PcieGpio[0]), PcieGpio);

   *StartTimerTick = GetPerformanceCounter ();

-  GpioPadConfigTable (sizeof (SataGpio) / sizeof (SataGpio[0]), SataGpio);

   GpioPadConfigTable (sizeof (LpcGpio) / sizeof (LpcGpio[0]), LpcGpio);

   GpioPadConfigTable (sizeof (SmbusGpio) / sizeof (SmbusGpio[0]), SmbusGpio);

-  GpioPadConfigTable (sizeof (UartGpio) / sizeof (UartGpio[0]), UartGpio);

+  GpioPadConfigTable (sizeof (UartGpio)/sizeof (UartGpio[0]), UartGpio);

 

   return EFI_SUCCESS;

 }

diff --git a/Platform/BroxtonPlatformPkg/Common/Tools/Stitch/IFWIStitch_Simple.bat b/Platform/BroxtonPlatformPkg/Common/Tools/Stitch/IFWIStitch_Simple.bat
index 42375ce87f..134807ead1 100644
--- a/Platform/BroxtonPlatformPkg/Common/Tools/Stitch/IFWIStitch_Simple.bat
+++ b/Platform/BroxtonPlatformPkg/Common/Tools/Stitch/IFWIStitch_Simple.bat
@@ -48,6 +48,10 @@ if /i "%~3"=="BG" (
     set BoardId=BG

 )

 

+if /i "%~3"=="MX" (

+    set BoardId=MX

+)

+

 :OptLoop1

 

 if /i "%~1"=="/FspW" (

@@ -154,6 +158,11 @@ if %BoardId%==BG (
            copy /y /b ..\..\Binaries\IFWI\MinnowBoard3\FAB_A\SpiChunk3.bin .

            copy /y /b SpiChunk1.bin+.\BIOS_COMPONENTS\IBBL.Fv+.\BIOS_COMPONENTS\IBB.Fv+SpiChunk2.bin+.\BIOS_COMPONENTS\OBB.Fv+.\BIOS_COMPONENTS\NvStorage.Fv+SpiChunk3.bin spi_out.bin

          )

+) else if %BoardId%==MX (

+           copy /y /b ..\..\Binaries\IFWI\MinnowBoard3Next\FAB_A\SpiChunk1.bin .

+           copy /y /b ..\..\Binaries\IFWI\MinnowBoard3Next\FAB_A\SpiChunk2.bin .

+           copy /y /b ..\..\Binaries\IFWI\MinnowBoard3Next\FAB_A\SpiChunk3.bin .

+           copy /y /b SpiChunk1.bin+.\BIOS_COMPONENTS\IBBL.Fv+.\BIOS_COMPONENTS\IBB.Fv+SpiChunk2.bin+.\BIOS_COMPONENTS\OBB.Fv+.\BIOS_COMPONENTS\NvStorage.Fv+SpiChunk3.bin spi_out.bin

 )

 move /y spi_out.bin %BIOS_ID%.bin  >> Stitching.log

 

diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/Components.IA32.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/Components.IA32.dsc
index cdbba2aff7..2bdc3d09d3 100644
--- a/Platform/BroxtonPlatformPkg/PlatformDsc/Components.IA32.dsc
+++ b/Platform/BroxtonPlatformPkg/PlatformDsc/Components.IA32.dsc
@@ -81,6 +81,7 @@
       NULL|$(PLATFORM_NAME)/Board/MinnowBoard3/BoardInitPreMem/BoardInitPreMem.inf

       NULL|$(PLATFORM_NAME)/Board/LeafHill/BoardInitPreMem/BoardInitPreMem.inf

       NULL|$(PLATFORM_NAME)/Board/BensonGlacier/BoardInitPreMem/BoardInitPreMem.inf

+      NULL|$(PLATFORM_NAME)/Board/MinnowBoard3Next/BoardInitPreMem/BoardInitPreMem.inf

       BaseCryptLib|CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf

       CpuPolicyLib|$(PLATFORM_SI_PACKAGE)/Cpu/Library/PeiCpuPolicyLibPreMem/PeiCpuPolicyLibPreMem.inf

     <BuildOptions>

@@ -116,6 +117,7 @@
        NULL|$(PLATFORM_NAME)/Board/MinnowBoard3/BoardInitPostMem/BoardInitPostMem.inf

        NULL|$(PLATFORM_NAME)/Board/LeafHill/BoardInitPostMem/BoardInitPostMem.inf

        NULL|$(PLATFORM_NAME)/Board/BensonGlacier/BoardInitPostMem/BoardInitPostMem.inf

+       NULL|$(PLATFORM_NAME)/Board/MinnowBoard3Next/BoardInitPostMem/BoardInitPostMem.inf

        I2cLibPei|$(PLATFORM_SI_PACKAGE)/SouthCluster/Library/I2CLibPei/I2CLibPei.inf

     <PcdsPatchableInModule>

       gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x803805c6

diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc
index 94c8fbb7b2..d56911a0c0 100644
--- a/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc
+++ b/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc
@@ -26,10 +26,12 @@
   !if $(LZMA_ENABLE) == TRUE

       NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf

   !endif

+     DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf 

   }

   MdeModulePkg/Universal/PCD/Dxe/Pcd.inf {

     <LibraryClasses>

       PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+      DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf 

   }

 

 !if $(SOURCE_DEBUG_ENABLE) == TRUE

@@ -175,6 +177,7 @@
       NULL|$(PLATFORM_NAME)/Board/MinnowBoard3/BoardInitDxe/BoardInitDxe.inf

       NULL|$(PLATFORM_NAME)/Board/LeafHill/BoardInitDxe/BoardInitDxe.inf

       NULL|$(PLATFORM_NAME)/Board/BensonGlacier/BoardInitDxe/BoardInitDxe.inf

+      NULL|$(PLATFORM_NAME)/Board/MinnowBoard3Next/BoardInitDxe/BoardInitDxe.inf

   }

 

 !if $(DATAHUB_ENABLE) == TRUE

diff --git a/Platform/BroxtonPlatformPkg/PlatformPkg.dec b/Platform/BroxtonPlatformPkg/PlatformPkg.dec
index 1de762f798..7c189a92f5 100644
--- a/Platform/BroxtonPlatformPkg/PlatformPkg.dec
+++ b/Platform/BroxtonPlatformPkg/PlatformPkg.dec
@@ -61,6 +61,7 @@
   gPeiLeafHillVbtGuid                     = { 0x6ae80680, 0x5e3f, 0x4e63, { 0xa5, 0xf5, 0x78, 0xe5, 0x21, 0x4f, 0x13, 0xfe } }

   gPeiMinnowBoard3VbtGuid                 = { 0xE08CA6D5, 0x8D02, 0x43ae, { 0xAB, 0xB1, 0x95, 0x2C, 0xC7, 0x87, 0xC9, 0x33 } }

   gPeiBensonGlacierVbtGuid                = { 0xbfde308e, 0x2d5a, 0x4ca7, { 0xaa, 0x76, 0x19, 0x93, 0x8a, 0xaa, 0xe4, 0xda } }

+  gPeiMinnow3NextVbtGuid                  = { 0x1f9cbb42, 0x107e, 0x46a4, { 0xa2, 0xcb, 0x92, 0xf5, 0x86, 0xf9, 0xfb, 0x31 } }

   gPeiLogoGuid                            = { 0x7BB28B99, 0x61BB, 0x11d5, { 0x9A, 0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } }

   gPlatformEmmcHs400TuningInfoGuid        = { 0xb0ae3e81, 0xc6b0, 0x4d35, { 0xad, 0x51, 0x91, 0x17, 0xe0, 0x65, 0x1e, 0xa3 } }

   gEfiTraceHubDebugLibIa32Guid            = { 0x23a3e7ba, 0x75d1, 0x4cb9, { 0x9c, 0x8f, 0x56, 0xfa, 0x4e, 0x48, 0xd9, 0x9e } }

@@ -192,6 +193,10 @@
   gPlatformModuleTokenSpaceGuid.PcdMaxPkgCState|0x00|UINT8|0x80000018

   ## This PCD used to select TI3100 Audio Codec

   gPlatformModuleTokenSpaceGuid.PcdTi3100AudioCodecEnable|FALSE|BOOLEAN|0x80000019

+  ##

+  gPlatformModuleTokenSpaceGuid.PcdUpdatePcieConfigFunc|2|UINT64|0x8000001A

+  ## SerialIo Uart Configuration

+  #gPlatformModuleTokenSpaceGuid.PcdSerialIoUartNumber|2|UINT8|0x8000001B

   ## MemoryCheck value for checking memory before boot OS.

   ## To save the boot performance, the default MemoryCheck is set to 0.

   gClientCommonModuleTokenSpaceGuid.PcdPlatformMemoryCheck|0|UINT8|0x40000005

@@ -332,3 +337,5 @@
   ## Specifies maximum number of PPIs provided by SecCore.

   # @Prompt Maximum number of PPIs provided by SecCore.

   gPlatformModuleTokenSpaceGuid.PcdSecCoreMaxPpiSupported|0x6|UINT32|0x10001010

+  ## SerialIo Uart Configuration

+  gPlatformModuleTokenSpaceGuid.PcdSerialIoUartNumber|2|UINT8|0x10001011

diff --git a/Platform/BroxtonPlatformPkg/PlatformPkg.fdf b/Platform/BroxtonPlatformPkg/PlatformPkg.fdf
index 216cdea6bd..c07b65ee54 100644
--- a/Platform/BroxtonPlatformPkg/PlatformPkg.fdf
+++ b/Platform/BroxtonPlatformPkg/PlatformPkg.fdf
@@ -259,6 +259,12 @@
     SECTION RAW = $(PLATFORM_NAME)/Board/MinnowBoard3/Vbt/VbtBxtMipi.bin

     SECTION UI = "IntelGopVbt1"

   }

+  

+  # VBT For Minnowboard 3 Next (File Guid is gPeiMinnow3NextVbtGuid)

+  FILE FREEFORM = 1F9CBB42-107E-46A4-A2CB-92F586F9FB31 {

+    SECTION RAW = $(PLATFORM_NAME)/Board/MinnowBoard3Next/Vbt/VbtBxtMipi.bin

+    SECTION UI = "IntelGopVbt1"

+  }

     

   # VBT For Benson Glacier (File Guid is gPeiBensonGlacierVbtGuid)

   FILE FREEFORM = BFDE308E-2D5A-4CA7-AA76-19938AAAE4DA {

diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec b/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec
index f17a3e0e55..c06b4e1312 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec
@@ -338,9 +338,6 @@
   gBxtRefCodePkgTokenSpaceGuid.PcdMmcSdMultiBlockSupport|TRUE|BOOLEAN|0x13

 

 [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]

-  ##

-  ## SerialIo Uart Configuration

-  gBxtRefCodePkgTokenSpaceGuid.PcdSerialIoUartNumber|2|UINT8|0x00100002

   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"INTEL "|VOID*|0x30001034

   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x20202020324B4445|UINT64|0x30001035

   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision|0x00000002|UINT32|0x30001036

diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/PeiDxeSmmPchSerialIoUartLib/PeiDxeSmmPchSerialIoUartLib.inf b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/PeiDxeSmmPchSerialIoUartLib/PeiDxeSmmPchSerialIoUartLib.inf
index 18ae567999..c19cb9eb9e 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/PeiDxeSmmPchSerialIoUartLib/PeiDxeSmmPchSerialIoUartLib.inf
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/PeiDxeSmmPchSerialIoUartLib/PeiDxeSmmPchSerialIoUartLib.inf
@@ -35,6 +35,3 @@
   MmPciLib

   PchSerialIoLib

   TimerLib

-

-[Pcd]

-  gBxtRefCodePkgTokenSpaceGuid.PcdSerialIoUartNumber