diff options
| author | zwei4 <david.wei@intel.com> | 2017-09-02 17:18:26 +0800 |
|---|---|---|
| committer | zwei4 <david.wei@intel.com> | 2017-09-02 17:18:26 +0800 |
| commit | c7fd86be57d7746457e7a2faf4dd0199a9a07342 (patch) | |
| tree | 9fd2335c42d01e788a94da2939e61aef2c893ecd | |
| parent | dbb279c54dbed80ec700cfbd61632a64c2c08b51 (diff) | |
| download | edk2-platforms-c7fd86be57d7746457e7a2faf4dd0199a9a07342.tar.xz | |
Enable GT RC6.
Remove code that disables GT RC6. This could allow GT to enter deep sleep when it is idle, so that more power could be saved for core to use. This temp solution allows core frequency maximally rise to 1100MHz.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
5 files changed, 7 insertions, 19 deletions
diff --git a/Platform/BroxtonPlatformPkg/BiosId.env b/Platform/BroxtonPlatformPkg/BiosId.env index f8dfb32198..3c1b1a4896 100644 --- a/Platform/BroxtonPlatformPkg/BiosId.env +++ b/Platform/BroxtonPlatformPkg/BiosId.env @@ -30,6 +30,6 @@ BOARD_ID = APLKRVP
BOARD_REV = 3
BUILD_TYPE = D
-VERSION_MAJOR = 0065
+VERSION_MAJOR = 0066
VERSION_MINOR = 01
BOARD_EXT = X64
diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/BoardInitMiscs.c b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/BoardInitMiscs.c index 6abeb1d349..f124623ecb 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/BoardInitMiscs.c +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/BoardInitMiscs.c @@ -116,7 +116,7 @@ LhUpdateFspmUpd ( FspUpdRgn->FspmConfig.MemoryDown = 1;
FspUpdRgn->FspmConfig.DDR3LPageSize = 0;
FspUpdRgn->FspmConfig.DDR3LASR = 0;
- FspUpdRgn->FspmConfig.MemorySizeLimit = 0x1800;
+ FspUpdRgn->FspmConfig.MemorySizeLimit = 0;
FspUpdRgn->FspmConfig.DIMM0SPDAddress = 0;
FspUpdRgn->FspmConfig.DIMM1SPDAddress = 0;
FspUpdRgn->FspmConfig.DDR3LPageSize = 0;
diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformDxe/Platform.c b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformDxe/Platform.c index e5e9c9319a..7733dd0ac5 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformDxe/Platform.c +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformDxe/Platform.c @@ -786,9 +786,7 @@ InitializePlatform ( mSystemConfiguration.BoardId = PlatformInfoHob->BoardId;
if (mSystemConfiguration.PlatformSettingEn == 0) {
- if (PlatformInfoHob->PmicVersion == 0) {
- mSystemConfiguration.EnableRenderStandby = 0;
- }
+
mSystemConfiguration.PlatformSettingEn = 1;
}
diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/PlatformSetupDxe.c b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/PlatformSetupDxe.c index 06dffcdfb7..7e3beb6116 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/PlatformSetupDxe.c +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/PlatformSetupDxe.c @@ -145,9 +145,7 @@ LoadPlatformDefaultValues ( case BOARD_ID_LFH_CRB:
case BOARD_ID_MINNOW:
case BOARD_ID_BENSON:
- if (Private->FakeNvData.PmicSetupDefault == 1) {
- Private->FakeNvData.EnableRenderStandby = FALSE;
- }
+
break;
default:
break;
diff --git a/Platform/BroxtonPlatformPkg/DefineAtBuildMacros.dsc b/Platform/BroxtonPlatformPkg/DefineAtBuildMacros.dsc index e5ee4c1b4c..0e29ef3be4 100644 --- a/Platform/BroxtonPlatformPkg/DefineAtBuildMacros.dsc +++ b/Platform/BroxtonPlatformPkg/DefineAtBuildMacros.dsc @@ -1,11 +1,3 @@ -DEFINE ENBDT_PF_BUILD = TRUE -DEFINE TABLET_PF_BUILD = FALSE -DEFINE BYTI_PF_BUILD = FALSE -DEFINE CSLE_ENABLE = FALSE -DEFINE VP_BIOS_ENABLE = FALSE -DEFINE SV_BIOS_ENABLE = FALSE -DEFINE PPV_BIOS_ENABLE = FALSE -DEFINE RVVP_BIOS_ENABLE = FALSE -DEFINE RVV_BIOS_ENABLE = FALSE -DEFINE SOURCE_DEBUG_ENABLE = FALSE -DEFINE X64_CONFIG = TRUE +DEFINE ENBDT_PF_BUILD = TRUE
+DEFINE APLK_SETUP_ENABLE_BUILD = TRUE
+DEFINE X64_CONFIG = TRUE
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