diff options
| author | Jiewen Yao <jiewen.yao@intel.com> | 2018-02-14 21:24:02 +0800 |
|---|---|---|
| committer | Jiewen Yao <jiewen.yao@intel.com> | 2018-03-02 08:36:11 +0800 |
| commit | 78b62d1a0c3fc425107b85d8c97404a80609f752 (patch) | |
| tree | 722b35a6ab0927e21db963c9bbc63aeb568b2b73 | |
| parent | fb3107567492443967d7d03eb50f78ff94cc7600 (diff) | |
| download | edk2-platforms-78b62d1a0c3fc425107b85d8c97404a80609f752.tar.xz | |
Enable MinPlatformPkg to boot with EDK2 platform. Validated on an open server platform.
1) MinPlatform.dec
a) Add PcdFspWrapperBootMode to control different behavior in FSP wrapper mode and EDKII mode (by PlatformInitPei)
b) Add gPeiBaseMemoryTestPpiGuid and gPeiPlatformMemorySizePpiGuid – they are used for EDKII boot mode.
c) Rename MADT related PCD for server (PcdLocalApicAddress/PcdLocalApicMmioSize/PcdIoApicAddress/PcdIoApicMmioSize/PcdIoApicId)
d) Add MADT related PCD for multi IO APIC for server (PcdPcIoApicCount/PcdPcIoApicIdBase/PcdPcIoApicAddressBase/PcdPcIoApicInterruptBase)
e) Add HPET related PCD (PcdHpetTimerBlockId)
f) Add FADT related PCD (PcdFadtPreferredPmProfile/PcdFadtIaPcBootArch/PcdFadtFlags)
g) Add PCD for DXE Silicon module flash address (PcdFlashFvFspUBase/PcdFlashFvFspUSize/PcdFlashFvFspUOffset)
h) Make Flash Address PCD to be patchable, so that it can be updated in binary FV.
2) Include
a) DSC/FDF: Do not always include the module, which might be from silicon code, such as SEC/CpuDxe/SmmCpu/PciHostBridge.
b) DSC/FDF: UiApp.inf – fix a bug that UIAPP does not have boot manager.
c) DSC/FDF: DP.inf – sync to latest performance dump tool in ShellPkg.
3) Update AcpiPlatform for server platform
a) Construct MADT from scratch.
b) Construct MCFG from scratch.
4) CompressLib
a) Add CompressLib class and instance so that MRC data can be compressed.
5) PlatformInitPei
a) Produce BaseMemoryTestPpi and PlatformMemorySizePpi in EDKII boot mode.
b) Install FV in FSPM/FSPS/FSPU in EDKII boot mode.
c) Move SecurityFv/AdvancedFv installation from SEC to PlatformInitPei.
d) Remove BuildFvHob for flash region – it is a bug.
e) Mark above 4GiB MMIO to be uncatchable.
6) PciSegmentInfoLib
a) Handle the case that the lib is linked by a DXE module only.
7) PlatformSecLib
a) Move SecurityFv/AdvancedFv installation from SEC to PlatformInitPei.
8) SpiFvbService
a) Do not use fixed PCD, so that the address can be patchable.
9) TestPoint
a) Enhance the logic to check if a memory is in save state area or not. (Support PcdCpuHotPlugSupport)
10) Add python tool
a) AmlGenOffset.py – generate ACPI patch table.
b) ParseVar.py – parse the VarBin generated by FCE tool and output PCD value.
c) PatchFv/PatchBfv.py – patch the BFV address in ResetVector.bin
d) PatchFv/PatchBinFv.py – patch patchable PCD in a given FV according to build report.
e) PatchFv/RebaseBinFv.py – rebase a given FV to a new address.
f) PatchFv/SyncBinFvInf.py – generate INF for a binary FV.
Cc: Michael A Kubacki <michael.a.kubacki@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Isaac W Oram <isaac.w.oram@intel.com>
Cc: Brett Wang <brett.wang@intel.com>
Cc: Daocheng Bu <daocheng.bu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
50 files changed, 5718 insertions, 1835 deletions
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c index f6c30ec321..c71bf1ae50 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c @@ -14,50 +14,1187 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include "AcpiPlatform.h"
+#define MAX_CPU_NUM (FixedPcdGet32(PcdMaxCpuThreadCount) * FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuSocketCount))
+
+#pragma pack(1)
+
+typedef struct {
+ UINT32 AcpiProcessorId;
+ UINT32 ApicId;
+ UINT32 Flags;
+ UINT32 SwProcApicId;
+ UINT32 SocketNum;
+} EFI_CPU_ID_ORDER_MAP;
+
+//
+// Private Driver Data
+//
//
-// Global variables
+// Define Union of IO APIC & Local APIC structure;
//
+typedef union {
+ EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_STRUCTURE AcpiLocalApic;
+ EFI_ACPI_4_0_IO_APIC_STRUCTURE AcpiIoApic;
+ EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE AcpiLocalx2Apic;
+ struct {
+ UINT8 Type;
+ UINT8 Length;
+ } AcpiApicCommon;
+} ACPI_APIC_STRUCTURE_PTR;
+
+#pragma pack()
+
+extern EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE Facs;
+extern EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt;
+extern EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_HEADER Hpet;
+extern EFI_ACPI_WSMT_TABLE Wsmt;
VOID *mLocalTable[] = {
&Facs,
&Fadt,
&Hpet,
- &Madt,
- &Mcfg,
- &Wsmt
+ &Wsmt,
};
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_CPU_ID_ORDER_MAP mCpuApicIdOrderTable[MAX_CPU_NUM];
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_CPU_APIC_ID_REORDER_MAP mCpuApicIdReorderTable[MAX_CPU_NUM];
+EFI_ACPI_TABLE_PROTOCOL *mAcpiTable;
+
+UINT32 mNumOfBitShift = 6;
+BOOLEAN mForceX2ApicId;
+BOOLEAN mX2ApicEnabled;
+
+EFI_MP_SERVICES_PROTOCOL *mMpService;
+BOOLEAN mCpuOrderSorted;
+EFI_CPU_ID_ORDER_MAP mCpuApicIdOrderTable[MAX_CPU_NUM];
+UINTN mNumberOfCPUs = 0;
+UINTN mNumberOfEnabledCPUs = 0;
+
+// following are possible APICID Map for SKX
+static const UINT32 ApicIdMapA[] = { //for SKUs have number of core > 16
+ //it is 14 + 14 + 14 + 14 format
+ 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007,
+ 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x00000010, 0x00000011,
+ 0x00000012, 0x00000013, 0x00000014, 0x00000015, 0x00000016, 0x00000017, 0x00000018, 0x00000019,
+ 0x0000001A, 0x0000001B, 0x0000001C, 0x0000001D, 0x00000020, 0x00000021, 0x00000022, 0x00000023,
+ 0x00000024, 0x00000025, 0x00000026, 0x00000027, 0x00000028, 0x00000029, 0x0000002A, 0x0000002B,
+ 0x0000002C, 0x0000002D, 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 0x00000035,
+ 0x00000036, 0x00000037, 0x00000038, 0x00000039, 0x0000003A, 0x0000003B, 0x0000003C, 0x0000003D
+};
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_CPU_PACKAGE_INFO mSbspPackageInfo;
+static const UINT32 ApicIdMapB[] = { //for SKUs have number of cores <= 16 use 32 ID space
+ //it is 16+16 format
+ 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007,
+ 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F,
+ 0x00000010, 0x00000011, 0x00000012, 0x00000013, 0x00000014, 0x00000015, 0x00000016, 0x00000017,
+ 0x00000018, 0x00000019, 0x0000001A, 0x0000001B, 0x0000001C, 0x0000001D, 0x0000001E, 0x0000001F,
+ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF
+};
-//
-// Function implementations
-//
-/*
- This function will determine whether Native ASPM is supported on the platform.
+static const UINT32 ApicIdMapC[] = { //for SKUs have number of cores <= 16 use 64 ID space
+ //it is 16+0+16+0 format
+ 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007,
+ 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F,
+ 0x00000020, 0x00000021, 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000026, 0x00000027,
+ 0x00000028, 0x00000029, 0x0000002A, 0x0000002B, 0x0000002C, 0x0000002D, 0x0000002E, 0x0000002F,
+ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF
+};
+
+static const UINT32 ApicIdMapD[] = { //for SKUs have number of cores <= 8 use 16 ID space
+ //it is 16 format
+ 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007,
+ 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F,
+ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF
+};
+
+const UINT32 *mApicIdMap = NULL;
+
+/**
+ This function detect the APICID map and update ApicID Map pointer
+
+ @param None
+
+ @retval VOID
+
+**/
+VOID DetectApicIdMap(VOID)
+{
+ UINTN CoreCount;
+
+ CoreCount = 0;
+
+ if(mApicIdMap != NULL) {
+ return; //aleady initialized
+ }
+
+ mApicIdMap = ApicIdMapA; // default to > 16C SKUs
+
+ CoreCount = mNumberOfEnabledCPUs / 2;
+ DEBUG ((DEBUG_INFO, "CoreCount - %d\n", CoreCount));
+
+ //DEBUG((EFI_D_ERROR, ":: Default to use Map A @ %08X FusedCoreCount: %02d, sktlevel: %d\n",mApicIdMap, FusedCoreCount, mNumOfBitShift));
+ ASSERT (CoreCount != 0);
+
+ if(CoreCount <= 16) {
+
+ if(mNumOfBitShift == 4) {
+ mApicIdMap = ApicIdMapD;
+ //DEBUG((EFI_D_ERROR, ":: Use Map B @ %08X\n",mApicIdMap));
+ }
+
+ if(mNumOfBitShift == 5) {
+ mApicIdMap = ApicIdMapB;
+ //DEBUG((EFI_D_ERROR, ":: Use Map B @ %08X\n",mApicIdMap));
+ }
+
+ if(mNumOfBitShift == 6) {
+ mApicIdMap = ApicIdMapC;
+ //DEBUG((EFI_D_ERROR, ":: Use Map C @ %08X\n",mApicIdMap));
+ }
- @return TRUE if Native ASPM is supported, FALSE otherwise
-*/
-BOOLEAN
-IsNativeAspmSupported (
+ }
+
+ return;
+}
+
+/**
+ This function return the CoreThreadId of ApicId from ACPI ApicId Map array
+
+ @param ApicId
+
+ @retval Index of ACPI ApicId Map array
+
+**/
+UINT32
+GetIndexFromApicId (
+ UINT32 ApicId
+ )
+{
+ UINT32 CoreThreadId;
+ UINT32 i;
+
+ ASSERT (mApicIdMap != NULL);
+
+ CoreThreadId = ApicId & ((1 << mNumOfBitShift) - 1);
+
+ for(i = 0; i < (FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount)); i++) {
+ if(mApicIdMap[i] == CoreThreadId) {
+ break;
+ }
+ }
+
+ ASSERT (i <= (FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount)));
+
+ return i;
+}
+
+UINT32
+ApicId2SwProcApicId (
+ UINT32 ApicId
+ )
+{
+ UINT32 Index;
+
+ for (Index = 0; Index < MAX_CPU_NUM; Index++) {
+ if ((mCpuApicIdOrderTable[Index].Flags == 1) && (mCpuApicIdOrderTable[Index].ApicId == ApicId)) {
+ return Index;
+ }
+ }
+
+ return (UINT32) -1;
+
+}
+
+VOID
+DebugDisplayReOrderTable(
VOID
)
{
- if (PcdGet8 (PcdPciExpNative) == 0) {
- return FALSE;
- }
- switch (PcdGet8 (PcdNativeAspmEnable)) {
- case 0:
- return FALSE;
- case 1:
- return TRUE;
- default:
- ASSERT (0);
+ UINT32 Index;
+
+ DEBUG ((EFI_D_ERROR, "Index AcpiProcId ApicId Flags SwApicId Skt\n"));
+ for (Index=0; Index<MAX_CPU_NUM; Index++) {
+ DEBUG ((EFI_D_ERROR, " %02d 0x%02X 0x%02X %d 0x%02X %d\n",
+ Index, mCpuApicIdOrderTable[Index].AcpiProcessorId,
+ mCpuApicIdOrderTable[Index].ApicId,
+ mCpuApicIdOrderTable[Index].Flags,
+ mCpuApicIdOrderTable[Index].SwProcApicId,
+ mCpuApicIdOrderTable[Index].SocketNum));
+ }
+}
+
+EFI_STATUS
+AppendCpuMapTableEntry (
+ IN VOID *ApicPtr,
+ IN UINT32 LocalApicCounter
+ )
+{
+ EFI_STATUS Status;
+ EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_STRUCTURE *LocalApicPtr;
+ EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE *LocalX2ApicPtr;
+ UINT8 Type;
+
+ Status = EFI_SUCCESS;
+ Type = ((ACPI_APIC_STRUCTURE_PTR *)ApicPtr)->AcpiApicCommon.Type;
+ LocalApicPtr = (EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_STRUCTURE *)(&((ACPI_APIC_STRUCTURE_PTR *)ApicPtr)->AcpiLocalApic);
+ LocalX2ApicPtr = (EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE *)(&((ACPI_APIC_STRUCTURE_PTR *)ApicPtr)->AcpiLocalx2Apic);
+
+ if(Type == EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC) {
+ if(!mX2ApicEnabled) {
+ LocalApicPtr->Flags = (UINT8)mCpuApicIdOrderTable[LocalApicCounter].Flags;
+ LocalApicPtr->ApicId = (UINT8)mCpuApicIdOrderTable[LocalApicCounter].ApicId;
+ LocalApicPtr->AcpiProcessorId = (UINT8)mCpuApicIdOrderTable[LocalApicCounter].AcpiProcessorId;
+ } else {
+ LocalApicPtr->Flags = 0;
+ LocalApicPtr->ApicId = 0xFF;
+ LocalApicPtr->AcpiProcessorId = (UINT8)0xFF;
+ Status = EFI_UNSUPPORTED;
+ }
+ } else if(Type == EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC) {
+ if(mX2ApicEnabled) {
+ LocalX2ApicPtr->Flags = (UINT8)mCpuApicIdOrderTable[LocalApicCounter].Flags;
+ LocalX2ApicPtr->X2ApicId = mCpuApicIdOrderTable[LocalApicCounter].ApicId;
+ LocalX2ApicPtr->AcpiProcessorUid = mCpuApicIdOrderTable[LocalApicCounter].AcpiProcessorId;
+ } else {
+ LocalX2ApicPtr->Flags = 0;
+ LocalX2ApicPtr->X2ApicId = (UINT32)-1;
+ LocalX2ApicPtr->AcpiProcessorUid = (UINT32)-1;
+ Status = EFI_UNSUPPORTED;
+ }
+ } else {
+ Status = EFI_UNSUPPORTED;
+ }
+
+ return Status;
+
+}
+
+EFI_STATUS
+SortCpuLocalApicInTable (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_PROCESSOR_INFORMATION ProcessorInfoBuffer;
+ UINT32 Index;
+ UINT32 CurrProcessor;
+ UINT32 BspApicId;
+ UINT32 TempVal = 0;
+ EFI_CPU_ID_ORDER_MAP *CpuIdMapPtr;
+ UINT32 CoreThreadMask;
+
+ Index = 0;
+ Status = EFI_SUCCESS;
+
+ CoreThreadMask = (UINT32) ((1 << mNumOfBitShift) - 1);
+
+ if(!mCpuOrderSorted) {
+
+ Index = 0;
+
+ for (CurrProcessor = 0; CurrProcessor < mNumberOfCPUs; CurrProcessor++) {
+ Status = mMpService->GetProcessorInfo (
+ mMpService,
+ CurrProcessor,
+ &ProcessorInfoBuffer
+ );
+
+ if ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) != 0) {
+ if(ProcessorInfoBuffer.ProcessorId & 1) { //is 2nd thread
+ CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[(Index - 1) + MAX_CPU_NUM / 2];
+ } else { //is primary thread
+ CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[Index];
+ Index++;
+ }
+ CpuIdMapPtr->ApicId = (UINT32)ProcessorInfoBuffer.ProcessorId;
+ CpuIdMapPtr->Flags = ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) != 0);
+ CpuIdMapPtr->SocketNum = (UINT32)ProcessorInfoBuffer.Location.Package;
+ CpuIdMapPtr->AcpiProcessorId = (CpuIdMapPtr->SocketNum * FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount)) + GetIndexFromApicId(CpuIdMapPtr->ApicId); //CpuIdMapPtr->ApicId;
+ CpuIdMapPtr->SwProcApicId = ((UINT32)(ProcessorInfoBuffer.Location.Package << mNumOfBitShift) + (((UINT32)ProcessorInfoBuffer.ProcessorId) & CoreThreadMask));
+ if(mX2ApicEnabled) { //if X2Apic, re-order the socket # so it starts from base 0 and contiguous
+ //may not necessory!!!!!
+ }
+
+ //update processorbitMask
+ if (CpuIdMapPtr->Flags == 1) {
+
+ if(mForceX2ApicId) {
+ CpuIdMapPtr->SocketNum &= 0x7;
+ CpuIdMapPtr->AcpiProcessorId &= 0xFF; //keep lower 8bit due to use Proc obj in dsdt
+ CpuIdMapPtr->SwProcApicId &= 0xFF;
+ }
+ }
+ } else { //not enabled
+ CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[Index];
+ CpuIdMapPtr->ApicId = (UINT32)-1;
+ CpuIdMapPtr->Flags = 0;
+ CpuIdMapPtr->AcpiProcessorId = (UINT32)-1;
+ CpuIdMapPtr->SwProcApicId = (UINT32)-1;
+ CpuIdMapPtr->SocketNum = (UINT32)-1;
+ } //end if PROC ENABLE
+ } //end for CurrentProcessor
+
+ //keep for debug purpose
+ DEBUG(( EFI_D_ERROR, "::ACPI:: APIC ID Order Table Init. CoreThreadMask = %x, mNumOfBitShift = %x\n", CoreThreadMask, mNumOfBitShift));
+ DebugDisplayReOrderTable();
+
+ //make sure 1st entry is BSP
+ if(mX2ApicEnabled) {
+ BspApicId = (UINT32)AsmReadMsr64(0x802);
+ } else {
+ BspApicId = (*(volatile UINT32 *)(UINTN)0xFEE00020) >> 24;
+ }
+ DEBUG ((EFI_D_INFO, "BspApicId - 0x%x\n", BspApicId));
+
+ if(mCpuApicIdOrderTable[0].ApicId != BspApicId) {
+ //check to see if 1st entry is BSP, if not swap it
+ Index = ApicId2SwProcApicId(BspApicId);
+
+ if(MAX_CPU_NUM <= Index) {
+ DEBUG ((EFI_D_ERROR, "Asserting the SortCpuLocalApicInTable Index Bufferflow\n"));
+ ASSERT_EFI_ERROR(EFI_INVALID_PARAMETER);
+ }
+
+ TempVal = mCpuApicIdOrderTable[Index].ApicId;
+ mCpuApicIdOrderTable[Index].ApicId = mCpuApicIdOrderTable[0].ApicId;
+ mCpuApicIdOrderTable[0].ApicId = TempVal;
+ mCpuApicIdOrderTable[Index].Flags = mCpuApicIdOrderTable[0].Flags;
+ mCpuApicIdOrderTable[0].Flags = 1;
+ TempVal = mCpuApicIdOrderTable[Index].SwProcApicId;
+ mCpuApicIdOrderTable[Index].SwProcApicId = mCpuApicIdOrderTable[0].SwProcApicId;
+ mCpuApicIdOrderTable[0].SwProcApicId = TempVal;
+ //swap AcpiProcId
+ TempVal = mCpuApicIdOrderTable[Index].AcpiProcessorId;
+ mCpuApicIdOrderTable[Index].AcpiProcessorId = mCpuApicIdOrderTable[0].AcpiProcessorId;
+ mCpuApicIdOrderTable[0].AcpiProcessorId = TempVal;
+
+ }
+
+ //Make sure no holes between enabled threads
+ for(CurrProcessor = 0; CurrProcessor < MAX_CPU_NUM; CurrProcessor++) {
+
+ if(mCpuApicIdOrderTable[CurrProcessor].Flags == 0) {
+ //make sure disabled entry has ProcId set to FFs
+ mCpuApicIdOrderTable[CurrProcessor].ApicId = (UINT32)-1;
+ mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = (UINT32)-1;
+ mCpuApicIdOrderTable[CurrProcessor].SwProcApicId = (UINT32)-1;
+
+ for(Index = CurrProcessor+1; Index < MAX_CPU_NUM; Index++) {
+ if(mCpuApicIdOrderTable[Index].Flags == 1) {
+ //move enabled entry up
+ mCpuApicIdOrderTable[CurrProcessor].Flags = 1;
+ mCpuApicIdOrderTable[CurrProcessor].ApicId = mCpuApicIdOrderTable[Index].ApicId;
+ mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = mCpuApicIdOrderTable[Index].AcpiProcessorId;
+ mCpuApicIdOrderTable[CurrProcessor].SwProcApicId = mCpuApicIdOrderTable[Index].SwProcApicId;
+ mCpuApicIdOrderTable[CurrProcessor].SocketNum = mCpuApicIdOrderTable[Index].SocketNum;
+ //disable moved entry
+ mCpuApicIdOrderTable[Index].Flags = 0;
+ mCpuApicIdOrderTable[Index].ApicId = (UINT32)-1;
+ mCpuApicIdOrderTable[Index].AcpiProcessorId = (UINT32)-1;
+ mCpuApicIdOrderTable[Index].SwProcApicId = (UINT32)-1;
+ break;
+ }
+ }
+ }
+ }
+
+ //keep for debug purpose
+ DEBUG ((EFI_D_ERROR, "APIC ID Order Table ReOrdered\n"));
+ DebugDisplayReOrderTable();
+
+ mCpuOrderSorted = TRUE;
+ }
+
+ return Status;
+}
+
+
+/** Structure of a sub-structure of the ACPI header.
+
+ This structure contains the type and length fields, which are common to every
+ sub-structure of the ACPI tables. A pointer to any structure can be cast as this.
+**/
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+} STRUCTURE_HEADER;
+
+STRUCTURE_HEADER mMadtStructureTable[] = {
+ {EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC, sizeof (EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_STRUCTURE)},
+ {EFI_ACPI_4_0_IO_APIC, sizeof (EFI_ACPI_4_0_IO_APIC_STRUCTURE)},
+ {EFI_ACPI_4_0_INTERRUPT_SOURCE_OVERRIDE, sizeof (EFI_ACPI_4_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE)},
+ {EFI_ACPI_4_0_NON_MASKABLE_INTERRUPT_SOURCE, sizeof (EFI_ACPI_4_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE)},
+ {EFI_ACPI_4_0_LOCAL_APIC_NMI, sizeof (EFI_ACPI_4_0_LOCAL_APIC_NMI_STRUCTURE)},
+ {EFI_ACPI_4_0_LOCAL_APIC_ADDRESS_OVERRIDE, sizeof (EFI_ACPI_4_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE)},
+ {EFI_ACPI_4_0_IO_SAPIC, sizeof (EFI_ACPI_4_0_IO_SAPIC_STRUCTURE)},
+ {EFI_ACPI_4_0_LOCAL_SAPIC, sizeof (EFI_ACPI_4_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE)},
+ {EFI_ACPI_4_0_PLATFORM_INTERRUPT_SOURCES, sizeof (EFI_ACPI_4_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE)},
+ {EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC, sizeof (EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE)},
+ {EFI_ACPI_4_0_LOCAL_X2APIC_NMI, sizeof (EFI_ACPI_4_0_LOCAL_X2APIC_NMI_STRUCTURE)}
+};
+
+/**
+ Get the size of the ACPI table.
+
+ This function calculates the size needed for the ACPI Table based on the number and
+ size of the sub-structures that will compose it.
+
+ @param[in] TableSpecificHdrLength Size of the table specific header, not the ACPI standard header size.
+ @param[in] Structures Pointer to an array of sub-structure pointers.
+ @param[in] StructureCount Number of structure pointers in the array.
+
+ @return Total size needed for the ACPI table.
+**/
+UINT32
+GetTableSize (
+ IN UINTN TableSpecificHdrLength,
+ IN STRUCTURE_HEADER **Structures,
+ IN UINTN StructureCount
+ )
+{
+ UINT32 TableLength;
+ UINT32 Index;
+
+ //
+ // Compute size of the ACPI table; header plus all structures needed.
+ //
+ TableLength = (UINT32) TableSpecificHdrLength;
+
+ for (Index = 0; Index < StructureCount; Index++) {
+ ASSERT (Structures[Index] != NULL);
+ if (Structures[Index] == NULL) {
+ return 0;
+ }
+
+ TableLength += Structures[Index]->Length;
+ }
+
+ return TableLength;
+}
+
+/**
+ Allocate the ACPI Table.
+
+ This function allocates space for the ACPI table based on the number and size of
+ the sub-structures that will compose it.
+
+ @param[in] TableSpecificHdrLength Size of the table specific header, not the ACPI standard header size.
+ @param[in] Structures Pointer to an array of sub-structure pointers.
+ @param[in] StructureCount Number of structure pointers in the array.
+ @param[out] Table Newly allocated ACPI Table pointer.
+
+ @retval EFI_SUCCESS Successfully allocated the Table.
+ @retval EFI_OUT_OF_RESOURCES Space for the Table could not be allocated.
+**/
+EFI_STATUS
+AllocateTable (
+ IN UINTN TableSpecificHdrLength,
+ IN STRUCTURE_HEADER **Structures,
+ IN UINTN StructureCount,
+ OUT EFI_ACPI_DESCRIPTION_HEADER **Table
+ )
+{
+ EFI_STATUS Status;
+ UINT32 Size;
+ EFI_ACPI_DESCRIPTION_HEADER *InternalTable;
+
+ //
+ // Get the size of the ACPI table and allocate memory.
+ //
+ Size = GetTableSize (TableSpecificHdrLength, Structures, StructureCount);
+ InternalTable = (EFI_ACPI_DESCRIPTION_HEADER *) AllocatePool (Size);
+
+ if (InternalTable == NULL) {
+ Status = EFI_OUT_OF_RESOURCES;
+ DEBUG ((
+ DEBUG_ERROR,
+ "Failed to allocate %d bytes for ACPI Table\n",
+ Size
+ ));
+ } else {
+ Status = EFI_SUCCESS;
+ DEBUG ((
+ DEBUG_INFO,
+ "Successfully allocated %d bytes for ACPI Table at 0x%p\n",
+ Size,
+ InternalTable
+ ));
+ *Table = InternalTable;
+ }
+
+ return Status;
+}
+
+/**
+ Initialize the header.
+
+ This function fills in the standard table header with correct values,
+ except for the length and checksum fields, which are filled in later.
+
+ @param[in,out] Header Pointer to the header structure.
+
+ @retval EFI_SUCCESS Successfully initialized the header.
+ @retval EFI_INVALID_PARAMETER Pointer parameter was null.
+**/
+EFI_STATUS
+InitializeHeader (
+ IN OUT EFI_ACPI_DESCRIPTION_HEADER *Header,
+ IN UINT32 Signature,
+ IN UINT8 Revision,
+ IN UINT32 OemRevision
+ )
+{
+ UINT64 AcpiTableOemId;
+
+ if (Header == NULL) {
+ DEBUG ((DEBUG_ERROR, "Header pointer is NULL\n"));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Header->Signature = Signature;
+ Header->Length = 0; // filled in by Build function
+ Header->Revision = Revision;
+ Header->Checksum = 0; // filled in by InstallAcpiTable
+
+ CopyMem (
+ (VOID *) &Header->OemId,
+ PcdGetPtr (PcdAcpiDefaultOemId),
+ sizeof (Header->OemId)
+ );
+
+ AcpiTableOemId = PcdGet64 (PcdAcpiDefaultOemTableId);
+ CopyMem (
+ (VOID *) &Header->OemTableId,
+ (VOID *) &AcpiTableOemId,
+ sizeof (Header->OemTableId)
+ );
+
+ Header->OemRevision = OemRevision;
+ Header->CreatorId = 0;
+ Header->CreatorRevision = 0;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Initialize the MADT header.
+
+ This function fills in the MADT's standard table header with correct values,
+ except for the length and checksum fields, which are filled in later.
+
+ @param[in,out] MadtHeader Pointer to the MADT header structure.
+
+ @retval EFI_SUCCESS Successfully initialized the MADT header.
+ @retval EFI_INVALID_PARAMETER Pointer parameter was null.
+**/
+EFI_STATUS
+InitializeMadtHeader (
+ IN OUT EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *MadtHeader
+ )
+{
+ EFI_STATUS Status;
+
+ if (MadtHeader == NULL) {
+ DEBUG ((DEBUG_ERROR, "MADT header pointer is NULL\n"));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Status = InitializeHeader (
+ &MadtHeader->Header,
+ EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION,
+ 0
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ MadtHeader->LocalApicAddress = PcdGet32(PcdLocalApicAddress);
+ MadtHeader->Flags = EFI_ACPI_4_0_PCAT_COMPAT;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Copy an ACPI sub-structure; MADT and SRAT supported
+
+ This function validates the structure type and size of a sub-structure
+ and returns a newly allocated copy of it.
+
+ @param[in] Header Pointer to the header of the table.
+ @param[in] Structure Pointer to the structure to copy.
+ @param[in] NewStructure Newly allocated copy of the structure.
+
+ @retval EFI_SUCCESS Successfully copied the structure.
+ @retval EFI_INVALID_PARAMETER Pointer parameter was null.
+ @retval EFI_INVALID_PARAMETER Structure type was unknown.
+ @retval EFI_INVALID_PARAMETER Structure length was wrong for its type.
+ @retval EFI_UNSUPPORTED Header passed in is not supported.
+**/
+EFI_STATUS
+CopyStructure (
+ IN EFI_ACPI_DESCRIPTION_HEADER *Header,
+ IN STRUCTURE_HEADER *Structure,
+ OUT STRUCTURE_HEADER **NewStructure
+ )
+{
+ STRUCTURE_HEADER *NewStructureInternal;
+ STRUCTURE_HEADER *StructureTable;
+ UINTN TableNumEntries;
+ BOOLEAN EntryFound;
+ UINT8 Index;
+
+ //
+ // Initialize the number of table entries and the table based on the table header passed in.
+ //
+ if (Header->Signature == EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) {
+ TableNumEntries = sizeof (mMadtStructureTable) / sizeof (STRUCTURE_HEADER);
+ StructureTable = mMadtStructureTable;
+ } else {
+ return EFI_UNSUPPORTED;
}
- return TRUE;
+
+ //
+ // Check the incoming structure against the table of supported structures.
+ //
+ EntryFound = FALSE;
+ for (Index = 0; Index < TableNumEntries; Index++) {
+ if (Structure->Type == StructureTable[Index].Type) {
+ if (Structure->Length == StructureTable[Index].Length) {
+ EntryFound = TRUE;
+ } else {
+ DEBUG ((
+ DEBUG_ERROR,
+ "Invalid length for structure type %d: expected %d, actually %d\n",
+ Structure->Type,
+ StructureTable[Index].Length,
+ Structure->Length
+ ));
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+ }
+
+ //
+ // If no entry in the table matches the structure type and length passed in
+ // then return invalid parameter.
+ //
+ if (!EntryFound) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "Unknown structure type: %d\n",
+ Structure->Type
+ ));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ NewStructureInternal = (STRUCTURE_HEADER *) AllocatePool (Structure->Length);
+ if (NewStructureInternal == NULL) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "Failed to allocate %d bytes for type %d structure\n",
+ Structure->Length,
+ Structure->Type
+ ));
+ return EFI_OUT_OF_RESOURCES;
+ } else {
+ DEBUG ((
+ DEBUG_INFO,
+ "Successfully allocated %d bytes for type %d structure at 0x%p\n",
+ Structure->Length,
+ Structure->Type,
+ NewStructureInternal
+ ));
+ }
+
+ CopyMem (
+ (VOID *) NewStructureInternal,
+ (VOID *) Structure,
+ Structure->Length
+ );
+
+ *NewStructure = NewStructureInternal;
+ return EFI_SUCCESS;
+}
+
+/**
+ Build ACPI Table. MADT tables supported.
+
+ This function builds the ACPI table from the header plus the list of sub-structures
+ passed in. The table returned by this function is ready to be installed using
+ the ACPI table protocol's InstallAcpiTable function, which copies it into
+ ACPI memory. After that, the caller should free the memory returned by this
+ function.
+
+ @param[in] AcpiHeader Pointer to the header structure.
+ @param[in] TableSpecificHdrLength Size of the table specific header, not the ACPI standard header size.
+ @param[in] Structures Pointer to an array of sub-structure pointers.
+ @param[in] StructureCount Number of structure pointers in the array.
+ @param[out] NewTable Newly allocated and initialized pointer to the ACPI Table.
+
+ @retval EFI_SUCCESS Successfully built the ACPI table.
+ @retval EFI_INVALID_PARAMETER Pointer parameter was null.
+ @retval EFI_INVALID_PARAMETER Header parameter had the wrong signature.
+ @retval EFI_OUT_OF_RESOURCES Space for the ACPI Table could not be allocated.
+**/
+EFI_STATUS
+BuildAcpiTable (
+ IN EFI_ACPI_DESCRIPTION_HEADER *AcpiHeader,
+ IN UINTN TableSpecificHdrLength,
+ IN STRUCTURE_HEADER **Structures,
+ IN UINTN StructureCount,
+ OUT UINT8 **NewTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_ACPI_DESCRIPTION_HEADER *InternalTable;
+ UINTN Index;
+ UINT8 *CurrPtr;
+ UINT8 *EndOfTablePtr;
+
+ if (AcpiHeader == NULL) {
+ DEBUG ((DEBUG_ERROR, "AcpiHeader pointer is NULL\n"));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (AcpiHeader->Signature != EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "MADT header signature is expected, actually 0x%08x\n",
+ AcpiHeader->Signature
+ ));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (Structures == NULL) {
+ DEBUG ((DEBUG_ERROR, "Structure array pointer is NULL\n"));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for (Index = 0; Index < StructureCount; Index++) {
+ if (Structures[Index] == NULL) {
+ DEBUG ((DEBUG_ERROR, "Structure pointer %d is NULL\n", Index));
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+
+ //
+ // Allocate the memory needed for the table.
+ //
+ Status = AllocateTable (
+ TableSpecificHdrLength,
+ Structures,
+ StructureCount,
+ &InternalTable
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ //
+ // Copy Header and patch in structure length, checksum is programmed later
+ // after all structures are populated.
+ //
+ CopyMem (
+ (VOID *) InternalTable,
+ (VOID *) AcpiHeader,
+ TableSpecificHdrLength
+ );
+
+ InternalTable->Length = GetTableSize (TableSpecificHdrLength, Structures, StructureCount);
+
+ //
+ // Copy all the sub structures to the table.
+ //
+ CurrPtr = ((UINT8 *) InternalTable) + TableSpecificHdrLength;
+ EndOfTablePtr = ((UINT8 *) InternalTable) + InternalTable->Length;
+
+ for (Index = 0; Index < StructureCount; Index++) {
+ ASSERT (Structures[Index] != NULL);
+ if (Structures[Index] == NULL) {
+ break;
+ }
+
+ CopyMem (
+ (VOID *) CurrPtr,
+ (VOID *) Structures[Index],
+ Structures[Index]->Length
+ );
+
+ CurrPtr += Structures[Index]->Length;
+ ASSERT (CurrPtr <= EndOfTablePtr);
+ if (CurrPtr > EndOfTablePtr) {
+ break;
+ }
+ }
+
+ //
+ // Update the return pointer.
+ //
+ *NewTable = (UINT8 *) InternalTable;
+ return EFI_SUCCESS;
+}
+
+/**
+ Build from scratch and install the MADT.
+
+ @retval EFI_SUCCESS The MADT was installed successfully.
+ @retval EFI_OUT_OF_RESOURCES Could not allocate required structures.
+**/
+EFI_STATUS
+InstallMadtFromScratch (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINTN Index;
+ EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *NewMadtTable;
+ UINTN TableHandle;
+ EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER MadtTableHeader;
+ EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_STRUCTURE ProcLocalApicStruct;
+ EFI_ACPI_4_0_IO_APIC_STRUCTURE IoApicStruct;
+ EFI_ACPI_4_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE IntSrcOverrideStruct;
+ EFI_ACPI_4_0_LOCAL_APIC_NMI_STRUCTURE LocalApciNmiStruct;
+ EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE ProcLocalX2ApicStruct;
+ EFI_ACPI_4_0_LOCAL_X2APIC_NMI_STRUCTURE LocalX2ApicNmiStruct;
+ STRUCTURE_HEADER **MadtStructs;
+ UINTN MaxMadtStructCount;
+ UINTN MadtStructsIndex;
+ UINT32 CurrentIoApicAddress = (UINT32)(PcdGet32(PcdPcIoApicAddressBase));
+ UINT32 PcIoApicEnable;
+ UINT32 PcIoApicMask;
+ UINTN PcIoApicIndex;
+
+ DetectApicIdMap();
+
+ // Call for Local APIC ID Reorder
+ SortCpuLocalApicInTable ();
+
+ NewMadtTable = NULL;
+
+ MaxMadtStructCount = (UINT32) (
+ MAX_CPU_NUM + // processor local APIC structures
+ MAX_CPU_NUM + // processor local x2APIC structures
+ 1 + PcdGet8(PcdPcIoApicCount) + // I/O APIC structures
+ 2 + // interrupt source override structures
+ 1 + // local APIC NMI structures
+ 1 // local x2APIC NMI structures
+ ); // other structures are not used
+
+ MadtStructs = (STRUCTURE_HEADER **) AllocateZeroPool (MaxMadtStructCount * sizeof (STRUCTURE_HEADER *));
+ if (MadtStructs == NULL) {
+ DEBUG ((DEBUG_ERROR, "Could not allocate MADT structure pointer array\n"));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // Initialize the next index into the structure pointer array. It is
+ // incremented every time a structure of any type is copied to the array.
+ //
+ MadtStructsIndex = 0;
+
+ //
+ // Initialize MADT Header Structure
+ //
+ Status = InitializeMadtHeader (&MadtTableHeader);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "InitializeMadtHeader failed: %r\n", Status));
+ goto Done;
+ }
+
+ DEBUG ((EFI_D_INFO, "Number of CPUs detected = %d \n", mNumberOfCPUs));
+
+ //
+ // Build Processor Local APIC Structures and Processor Local X2APIC Structures
+ //
+ ProcLocalApicStruct.Type = EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC;
+ ProcLocalApicStruct.Length = sizeof (EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_STRUCTURE);
+
+ ProcLocalX2ApicStruct.Type = EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC;
+ ProcLocalX2ApicStruct.Length = sizeof (EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE);
+ ProcLocalX2ApicStruct.Reserved[0] = 0;
+ ProcLocalX2ApicStruct.Reserved[1] = 0;
+
+ for (Index = 0; Index < MAX_CPU_NUM; Index++) {
+ //
+ // If x2APIC mode is not enabled, and if it is possible to express the
+ // APIC ID as a UINT8, use a processor local APIC structure. Otherwise,
+ // use a processor local x2APIC structure.
+ //
+ if (!mX2ApicEnabled && mCpuApicIdOrderTable[Index].ApicId < MAX_UINT8) {
+ ProcLocalApicStruct.Flags = (UINT8) mCpuApicIdOrderTable[Index].Flags;
+ ProcLocalApicStruct.ApicId = (UINT8) mCpuApicIdOrderTable[Index].ApicId;
+ ProcLocalApicStruct.AcpiProcessorId = (UINT8) mCpuApicIdOrderTable[Index].AcpiProcessorId;
+
+ ASSERT (MadtStructsIndex < MaxMadtStructCount);
+ Status = CopyStructure (
+ &MadtTableHeader.Header,
+ (STRUCTURE_HEADER *) &ProcLocalApicStruct,
+ &MadtStructs[MadtStructsIndex++]
+ );
+ } else if (mCpuApicIdOrderTable[Index].ApicId != 0xFFFFFFFF) {
+ ProcLocalX2ApicStruct.Flags = (UINT8) mCpuApicIdOrderTable[Index].Flags;
+ ProcLocalX2ApicStruct.X2ApicId = mCpuApicIdOrderTable[Index].ApicId;
+ ProcLocalX2ApicStruct.AcpiProcessorUid = mCpuApicIdOrderTable[Index].AcpiProcessorId;
+
+ ASSERT (MadtStructsIndex < MaxMadtStructCount);
+ Status = CopyStructure (
+ &MadtTableHeader.Header,
+ (STRUCTURE_HEADER *) &ProcLocalX2ApicStruct,
+ &MadtStructs[MadtStructsIndex++]
+ );
+ }
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "CopyMadtStructure (local APIC/x2APIC) failed: %r\n", Status));
+ goto Done;
+ }
+ }
+
+ //
+ // Build I/O APIC Structures
+ //
+ IoApicStruct.Type = EFI_ACPI_4_0_IO_APIC;
+ IoApicStruct.Length = sizeof (EFI_ACPI_4_0_IO_APIC_STRUCTURE);
+ IoApicStruct.Reserved = 0;
+
+ PcIoApicEnable = PcdGet32(PcdPcIoApicEnable);
+
+ if (FixedPcdGet32(PcdMaxCpuSocketCount) <= 4) {
+ IoApicStruct.IoApicId = PcdGet8(PcdIoApicId);
+ IoApicStruct.IoApicAddress = PcdGet32(PcdIoApicAddress);
+ IoApicStruct.GlobalSystemInterruptBase = 0;
+ ASSERT (MadtStructsIndex < MaxMadtStructCount);
+ Status = CopyStructure (
+ &MadtTableHeader.Header,
+ (STRUCTURE_HEADER *) &IoApicStruct,
+ &MadtStructs[MadtStructsIndex++]
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status));
+ goto Done;
+ }
+ }
+
+ for (PcIoApicIndex = 0; PcIoApicIndex < PcdGet8(PcdPcIoApicCount); PcIoApicIndex++) {
+ PcIoApicMask = (1 << PcIoApicIndex);
+ if ((PcIoApicEnable & PcIoApicMask) == 0) {
+ continue;
+ }
+
+ IoApicStruct.IoApicId = (UINT8)(PcdGet8(PcdPcIoApicIdBase) + PcIoApicIndex);
+ IoApicStruct.IoApicAddress = CurrentIoApicAddress;
+ CurrentIoApicAddress = (CurrentIoApicAddress & 0xFFFF8000) + 0x8000;
+ IoApicStruct.GlobalSystemInterruptBase = (UINT32)(24 + (PcIoApicIndex * 8));
+ ASSERT (MadtStructsIndex < MaxMadtStructCount);
+ Status = CopyStructure (
+ &MadtTableHeader.Header,
+ (STRUCTURE_HEADER *) &IoApicStruct,
+ &MadtStructs[MadtStructsIndex++]
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status));
+ goto Done;
+ }
+ }
+
+ //
+ // Build Interrupt Source Override Structures
+ //
+ IntSrcOverrideStruct.Type = EFI_ACPI_4_0_INTERRUPT_SOURCE_OVERRIDE;
+ IntSrcOverrideStruct.Length = sizeof (EFI_ACPI_4_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE);
+
+ //
+ // IRQ0=>IRQ2 Interrupt Source Override Structure
+ //
+ IntSrcOverrideStruct.Bus = 0x0; // Bus - ISA
+ IntSrcOverrideStruct.Source = 0x0; // Source - IRQ0
+ IntSrcOverrideStruct.GlobalSystemInterrupt = 0x2; // Global System Interrupt - IRQ2
+ IntSrcOverrideStruct.Flags = 0x0; // Flags - Conforms to specifications of the bus
+
+ ASSERT (MadtStructsIndex < MaxMadtStructCount);
+ Status = CopyStructure (
+ &MadtTableHeader.Header,
+ (STRUCTURE_HEADER *) &IntSrcOverrideStruct,
+ &MadtStructs[MadtStructsIndex++]
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "CopyMadtStructure (IRQ2 source override) failed: %r\n", Status));
+ goto Done;
+ }
+
+ //
+ // IRQ9 (SCI Active High) Interrupt Source Override Structure
+ //
+ IntSrcOverrideStruct.Bus = 0x0; // Bus - ISA
+ IntSrcOverrideStruct.Source = 0x9; // Source - IRQ9
+ IntSrcOverrideStruct.GlobalSystemInterrupt = 0x9; // Global System Interrupt - IRQ9
+ IntSrcOverrideStruct.Flags = 0xD; // Flags - Level-tiggered, Active High
+
+ ASSERT (MadtStructsIndex < MaxMadtStructCount);
+ Status = CopyStructure (
+ &MadtTableHeader.Header,
+ (STRUCTURE_HEADER *) &IntSrcOverrideStruct,
+ &MadtStructs[MadtStructsIndex++]
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "CopyMadtStructure (IRQ9 source override) failed: %r\n", Status));
+ goto Done;
+ }
+
+ //
+ // Build Local APIC NMI Structures
+ //
+ LocalApciNmiStruct.Type = EFI_ACPI_4_0_LOCAL_APIC_NMI;
+ LocalApciNmiStruct.Length = sizeof (EFI_ACPI_4_0_LOCAL_APIC_NMI_STRUCTURE);
+ LocalApciNmiStruct.AcpiProcessorId = 0xFF; // Applies to all processors
+ LocalApciNmiStruct.Flags = 0x000D; // Flags - Level-tiggered, Active High
+ LocalApciNmiStruct.LocalApicLint = 0x1;
+
+ ASSERT (MadtStructsIndex < MaxMadtStructCount);
+ Status = CopyStructure (
+ &MadtTableHeader.Header,
+ (STRUCTURE_HEADER *) &LocalApciNmiStruct,
+ &MadtStructs[MadtStructsIndex++]
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "CopyMadtStructure (APIC NMI) failed: %r\n", Status));
+ goto Done;
+ }
+
+ //
+ // Build Local x2APIC NMI Structure
+ //
+ LocalX2ApicNmiStruct.Type = EFI_ACPI_4_0_LOCAL_X2APIC_NMI;
+ LocalX2ApicNmiStruct.Length = sizeof (EFI_ACPI_4_0_LOCAL_X2APIC_NMI_STRUCTURE);
+ LocalX2ApicNmiStruct.Flags = 0x000D; // Flags - Level-tiggered, Active High
+ LocalX2ApicNmiStruct.AcpiProcessorUid = 0xFFFFFFFF; // Applies to all processors
+ LocalX2ApicNmiStruct.LocalX2ApicLint = 0x01;
+ LocalX2ApicNmiStruct.Reserved[0] = 0x00;
+ LocalX2ApicNmiStruct.Reserved[1] = 0x00;
+ LocalX2ApicNmiStruct.Reserved[2] = 0x00;
+
+ ASSERT (MadtStructsIndex < MaxMadtStructCount);
+ Status = CopyStructure (
+ &MadtTableHeader.Header,
+ (STRUCTURE_HEADER *) &LocalX2ApicNmiStruct,
+ &MadtStructs[MadtStructsIndex++]
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "CopyMadtStructure (x2APIC NMI) failed: %r\n", Status));
+ goto Done;
+ }
+
+ //
+ // Build Madt Structure from the Madt Header and collection of pointers in MadtStructs[]
+ //
+ Status = BuildAcpiTable (
+ (EFI_ACPI_DESCRIPTION_HEADER *) &MadtTableHeader,
+ sizeof (EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER),
+ MadtStructs,
+ MadtStructsIndex,
+ (UINT8 **)&NewMadtTable
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "BuildAcpiTable failed: %r\n", Status));
+ goto Done;
+ }
+
+ //
+ // Publish Madt Structure to ACPI
+ //
+ Status = mAcpiTable->InstallAcpiTable (
+ mAcpiTable,
+ NewMadtTable,
+ NewMadtTable->Header.Length,
+ &TableHandle
+ );
+
+Done:
+ //
+ // Free memory
+ //
+ for (MadtStructsIndex = 0; MadtStructsIndex < MaxMadtStructCount; MadtStructsIndex++) {
+ if (MadtStructs[MadtStructsIndex] != NULL) {
+ FreePool (MadtStructs[MadtStructsIndex]);
+ }
+ }
+
+ FreePool (MadtStructs);
+
+ if (NewMadtTable != NULL) {
+ FreePool (NewMadtTable);
+ }
+
+ return Status;
+}
+
+EFI_STATUS
+InstallMcfgFromScratch (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER *McfgTable;
+ EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *Segment;
+ UINTN Index;
+ UINTN SegmentCount;
+ PCI_SEGMENT_INFO *PciSegmentInfo;
+ UINTN TableHandle;
+
+ PciSegmentInfo = GetPciSegmentInfo (&SegmentCount);
+
+ McfgTable = AllocateZeroPool (
+ sizeof(EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER) +
+ sizeof(EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE) * SegmentCount
+ );
+ if (McfgTable == NULL) {
+ DEBUG ((DEBUG_ERROR, "Could not allocate MCFG structure\n"));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ Status = InitializeHeader (
+ &McfgTable->Header,
+ EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION,
+ 0
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ //
+ // Set MCFG table "Length" field based on the number of PCIe segments enumerated so far
+ //
+ McfgTable->Header.Length = (UINT32)(sizeof (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER) +
+ sizeof (EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE) * SegmentCount);
+
+ Segment = (VOID *)(McfgTable + 1);
+
+ for (Index = 0; Index < SegmentCount; Index++) {
+ Segment[Index].PciSegmentGroupNumber = PciSegmentInfo[Index].SegmentNumber;
+ Segment[Index].BaseAddress = PciSegmentInfo[Index].BaseAddress;
+ Segment[Index].StartBusNumber = PciSegmentInfo[Index].StartBusNumber;
+ Segment[Index].EndBusNumber = PciSegmentInfo[Index].EndBusNumber;
+ }
+
+ //
+ // Publish Madt Structure to ACPI
+ //
+ Status = mAcpiTable->InstallAcpiTable (
+ mAcpiTable,
+ McfgTable,
+ McfgTable->Header.Length,
+ &TableHandle
+ );
+
+ return Status;
}
/**
@@ -78,25 +1215,17 @@ PlatformUpdateTables ( IN OUT EFI_ACPI_TABLE_VERSION *Version
)
{
- EFI_ACPI_DESCRIPTION_HEADER *TableHeader;
- UINT8 *CurrPtr;
- UINT8 *EndPtr;
- EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE *ApicPtr;
- EFI_STATUS Status;
- EFI_MP_SERVICES_PROTOCOL *MpService;
- UINTN NumberOfCPUs;
- UINTN NumberOfEnabledCPUs;
- UINT32 HpetBaseAdress;
- UINT8 LocalApicCounter;
-
- CurrPtr = NULL;
- EndPtr = NULL;
- ApicPtr = NULL;
- NumberOfCPUs = 1;
- LocalApicCounter = 0;
-
+ EFI_ACPI_DESCRIPTION_HEADER *TableHeader;
+ UINT8 *TempOemId;
+ UINT64 TempOemTableId;
+ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *FadtHeader;
+ EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_HEADER *HpetTable;
+
+ TableHeader = NULL;
+
//
- // This will be accurate except for FACS structure
+ // By default, a table belongs in all ACPI table versions published.
+ // Some tables will override this because they have different versions of the table.
//
TableHeader = (EFI_ACPI_DESCRIPTION_HEADER *) Table;
@@ -104,8 +1233,8 @@ PlatformUpdateTables ( // Update the OEM and creator information for every table except FACS.
//
if (Table->Signature != EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) {
- *(UINT32 *) (TableHeader->OemId) = 'I' + ('N' << 8) + ('T' << 16) + ('E' << 24);
- *(UINT16 *) (TableHeader->OemId + 4) = 'L' + (' ' << 8);
+ TempOemId = (UINT8 *)PcdGetPtr(PcdAcpiDefaultOemId);
+ CopyMem (&TableHeader->OemId, TempOemId, 6);
//
// Skip OEM table ID and creator information for DSDT, SSDT and PSDT tables, since these are
@@ -115,39 +1244,21 @@ PlatformUpdateTables ( Table->Signature != EFI_ACPI_1_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE &&
Table->Signature != EFI_ACPI_1_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE
) {
+ TempOemTableId = PcdGet64(PcdAcpiDefaultOemTableId);
+ CopyMem (&TableHeader->OemTableId, &TempOemTableId, 8);
//
- // Update OEM table ID
+ // Update the creator ID
//
- // Check if the silicon is KBL
- TableHeader->OemTableId = PcdGet64 (PcdAcpiDefaultOemTableId);
+ TableHeader->CreatorId = PcdGet32(PcdAcpiDefaultCreatorId);
+
//
- // Update creator information
+ // Update the creator revision
//
- TableHeader->CreatorId = EFI_ACPI_CREATOR_ID;
- TableHeader->CreatorRevision = EFI_ACPI_CREATOR_REVISION;
+ TableHeader->CreatorRevision = PcdGet32(PcdAcpiDefaultCreatorRevision);
}
}
- //
- // Locate the MP services protocol
- // Find the MP Protocol. This is an MP platform, so MP protocol must be there.
- //
- Status = gBS->LocateProtocol (
- &gEfiMpServiceProtocolGuid,
- NULL,
- (VOID **) &MpService
- );
- ASSERT_EFI_ERROR (Status);
-
- //
- // Determine the number of processors
- //
- MpService->GetNumberOfProcessors (
- MpService,
- &NumberOfCPUs,
- &NumberOfEnabledCPUs
- );
//
// By default, a table belongs in all ACPI table versions published.
@@ -160,158 +1271,69 @@ PlatformUpdateTables ( //
switch (Table->Signature) {
- case EFI_ACPI_1_0_APIC_SIGNATURE:
- //
- // if not MP and not APIC then don't publish the APIC tables.
- //
-
- //
- // Call for Local APIC ID Reorder
- //
- SortCpuLocalApicInTable (
- MpService,
- NumberOfCPUs,
- NumberOfEnabledCPUs
- );
-
- CurrPtr = (UINT8 *) &((EFI_ACPI_DESCRIPTION_HEADER *) Table)[1];
- CurrPtr = CurrPtr + 8;
- //
- // Size of Local APIC Address & Flag
- //
- EndPtr = (UINT8 *) Table;
- EndPtr = EndPtr + Table->Length;
-
- while (CurrPtr < EndPtr) {
- ApicPtr = (EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE *) CurrPtr;
-
- //
- // Check table entry type
- //
- if (ApicPtr->Type == EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC) {
- AppendCpuMapTableEntry (
- ApicPtr,
- NumberOfCPUs,
- NumberOfEnabledCPUs,
- LocalApicCounter
- );
- LocalApicCounter++;
- }
-
- //
- // Go to the next structure in the APIC table
- //
- CurrPtr = CurrPtr + ApicPtr->Length;
- }
+ case EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE:
+ ASSERT(FALSE);
break;
case EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE:
- //
- // Fix up all FACP Table values if configuration requires it.
- // This code fixes up the following Table values:
- // (1) C2/C3/CST Enable FACP values
- // (2) RTC S4 Flag
- //
- {
- EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *FadtPointer;
-
- FadtPointer = (EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *) Table;
-
- //
- // Check the version of the table
- //
- *Version = EFI_ACPI_TABLE_VERSION_NONE;
- if (FadtPointer->Header.Revision == EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION) {
- *Version = EFI_ACPI_TABLE_VERSION_NONE;
- } else if (FadtPointer->Header.Revision == EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION) {
- *Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0;
- } else if (FadtPointer->Header.Revision == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION) {
- *Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_3_0;
- } else if (FadtPointer->Header.Revision == EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION) {
- *Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_5_0;
- }
-
- //
- // Modify Preferred_PM_Profile field based on Board SKU's. Default is set to Mobile
- //
- FadtPointer->PreferredPmProfile = PcdGet8 (PcdPreferredPmProfile);
-
- //
- // if Native ASPM is disabled, set FACP table to skip Native ASPM
- //
- if (!IsNativeAspmSupported ()) {
- FadtPointer->IaPcBootArch |= 0x10;
- }
-
- //
- //PME WAKE supported, set PCI_EXP_WAK, BIT14 of Fixed feature flags.
- //
- FadtPointer->Flags |= (EFI_ACPI_6_0_PCI_EXP_WAK);
-
- if (PcdGet8 (PcdLowPowerS0Idle)) {
- // The Flags field within the FADT (offset 112)
- // 1) will have a new Low Power S0 Idle Capable ACPI flag (bit offset 21).
- FadtPointer->Flags = (BIT21 | FadtPointer->Flags);
- //Only passive docking available in Conected Standby mode. Clear Docking capability Bit
- FadtPointer->Flags &= ~BIT9;
- }
- //
- // Modify FADT Fixed Feature Flag to support 10 sec Power button.
- // If 10sec Power button is enabled: Set PWR_BUTTON(bit4) in Fixed Feature Flag(FACP offset 112)
- //
- if ((PcdGet8 (PcdLowPowerS0Idle) == 1) || (PcdGet8 (PcdTenSecondPowerButtonEnable) == 1)) {
- FadtPointer->Flags |= EFI_ACPI_2_0_PWR_BUTTON; // Set Fixed Power Button flag (Disabling Fixed Power button and enabling Control Method PB)
- } else {
- FadtPointer->Flags &= ~(EFI_ACPI_2_0_PWR_BUTTON); // Clear fixed Power Button flag, means enable Power Button as Fixed PB
- }
-
- //
- // 1. set header revision.
- //
- FadtPointer->Header.Revision = EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION;
-
- //
- // 2. set all GAR register AccessSize to valid value.
- //
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->ResetReg.AccessSize = EFI_ACPI_5_0_BYTE;
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->XPm1aEvtBlk.AccessSize = EFI_ACPI_5_0_WORD;
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->XPm1bEvtBlk.AccessSize = EFI_ACPI_5_0_WORD;
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->XPm1aCntBlk.AccessSize = EFI_ACPI_5_0_WORD;
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->XPm1bCntBlk.AccessSize = EFI_ACPI_5_0_WORD;
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->XPm2CntBlk.AccessSize = EFI_ACPI_5_0_BYTE;
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->XPmTmrBlk.AccessSize = EFI_ACPI_5_0_DWORD;
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->XGpe0Blk.AccessSize = EFI_ACPI_5_0_BYTE;
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->XGpe1Blk.AccessSize = EFI_ACPI_5_0_BYTE;
-
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepControlReg.AddressSpaceId = 0x1;
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepControlReg.RegisterBitWidth = 0x8;
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepControlReg.RegisterBitOffset = 0;
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepControlReg.AccessSize = EFI_ACPI_5_0_DWORD;
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepControlReg.Address = EFI_ACPI_PM1A_EVT_BLK_ADDRESS + 4;
-
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepStatusReg.AddressSpaceId = 0x1;
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepStatusReg.RegisterBitWidth = 0x8;
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepStatusReg.RegisterBitOffset = 0;
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepStatusReg.AccessSize = EFI_ACPI_5_0_DWORD;
- ((EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepStatusReg.Address = EFI_ACPI_PM1A_EVT_BLK_ADDRESS;
-
+ FadtHeader = (EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *) Table;
+
+ FadtHeader->PreferredPmProfile = PcdGet8 (PcdFadtPreferredPmProfile);
+ FadtHeader->IaPcBootArch = PcdGet16 (PcdFadtIaPcBootArch);
+ FadtHeader->Flags = PcdGet32 (PcdFadtFlags);
+
+ FadtHeader->AcpiEnable = PcdGet8 (PcdAcpiEnableSwSmi);
+ FadtHeader->AcpiDisable = PcdGet8 (PcdAcpiDisableSwSmi);
+
+ FadtHeader->Pm1aEvtBlk = PcdGet16 (PcdAcpiPm1AEventBlockAddress);
+ FadtHeader->Pm1bEvtBlk = PcdGet16 (PcdAcpiPm1BEventBlockAddress);
+ FadtHeader->Pm1aCntBlk = PcdGet16 (PcdAcpiPm1AControlBlockAddress);
+ FadtHeader->Pm1bCntBlk = PcdGet16 (PcdAcpiPm1BControlBlockAddress);
+ FadtHeader->Pm2CntBlk = PcdGet16 (PcdAcpiPm2ControlBlockAddress);
+ FadtHeader->PmTmrBlk = PcdGet16 (PcdAcpiPmTimerBlockAddress);
+ FadtHeader->Gpe0Blk = PcdGet16 (PcdAcpiGpe0BlockAddress);
+ FadtHeader->Gpe0BlkLen = 0x20;
+ FadtHeader->Gpe1Blk = PcdGet16 (PcdAcpiGpe1BlockAddress);
+
+ FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress);
+ FadtHeader->XPm1bEvtBlk.Address = PcdGet16 (PcdAcpiPm1BEventBlockAddress);
+ if (FadtHeader->XPm1bEvtBlk.Address == 0) {
+ FadtHeader->XPm1bEvtBlk.AccessSize = 0;
+ }
+ FadtHeader->XPm1aCntBlk.Address = PcdGet16 (PcdAcpiPm1AControlBlockAddress);
+ FadtHeader->XPm1bCntBlk.Address = PcdGet16 (PcdAcpiPm1BControlBlockAddress);
+ if (FadtHeader->XPm1bCntBlk.Address == 0) {
+ FadtHeader->XPm1bCntBlk.AccessSize = 0;
+ }
+ FadtHeader->XPm2CntBlk.Address = PcdGet16 (PcdAcpiPm2ControlBlockAddress);
+ //if (FadtHeader->XPm2CntBlk.Address == 0) {
+ FadtHeader->XPm2CntBlk.AccessSize = 0;
+ //}
+ FadtHeader->XPmTmrBlk.Address = PcdGet16 (PcdAcpiPmTimerBlockAddress);
+ FadtHeader->XGpe0Blk.Address = PcdGet16 (PcdAcpiGpe0BlockAddress);
+ FadtHeader->XGpe1Blk.Address = PcdGet16 (PcdAcpiGpe1BlockAddress);
+ if (FadtHeader->XGpe1Blk.Address == 0) {
+ FadtHeader->XGpe1Blk.AccessSize = 0;
}
+
+ DEBUG(( EFI_D_ERROR, "ACPI FADT table @ address 0x%x\n", Table ));
+ DEBUG(( EFI_D_ERROR, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch ));
+ DEBUG(( EFI_D_ERROR, " Flags 0x%x\n", FadtHeader->Flags ));
break;
case EFI_ACPI_3_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE:
- //
- // If HPET is disabled in setup, don't publish the table.
- //
- //
- // Get HPET base address
- //
- HpetBaseAdress = PcdGet32 (PcdHpetBaseAddress);
- //
- // Adjust HPET Table to correct the Base Address
- //
- ((EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_HEADER*) Table)->BaseAddressLower32Bit.Address = HpetBaseAdress;
+ HpetTable = (EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_HEADER *)Table;
+ HpetTable->BaseAddressLower32Bit.Address = PcdGet32 (PcdHpetBaseAddress);
+ HpetTable->BaseAddressLower32Bit.RegisterBitWidth = 0;
+ HpetTable->EventTimerBlockId = PcdGet32 (PcdHpetTimerBlockId);
+ DEBUG(( EFI_D_ERROR, "ACPI HPET table @ address 0x%x\n", Table ));
+ DEBUG(( EFI_D_ERROR, " HPET base 0x%x\n", PcdGet32 (PcdHpetBaseAddress) ));
break;
-
+
+ case EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE:
+ ASSERT(FALSE);
+ break;
+
default:
break;
}
@@ -422,35 +1444,24 @@ UpdateLocalTable ( EFI_ACPI_COMMON_HEADER *CurrentTable;
EFI_ACPI_TABLE_VERSION Version;
UINTN TableHandle;
- EFI_ACPI_TABLE_PROTOCOL *AcpiTable;
UINTN Index;
- Status = gBS->LocateProtocol (
- &gEfiAcpiTableProtocolGuid,
- NULL,
- (VOID **)&AcpiTable
- );
-
for (Index = 0; Index < sizeof(mLocalTable)/sizeof(mLocalTable[0]); Index++) {
CurrentTable = mLocalTable[Index];
- PlatformUpdateTables (CurrentTable, &Version);
+ PlatformUpdateTables (CurrentTable, &Version);
- //
- // Add the table
- //
- TableHandle = 0;
+ TableHandle = 0;
- if (Version != EFI_ACPI_TABLE_VERSION_NONE) {
- Status = AcpiTable->InstallAcpiTable (
- AcpiTable,
+ if (Version != EFI_ACPI_TABLE_VERSION_NONE) {
+ Status = mAcpiTable->InstallAcpiTable (
+ mAcpiTable,
CurrentTable,
CurrentTable->Length,
&TableHandle
);
- }
-
ASSERT_EFI_ERROR (Status);
+ }
}
}
@@ -495,6 +1506,13 @@ InstallAcpiPlatform ( EFI_STATUS Status;
EFI_EVENT EndOfDxeEvent;
+
+ Status = gBS->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, (VOID **)&mMpService);
+ ASSERT_EFI_ERROR (Status);
+
+ Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID **)&mAcpiTable);
+ ASSERT_EFI_ERROR (Status);
+
//
// Create an End of DXE event.
//
@@ -509,227 +1527,29 @@ InstallAcpiPlatform ( ASSERT_EFI_ERROR (Status);
//
- // Update local table
- //
- UpdateLocalTable ();
-
- //
- // Finished
- //
- return EFI_SUCCESS;
-}
-
-/**
- Sort ordering of CPUs according to the priorities of cores and threads.
- ** ASSUMPTION: 1) single CPU package systsem wide; 2) two threads per core
-
- @param[in] MpService The MP servicde protocol (used to retrievel MP info)
- @param[in] NumberOfCPUs Number of CPUs
- @param[in] NumberOfEnabledCPUs Number of Enabled CPUs.
-
- @retval EFI_SUCCESS The driver installed without error.
-
-**/
-EFI_STATUS
-SortCpuLocalApicInTable (
- IN EFI_MP_SERVICES_PROTOCOL *MpService,
- IN UINTN NumberOfCPUs,
- IN UINTN NumberOfEnabledCPUs
- )
-{
- EFI_PROCESSOR_INFORMATION *MpContext;
- INTN Index2;
- UINTN Index1;
- UINTN Index;
- UINT8 CpuThreadIndex;
- UINTN BspIndex;
- UINT8 CurrProcessor;
- EFI_STATUS Status;
- UINT8 MaxCpuPackage;
- UINT8 MaxCpuCore;
- UINT8 MaxCpuThread;
-
- MpContext = NULL;
- MaxCpuPackage = 0;
- MaxCpuCore = 0;
- MaxCpuThread = 0;
-
- Status = MpService->WhoAmI (
- MpService,
- &BspIndex
- );
-
- //
- // Fill mCpuApicIdOrderTable
- //
- for (CurrProcessor = 0; CurrProcessor < NumberOfCPUs; CurrProcessor++) {
-
- MpContext = AllocatePool (sizeof(EFI_PROCESSOR_INFORMATION));
- ASSERT (MpContext != NULL);
- Status = MpService->GetProcessorInfo (
- MpService,
- CurrProcessor,
- MpContext
- );
- ASSERT_EFI_ERROR (Status);
-
- if (MpContext == NULL) {
- return Status;
- }
- mCpuApicIdOrderTable[CurrProcessor].ApicId = (UINT8) MpContext->ProcessorId;
- DEBUG((DEBUG_INFO, "The CurrProcessor 0x%x ApicId is 0x%x\n", CurrProcessor, mCpuApicIdOrderTable[CurrProcessor].ApicId));
- mCpuApicIdOrderTable[CurrProcessor].Flags = (MpContext->StatusFlag | PROCESSOR_ENABLED_BIT)? 1: 0;
- mCpuApicIdOrderTable[CurrProcessor].Package = (UINT8) MpContext->Location.Package;
- mCpuApicIdOrderTable[CurrProcessor].Die = (UINT8) 0;
- mCpuApicIdOrderTable[CurrProcessor].Core = (UINT8) MpContext->Location.Core;
- mCpuApicIdOrderTable[CurrProcessor].Thread = (UINT8) MpContext->Location.Thread;
-
- if (MaxCpuThread < (UINT8) MpContext->Location.Thread) {
- MaxCpuThread = (UINT8) MpContext->Location.Thread;
- }
-
- if (MaxCpuCore < (UINT8) MpContext->Location.Core) {
- MaxCpuCore = (UINT8) MpContext->Location.Core;
- }
-
- if (MaxCpuPackage < (UINT8) MpContext->Location.Package) {
- MaxCpuPackage = (UINT8) MpContext->Location.Package;
- }
- }
-
- //
- // Do some statistics about the SBSP package
- //
- for (CurrProcessor = 0; CurrProcessor < NumberOfCPUs; CurrProcessor++) {
- if (CurrProcessor == BspIndex) {
- mSbspPackageInfo.BspApicId = mCpuApicIdOrderTable[CurrProcessor].ApicId;
- mSbspPackageInfo.PackageNo = mCpuApicIdOrderTable[CurrProcessor].Package;
- mSbspPackageInfo.TotalThreads = 0;
- mSbspPackageInfo.CoreNo = 0;
- mSbspPackageInfo.LogicalThreadNo = 0;
- }
- }
-
- for (CurrProcessor = 0; CurrProcessor < NumberOfCPUs; CurrProcessor++) {
- if (mCpuApicIdOrderTable[CurrProcessor].Package == mSbspPackageInfo.PackageNo) {
- mSbspPackageInfo.TotalThreads++;
- if (mCpuApicIdOrderTable[CurrProcessor].Thread == 0) {
- mSbspPackageInfo.CoreNo++;
- } else {
- mSbspPackageInfo.LogicalThreadNo++;
- }
- }
- }
-
- //
- // Output debug info
- //
- for (Index = 0; Index < NumberOfCPUs; Index++) {
- DEBUG((DEBUG_INFO, "Package = %x, Die = %x, Core = %x, Thread = %x, ApicId = %x\n", \
- mCpuApicIdOrderTable[Index].Package, \
- mCpuApicIdOrderTable[Index].Die, \
- mCpuApicIdOrderTable[Index].Core, \
- mCpuApicIdOrderTable[Index].Thread, \
- mCpuApicIdOrderTable[Index].ApicId));
- }
-
- DEBUG((DEBUG_INFO, "MaxCpuPackage = %x\n", MaxCpuPackage));
- DEBUG((DEBUG_INFO, "MaxCpuCore = %x\n", MaxCpuCore));
- DEBUG((DEBUG_INFO, "MaxCpuThread = %x\n\n", MaxCpuThread));
- DEBUG((DEBUG_INFO, "mSbspPackageInfo.BspApicId = %x\n", mSbspPackageInfo.BspApicId));
- DEBUG((DEBUG_INFO, "mSbspPackageInfo.TotalThreads = %x\n", mSbspPackageInfo.TotalThreads));
- DEBUG((DEBUG_INFO, "mSbspPackageInfo.PackageNo = %x\n", mSbspPackageInfo.PackageNo));
- DEBUG((DEBUG_INFO, "mSbspPackageInfo.CoreNo = %x\n", mSbspPackageInfo.CoreNo));
- DEBUG((DEBUG_INFO, "mSbspPackageInfo.LogicalThreadNo = %x\n", mSbspPackageInfo.LogicalThreadNo));
-
- //
- // First entry is always SBSP
- //
- CurrProcessor = 0;
- mCpuApicIdReorderTable[CurrProcessor].ApicId = mSbspPackageInfo.BspApicId;
- mCpuApicIdReorderTable[CurrProcessor].Package = mSbspPackageInfo.PackageNo;
- mCpuApicIdReorderTable[CurrProcessor].Flags = 1;
- CurrProcessor++;
-
- //
- // Reorder Core and threads
- //
- for (Index2 = -1; Index2 <= MaxCpuPackage; Index2 ++) {
- INTN PackageIndex;
-
- PackageIndex = Index2;
- if (Index2 == -1) {
- // add Sbsp as first
- PackageIndex = mSbspPackageInfo.PackageNo;
- } else if (Index2 == mSbspPackageInfo.PackageNo) {
- // Skip Sbsp
- continue;
- }
- for (Index1 = 0; Index1 <= MaxCpuThread; Index1 ++) {
- for (Index = 0; Index <= MaxCpuCore; Index++) {
- for (CpuThreadIndex = 0; CpuThreadIndex < NumberOfCPUs; CpuThreadIndex++) {
- if ((mCpuApicIdOrderTable[CpuThreadIndex].Package == PackageIndex) &&
- (mCpuApicIdOrderTable[CpuThreadIndex].Thread == Index1) &&
- (mCpuApicIdOrderTable[CpuThreadIndex].Core == Index) &&
- (mCpuApicIdOrderTable[CpuThreadIndex].ApicId != mCpuApicIdReorderTable[0].ApicId)) {
- mCpuApicIdReorderTable[CurrProcessor].ApicId = mCpuApicIdOrderTable[CpuThreadIndex].ApicId;
- mCpuApicIdReorderTable[CurrProcessor].Package = (UINT8)PackageIndex;
- mCpuApicIdReorderTable[CurrProcessor].Flags = mCpuApicIdOrderTable[CpuThreadIndex].Flags;
- CurrProcessor++;
- break;
- }
- }
- }
- }
- }
-
- //
- // Output debug info
+ // Determine the number of processors
//
- for (Index = 0; Index < NumberOfCPUs; Index++) {
- DEBUG((DEBUG_INFO, "Index = %x, ApicId = %x, Package = %x\n", \
- Index, \
- mCpuApicIdReorderTable[Index].ApicId, \
- mCpuApicIdReorderTable[Index].Package));
- }
-
- FreePool (MpContext);
+ mMpService->GetNumberOfProcessors (
+ mMpService,
+ &mNumberOfCPUs,
+ &mNumberOfEnabledCPUs
+ );
+ ASSERT (mNumberOfCPUs <= MAX_CPU_NUM && mNumberOfEnabledCPUs >= 1);
+ DEBUG ((DEBUG_INFO, "mNumberOfCPUs - %d\n", mNumberOfCPUs));
+ DEBUG ((DEBUG_INFO, "mNumberOfEnabledCPUs - %d\n", mNumberOfEnabledCPUs));
- return EFI_SUCCESS;
-}
+ DEBUG ((DEBUG_INFO, "mX2ApicEnabled - 0x%x\n", mX2ApicEnabled));
+ DEBUG ((DEBUG_INFO, "mForceX2ApicId - 0x%x\n", mForceX2ApicId));
+ // support up to 64 threads/socket
+ AsmCpuidEx(CPUID_EXTENDED_TOPOLOGY, 1, &mNumOfBitShift, NULL, NULL, NULL);
+ mNumOfBitShift &= 0x1F;
+ DEBUG ((DEBUG_INFO, "mNumOfBitShift - 0x%x\n", mNumOfBitShift));
-EFI_STATUS
-AppendCpuMapTableEntry (
- IN EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE *AcpiLocalApic,
- IN UINTN NumberOfCPUs,
- IN UINTN NumberOfEnabledCPUs,
- IN UINT8 LocalApicCounter
- )
-{
- if (LocalApicCounter < NumberOfCPUs) {
- AcpiLocalApic->Flags = mCpuApicIdReorderTable[LocalApicCounter].Flags;
- AcpiLocalApic->ApicId = mCpuApicIdReorderTable[LocalApicCounter].ApicId;
- //
- // Make AcpiProcessorIds 1-based, matching the ones in Processor() definitions
- //
- AcpiLocalApic->AcpiProcessorId = LocalApicCounter + 1;
- } else {
- AcpiLocalApic->Flags = 0;
- AcpiLocalApic->ApicId = 0xFF;
- //
- // Make AcpiProcessorIds 1-based, matching the ones in Processor() definitions
- //
- AcpiLocalApic->AcpiProcessorId = LocalApicCounter + 1;
- }
+ UpdateLocalTable ();
- //
- // Display the results
- //
- DEBUG((DEBUG_INFO, "AcpiLocalApic: AcpiProcessorId=%x, ApicId=%x, Flags=%x\n", \
- AcpiLocalApic->AcpiProcessorId, \
- AcpiLocalApic->ApicId, \
- AcpiLocalApic->Flags));
+ InstallMadtFromScratch ();
+ InstallMcfgFromScratch ();
return EFI_SUCCESS;
}
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.h b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.h index 3ba9b02340..76df7fb761 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.h +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.h @@ -23,6 +23,9 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include <Uefi.h>
#include <IndustryStandard/Pci30.h>
#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/HighPrecisionEventTimerTable.h>
+#include <IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h>
+#include <IndustryStandard/WindowsSmmSecurityMitigationTable.h>
#include <Guid/EventGroup.h>
#include <Guid/GlobalVariable.h>
#include <Library/UefiLib.h>
@@ -35,6 +38,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include <Library/BoardAcpiTableLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/AslUpdateLib.h>
+#include <Library/PciSegmentInfoLib.h>
#include <Protocol/AcpiTable.h>
#include <Protocol/MpService.h>
@@ -42,87 +46,4 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include <Register/Cpuid.h>
-#include "Fadt/Fadt.h"
-#include "Facs/Facs.h"
-#include "Madt/Madt.h"
-#include "Mcfg/Mcfg.h"
-#include "Hpet/Hpet.h"
-#include "Wsmt/Wsmt.h"
-
-//
-// ACPI table information used to initialize tables.
-//
-#define EFI_ACPI_OEM_ID "INTEL "
-#define ACPI_OEM_TABLE_ID_SKL 0x4C4B53 // SKL
-#define ACPI_OEM_TABLE_ID_SKL_ULT 0x544C552D4C4B53 // SKL-ULT
-#define ACPI_OEM_TABLE_ID_SKL_SDS 0x5344532D4C4B53 // SKL-SDS
-#define ACPI_OEM_TABLE_ID_KBL 0x4C424B // KBL
-#define ACPI_OEM_TABLE_ID_KBL_ULT 0x544C552D4C424B // KBL-ULT
-#define ACPI_OEM_TABLE_ID_KBL_SDS 0x5344532D4C424B // KBL-SDS
-#define ACPI_OEM_TABLE_ID_UNKNOWN 0x304E574F4E4B4E55 // "UNKNOWN0"
-#define EFI_ACPI_OEM_REVISION 0x00000001
-#define EFI_ACPI_CREATOR_ID 0x5446534D // "MSFT"
-#define EFI_ACPI_CREATOR_REVISION 0x00000005F
-
-#define MAX_CPU_NUM 16
-
-typedef struct {
- UINT8 ApicId;
- UINT32 Flags;
- UINT8 Package;
- UINT8 Die;
- UINT8 Core;
- UINT8 Thread;
-} EFI_CPU_ID_ORDER_MAP;
-
-typedef struct {
- UINT8 Package;
- UINT8 ApicId;
- UINT32 Flags;
-} EFI_CPU_APIC_ID_REORDER_MAP;
-
-typedef struct {
- UINT8 BspApicId;
- UINT8 TotalThreads;
- UINT8 PackageNo;
- UINT8 CoreNo;
- UINT8 LogicalThreadNo;
-} EFI_CPU_PACKAGE_INFO;
-
-//
-// Function definitions
-//
-
-/**
- Entry point of the ACPI platform driver.
-
- @param[in] ImageHandle A handle for the image that is initializing this driver
- @param[in] SystemTable A pointer to the EFI system table
-
- @retval EFI_SUCCESS The driver installed without error.
- @retval EFI_ABORTED The driver encountered an error and could not complete
- installation of the ACPI tables.
-**/
-EFI_STATUS
-EFIAPI
-InstallAcpiPlatform (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- );
-
-EFI_STATUS
-SortCpuLocalApicInTable (
- IN EFI_MP_SERVICES_PROTOCOL *MpService,
- IN UINTN NumberOfCPUs,
- IN UINTN NumberOfEnabledCPUs
- );
-
-EFI_STATUS
-AppendCpuMapTableEntry (
- IN EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE *AcpiLocalApic,
- IN UINTN NumberOfCPUs,
- IN UINTN NumberOfEnabledCPUs,
- IN UINT8 LocalApicCounter
- );
-
#endif
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf index 6e4429dfe3..dabf28fde7 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf @@ -27,8 +27,6 @@ Fadt/Fadt.c
Facs/Facs.c
Hpet/Hpet.c
- Madt/Madt.c
- Mcfg/Mcfg.c
Wsmt/Wsmt.c
[Packages]
@@ -48,21 +46,35 @@ UefiRuntimeServicesTableLib
BaseMemoryLib
HobLib
+ PciSegmentInfoLib
AslUpdateLib
BoardAcpiTableLib
[Pcd]
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId ## CONSUMES
- gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision
+
+ gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable
+ gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicCount
+ gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicIdBase
+ gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicAddressBase
+ gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicInterruptBase
+ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount
+ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount
+ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount
- gMinPlatformPkgTokenSpaceGuid.PcdPreferredPmProfile
- gMinPlatformPkgTokenSpaceGuid.PcdLowPowerS0Idle
- gMinPlatformPkgTokenSpaceGuid.PcdTenSecondPowerButtonEnable
- gMinPlatformPkgTokenSpaceGuid.PcdPciExpNative
- gMinPlatformPkgTokenSpaceGuid.PcdNativeAspmEnable
+ gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile
+ gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch
+ gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags
-[FixedPcd]
+ gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress
+ gMinPlatformPkgTokenSpaceGuid.PcdHpetTimerBlockId
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
+ gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi
gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress
gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress
gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress
@@ -71,13 +83,13 @@ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress
gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress
gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress
- gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength
- gMinPlatformPkgTokenSpaceGuid.PcdApicLocalAddress ## CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdApicIoAddress ## CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi ## CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi ## CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdApicIoIdPch ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress
+ gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress
+ gMinPlatformPkgTokenSpaceGuid.PcdIoApicId
+
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber
+ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount
gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Facs/Facs.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Facs/Facs.c index 5cc44182af..b454a8ddc1 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Facs/Facs.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Facs/Facs.c @@ -18,7 +18,23 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. // Statements that include other files
//
-#include "Facs.h"
+#include <IndustryStandard/Acpi.h>
+
+//
+// FACS Definitions
+//
+#define EFI_ACPI_FIRMWARE_WAKING_VECTOR 0x00000000
+#define EFI_ACPI_GLOBAL_LOCK 0x00000000
+
+//
+// Firmware Control Structure Feature Flags are defined in AcpiX.0.h
+//
+#define EFI_ACPI_FIRMWARE_CONTROL_STRUCTURE_FLAGS 0x00000000
+
+#define EFI_ACPI_X_FIRMWARE_WAKING_VECTOR 0x0000000000000000
+
+#define EFI_ACPI_OSPM_FLAGS 0x00000000
+
//
// Firmware ACPI Control Structure
@@ -44,7 +60,7 @@ EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE Facs = { EFI_ACPI_RESERVED_BYTE,
EFI_ACPI_RESERVED_BYTE
},
- EFI_ACPI_RESERVED_DWORD, //EFI_ACPI_5_0_OSPM_64BIT_WAKE_F
+ EFI_ACPI_OSPM_FLAGS,
{
EFI_ACPI_RESERVED_BYTE,
EFI_ACPI_RESERVED_BYTE,
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Facs/Facs.h b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Facs/Facs.h deleted file mode 100644 index 4254d9c4b2..0000000000 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Facs/Facs.h +++ /dev/null @@ -1,42 +0,0 @@ -/** @file
- This file describes the contents of the ACPI Firmware ACPI Control
- Structure (FACS). All changes to the FACS contents should be done
- in this file.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _FACS_H_
-#define _FACS_H_
-
-//
-// Statements that include other files
-//
-
-#include <IndustryStandard/Acpi50.h>
-
-//
-// FACS Definitions
-//
-
-#define EFI_ACPI_FIRMWARE_WAKING_VECTOR 0x00000000
-#define EFI_ACPI_GLOBAL_LOCK 0x00000000
-
-//
-// Firmware Control Structure Feature Flags are defined in AcpiX.0.h
-//
-#define EFI_ACPI_FIRMWARE_CONTROL_STRUCTURE_FLAGS 0x00000000
-
-#define EFI_ACPI_X_FIRMWARE_WAKING_VECTOR 0x0000000000000000
-
-extern EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE Facs;
-
-#endif
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.c index 0eb1328332..0def9f6c2b 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.c @@ -17,8 +17,151 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. //
// Statements that include other files
//
+#include <IndustryStandard/Acpi.h>
-#include "Fadt.h"
+//
+// FADT Definitions
+//
+#define EFI_ACPI_OEM_FADT_REVISION 0x00000000
+
+#define EFI_ACPI_PREFERRED_PM_PROFILE 0x00 // To be fixed
+
+#define EFI_ACPI_SCI_INT 0x0009
+#define EFI_ACPI_SMI_CMD 0x000000B2
+
+#define EFI_ACPI_ACPI_ENABLE 0 // To be fixed
+#define EFI_ACPI_ACPI_DISABLE 0 // To be fixed
+#define EFI_ACPI_S4_BIOS_REQ 0x00
+#define EFI_ACPI_CST_CNT 0x00
+
+#define EFI_ACPI_PSTATE_CNT 0x00
+#define EFI_ACPI_GPE1_BASE (EFI_ACPI_GPE1_BLK_BIT_WIDTH / 2)
+#define EFI_ACPI_P_LVL2_LAT 0x0065 // 101
+#define EFI_ACPI_P_LVL3_LAT 0x03E9 // 1001
+#define EFI_ACPI_FLUSH_SIZE 0x0000
+#define EFI_ACPI_FLUSH_STRIDE 0x0000
+#define EFI_ACPI_DUTY_OFFSET 0x01
+#define EFI_ACPI_DUTY_WIDTH 0x00
+
+#define EFI_ACPI_DAY_ALRM 0x0D
+#define EFI_ACPI_MON_ALRM 0x00
+#define EFI_ACPI_CENTURY 0x32
+
+//
+// IA-PC Boot Architecture Flags
+//
+
+#define EFI_ACPI_IAPC_BOOT_ARCH 0 // To be fixed
+
+//
+// Fixed Feature Flags
+//
+#define EFI_ACPI_FIXED_FEATURE_FLAGS 0 // To be fixed
+
+//
+// PM1A Event Register Block Generic Address Information
+//
+#define EFI_ACPI_PM1A_EVT_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH 0x20
+#define EFI_ACPI_PM1A_EVT_BLK_BIT_OFFSET 0x00
+#define EFI_ACPI_PM1A_EVT_BLK_ADDRESS 0 // To be fixed
+
+//
+// PM1B Event Register Block Generic Address Information
+//
+#define EFI_ACPI_PM1B_EVT_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH 0x00
+#define EFI_ACPI_PM1B_EVT_BLK_BIT_OFFSET 0x00
+#define EFI_ACPI_PM1B_EVT_BLK_ADDRESS 0 // To be fixed
+
+//
+// PM1A Control Register Block Generic Address Information
+//
+#define EFI_ACPI_PM1A_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH 0x10
+#define EFI_ACPI_PM1A_CNT_BLK_BIT_OFFSET 0x00
+#define EFI_ACPI_PM1A_CNT_BLK_ADDRESS 0 // To be fixed
+
+//
+// PM1B Control Register Block Generic Address Information
+//
+#define EFI_ACPI_PM1B_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH 0x00
+#define EFI_ACPI_PM1B_CNT_BLK_BIT_OFFSET 0x00
+#define EFI_ACPI_PM1B_CNT_BLK_ADDRESS 0 // To be fixed
+
+//
+// PM2 Control Register Block Generic Address Information
+//
+#define EFI_ACPI_PM2_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH 0x08
+#define EFI_ACPI_PM2_CNT_BLK_BIT_OFFSET 0x00
+#define EFI_ACPI_PM2_CNT_BLK_ADDRESS 0 // To be fixed
+
+//
+// Power Management Timer Control Register Block Generic Address
+// Information
+//
+#define EFI_ACPI_PM_TMR_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_PM_TMR_BLK_BIT_WIDTH 0x20
+#define EFI_ACPI_PM_TMR_BLK_BIT_OFFSET 0x00
+#define EFI_ACPI_PM_TMR_BLK_ADDRESS 0 // To be fixed
+
+//
+// General Purpose Event 0 Register Block Generic Address
+// Information
+//
+#define EFI_ACPI_GPE0_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_GPE0_BLK_BIT_WIDTH 0 // size of R_PCH_ACPI_GPE0_STS_127_96 + R_PCH_ACPI_GPE0_EN_127_96
+#define EFI_ACPI_GPE0_BLK_BIT_OFFSET 0x00
+#define EFI_ACPI_GPE0_BLK_ADDRESS 0 // To be fixed
+
+//
+// General Purpose Event 1 Register Block Generic Address
+// Information
+//
+#define EFI_ACPI_GPE1_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_GPE1_BLK_BIT_WIDTH 0x0
+#define EFI_ACPI_GPE1_BLK_BIT_OFFSET 0x0
+#define EFI_ACPI_GPE1_BLK_ADDRESS 0 // To be fixed
+//
+// Reset Register Generic Address Information
+//
+#define EFI_ACPI_RESET_REG_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
+#define EFI_ACPI_RESET_REG_BIT_WIDTH 0x08
+#define EFI_ACPI_RESET_REG_BIT_OFFSET 0x00
+#define EFI_ACPI_RESET_REG_ADDRESS 0x00000CF9
+#define EFI_ACPI_RESET_VALUE 0x06
+
+//
+// Number of bytes decoded by PM1 event blocks (a and b)
+//
+#define EFI_ACPI_PM1_EVT_LEN ((EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH + EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH) / 8)
+
+//
+// Number of bytes decoded by PM1 control blocks (a and b)
+//
+#define EFI_ACPI_PM1_CNT_LEN ((EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH + EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH) / 8)
+
+//
+// Number of bytes decoded by PM2 control block
+//
+#define EFI_ACPI_PM2_CNT_LEN (EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH / 8)
+
+//
+// Number of bytes decoded by PM timer block
+//
+#define EFI_ACPI_PM_TMR_LEN (EFI_ACPI_PM_TMR_BLK_BIT_WIDTH / 8)
+
+//
+// Number of bytes decoded by GPE0 block
+//
+#define EFI_ACPI_GPE0_BLK_LEN (EFI_ACPI_GPE0_BLK_BIT_WIDTH / 8)
+
+//
+// Number of bytes decoded by GPE1 block
+//
+#define EFI_ACPI_GPE1_BLK_LEN (EFI_ACPI_GPE1_BLK_BIT_WIDTH / 8)
//
// Fixed ACPI Description Table
@@ -57,8 +200,8 @@ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = { EFI_ACPI_PREFERRED_PM_PROFILE,
EFI_ACPI_SCI_INT,
EFI_ACPI_SMI_CMD,
- FixedPcdGet8 (PcdAcpiEnableSwSmi),
- FixedPcdGet8 (PcdAcpiDisableSwSmi),
+ EFI_ACPI_ACPI_ENABLE,
+ EFI_ACPI_ACPI_DISABLE,
EFI_ACPI_S4_BIOS_REQ,
EFI_ACPI_PSTATE_CNT,
@@ -184,7 +327,7 @@ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = { // X_General Purpose Event 0 Register Block
//
EFI_ACPI_GPE0_BLK_ADDRESS_SPACE_ID,
- 0x0,
+ EFI_ACPI_GPE0_BLK_BIT_WIDTH,
EFI_ACPI_GPE0_BLK_BIT_OFFSET,
EFI_ACPI_5_0_BYTE,
EFI_ACPI_GPE0_BLK_ADDRESS
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.h b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.h deleted file mode 100644 index fb4c191b59..0000000000 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.h +++ /dev/null @@ -1,189 +0,0 @@ -/** @file
- This file describes the contents of the ACPI Fixed ACPI Description Table
- (FADT). All changes to the FADT contents should be done in this file.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _FADT_H_
-#define _FADT_H_
-
-//
-// Statements that include other files
-//
-
-#include <IndustryStandard/Acpi50.h>
-
-//
-// FADT Definitions
-//
-#ifndef EFI_ACPI_OEM_FADT_REVISION
-#define EFI_ACPI_OEM_FADT_REVISION 0x00000000
-#endif
-
-//
-// For ACPI 1.0 support
-//
-#define EFI_ACPI_INT_MODEL 0x00
-/*
-1 Desktop
-2 Mobile
-3 Workstation
-4 Enterprise Server
-5 SOHO Server
-6 Appliance PC
-7 Performance Server
-*/
-#define EFI_ACPI_PREFERRED_PM_PROFILE 0x02
-#define EFI_ACPI_SCI_INT 0x0009
-#define EFI_ACPI_SMI_CMD 0x000000B2
-#define EFI_ACPI_S4_BIOS_REQ 0xF2
-#define EFI_ACPI_PSTATE_CNT 0x00
-#define EFI_ACPI_GPE1_BASE 0x10
-#define EFI_ACPI_CST_CNT 0x0
-#define EFI_ACPI_P_LVL2_LAT 101
-#define EFI_ACPI_P_LVL3_LAT 1001
-#define EFI_ACPI_FLUSH_SIZE 0x0000
-#define EFI_ACPI_FLUSH_STRIDE 0x0000
-#define EFI_ACPI_DUTY_OFFSET 0x01
-#define EFI_ACPI_DUTY_WIDTH 0x03
-#define EFI_ACPI_DAY_ALRM 0x0D
-#define EFI_ACPI_MON_ALRM 0x00
-#define EFI_ACPI_CENTURY 0x32
-
-//
-// IA-PC Boot Architecture Flags, see ACPI 5.0 table specification and Acpi50.h
-// We should not use EFI_ACPI_5_0_8042 for legacy free platform, or XP reset fail. No impact to mobile.
-//
-#define EFI_ACPI_IAPC_BOOT_ARCH (EFI_ACPI_5_0_LEGACY_DEVICES)
-
-//
-// Fixed Feature Flags, see ACPI 2.0 table specification and Acpi2_0.h
-//
-#define EFI_ACPI_FIXED_FEATURE_FLAGS (\
- EFI_ACPI_5_0_USE_PLATFORM_CLOCK | \
- EFI_ACPI_5_0_WBINVD | \
- EFI_ACPI_5_0_DCK_CAP | \
- EFI_ACPI_5_0_RTC_S4 | \
- EFI_ACPI_5_0_SLP_BUTTON | \
- EFI_ACPI_5_0_PROC_C1 | \
- EFI_ACPI_5_0_RESET_REG_SUP \
- )
-
-//
-// PM1A Event Register Block Generic Address Information
-//
-#define EFI_ACPI_PM1A_EVT_BLK_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH 0x20
-#define EFI_ACPI_PM1A_EVT_BLK_BIT_OFFSET 0x00
-#define EFI_ACPI_PM1A_EVT_BLK_ADDRESS FixedPcdGet16 (PcdAcpiPm1AEventBlockAddress)
-
-//
-// PM1B Event Register Block Generic Address Information
-//
-#define EFI_ACPI_PM1B_EVT_BLK_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH 0x00
-#define EFI_ACPI_PM1B_EVT_BLK_BIT_OFFSET 0x00
-#define EFI_ACPI_PM1B_EVT_BLK_ADDRESS FixedPcdGet16 (PcdAcpiPm1BEventBlockAddress)
-
-//
-// PM1A Control Register Block Generic Address Information
-//
-#define EFI_ACPI_PM1A_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH 0x10
-#define EFI_ACPI_PM1A_CNT_BLK_BIT_OFFSET 0x00
-#define EFI_ACPI_PM1A_CNT_BLK_ADDRESS FixedPcdGet16 (PcdAcpiPm1AControlBlockAddress)
-
-//
-// PM1B Control Register Block Generic Address Information
-//
-#define EFI_ACPI_PM1B_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH 0x00
-#define EFI_ACPI_PM1B_CNT_BLK_BIT_OFFSET 0x00
-#define EFI_ACPI_PM1B_CNT_BLK_ADDRESS FixedPcdGet16 (PcdAcpiPm1BControlBlockAddress)
-
-//
-// PM2 Control Register Block Generic Address Information
-//
-#define EFI_ACPI_PM2_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH 0x08
-#define EFI_ACPI_PM2_CNT_BLK_BIT_OFFSET 0x00
-#define EFI_ACPI_PM2_CNT_BLK_ADDRESS FixedPcdGet16 (PcdAcpiPm2ControlBlockAddress)
-
-//
-// Power Management Timer Control Register Block Generic Address
-// Information
-//
-#define EFI_ACPI_PM_TMR_BLK_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_PM_TMR_BLK_BIT_WIDTH 0x20
-#define EFI_ACPI_PM_TMR_BLK_BIT_OFFSET 0x00
-#define EFI_ACPI_PM_TMR_BLK_ADDRESS FixedPcdGet16 (PcdAcpiPmTimerBlockAddress)
-
-//
-// General Purpose Event 0 Register Block Generic Address
-// Information
-//
-#define EFI_ACPI_GPE0_BLK_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_GPE0_BLK_BIT_WIDTH 0x100
-#define EFI_ACPI_GPE0_BLK_BIT_OFFSET 0x00
-#define EFI_ACPI_GPE0_BLK_ADDRESS FixedPcdGet16 (PcdAcpiGpe0BlockAddress)
-
-//
-// General Purpose Event 1 Register Block Generic Address
-// Information
-//
-#define EFI_ACPI_GPE1_BLK_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_GPE1_BLK_BIT_WIDTH 0x00
-#define EFI_ACPI_GPE1_BLK_BIT_OFFSET 0x00
-#define EFI_ACPI_GPE1_BLK_ADDRESS FixedPcdGet16 (PcdAcpiGpe1BlockAddress)
-
-//
-// Reset Register Generic Address Information
-//
-#define EFI_ACPI_RESET_REG_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_RESET_REG_BIT_WIDTH 0x08
-#define EFI_ACPI_RESET_REG_BIT_OFFSET 0x00
-#define EFI_ACPI_RESET_REG_ADDRESS 0x0000000000000CF9
-#define EFI_ACPI_RESET_VALUE 0x06
-
-//
-// Number of bytes decoded by PM1 event blocks (a and b)
-//
-#define EFI_ACPI_PM1_EVT_LEN ((EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH + EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH) / 8)
-
-//
-// Number of bytes decoded by PM1 control blocks (a and b)
-//
-#define EFI_ACPI_PM1_CNT_LEN ((EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH + EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH) / 8)
-
-//
-// Number of bytes decoded by PM2 control block
-//
-#define EFI_ACPI_PM2_CNT_LEN (EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH / 8)
-
-//
-// Number of bytes decoded by PM timer block
-//
-#define EFI_ACPI_PM_TMR_LEN (EFI_ACPI_PM_TMR_BLK_BIT_WIDTH / 8)
-
-//
-// Number of bytes decoded by GPE0 block
-//
-#define EFI_ACPI_GPE0_BLK_LEN (EFI_ACPI_GPE0_BLK_BIT_WIDTH / 8)
-
-//
-// Number of bytes decoded by GPE1 block
-//
-#define EFI_ACPI_GPE1_BLK_LEN (EFI_ACPI_GPE1_BLK_BIT_WIDTH / 8)
-
-extern EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt;
-
-#endif
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Hpet/Hpet.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Hpet/Hpet.c index ea8fcba5ad..2512793158 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Hpet/Hpet.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Hpet/Hpet.c @@ -18,7 +18,30 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. // Statements that include other files
//
-#include "Hpet.h"
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/HighPrecisionEventTimerTable.h>
+
+//
+// HPET Definitions
+//
+#define EFI_ACPI_OEM_HPET_REVISION 0x00000001
+
+#define EFI_ACPI_EVENT_TIMER_BLOCK_ID 0x0 // To be filled
+
+//
+// Event Timer Block Base Address Information
+//
+#define EFI_ACPI_EVENT_TIMER_BLOCK_ADDRESS_SPACE_ID EFI_ACPI_3_0_SYSTEM_MEMORY
+#define EFI_ACPI_EVENT_TIMER_BLOCK_BIT_WIDTH 0x40
+#define EFI_ACPI_EVENT_TIMER_BLOCK_BIT_OFFSET 0x00
+#define EFI_ACPI_EVENT_TIMER_ACCESS_SIZE 0x00
+#define EFI_ACPI_EVENT_TIMER_BLOCK_ADDRESS 0x0 // To be filled
+
+#define EFI_ACPI_HPET_NUMBER 0x00
+
+#define EFI_ACPI_MIN_CLOCK_TICK 0x0080
+
+#define EFI_ACPI_HPET_ATTRIBUTES 0x00
//
// High Precision Event Timer Table
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Hpet/Hpet.h b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Hpet/Hpet.h deleted file mode 100644 index b12954f330..0000000000 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Hpet/Hpet.h +++ /dev/null @@ -1,51 +0,0 @@ -/** @file
- This file describes the contents of the ACPI High Precision Event Timer Description Table
- (HPET). All changes to the HPET contents should be done in this file.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _HPET_H_
-#define _HPET_H_
-
-//
-// Statements that include other files
-//
-
-#include <IndustryStandard/Acpi30.h>
-#include <IndustryStandard/HighPrecisionEventTimerTable.h>
-
-//
-// HPET Definitions
-//
-
-#define EFI_ACPI_OEM_HPET_REVISION 0x00000001
-
-#define EFI_ACPI_EVENT_TIMER_BLOCK_ID 0x8086A201
-
-//
-// Event Timer Block Base Address Information
-//
-#define EFI_ACPI_EVENT_TIMER_BLOCK_ADDRESS_SPACE_ID EFI_ACPI_3_0_SYSTEM_MEMORY
-#define EFI_ACPI_EVENT_TIMER_BLOCK_BIT_WIDTH 0x40
-#define EFI_ACPI_EVENT_TIMER_BLOCK_BIT_OFFSET 0x00
-#define EFI_ACPI_EVENT_TIMER_ACCESS_SIZE 0x00
-#define EFI_ACPI_EVENT_TIMER_BLOCK_ADDRESS 0x00000000FED00000
-
-#define EFI_ACPI_HPET_NUMBER 0x00
-
-#define EFI_ACPI_MIN_CLOCK_TICK 0x0080
-
-#define EFI_ACPI_HPET_ATTRIBUTES 0x00
-
-extern EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_HEADER Hpet;
-
-#endif
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Madt/Madt.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Madt/Madt.c deleted file mode 100644 index 70ce150d73..0000000000 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Madt/Madt.c +++ /dev/null @@ -1,389 +0,0 @@ -/** @file
- This file contains a structure definition for the ACPI 2.0 Multiple APIC
- Description Table (MADT). Any changes to the MADT table require updating the
- respective structure count in Madt.h and then adding the structure to the
- MADT defined in this file.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-//
-// Statements that include other files
-//
-
-#include "Madt.h"
-
-//
-// Multiple APIC Description Table
-//
-
-EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
- {
- {
- EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE,
- sizeof (EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE),
- EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION,
-
- //
- // Checksum will be updated at runtime
- //
- 0x00,
-
- //
- // It is expected that these values will be programmed at runtime
- //
- { ' ', ' ', ' ', ' ', ' ', ' ' },
-
- 0,
- EFI_ACPI_OEM_MADT_REVISION,
- 0,
- 0
- },
-
- //
- // MADT specific fields
- //
- FixedPcdGet64 (PcdApicLocalAddress),
- EFI_ACPI_2_0_MULTIPLE_APIC_FLAGS
- },
-
- //
- // Sample Processor Local APIC Structure
- //
- //EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- //sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- //0x00 // Processor ID
- //0x00 // Local APIC ID
- //0x00000000, // Flags - Disabled (until initialized by platform driver)
- {
- {
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- 0x01, // Processor ID
- 0xFF, // Local APIC ID
- 0x00000000 // Flags - Disabled (until initialized by platform driver)
- },
- {
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- 0x02, // Processor ID
- 0xFF, // Local APIC ID
- 0x00000000 // Flags - Disabled (until initialized by platform driver)
- },
- {
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- 0x03, // Processor ID
- 0xFF, // Local APIC ID
- 0x00000000 // Flags - Disabled (until initialized by platform driver)
- },
- {
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- 0x04, // Processor ID
- 0xFF, // Local APIC ID
- 0x00000000 // Flags - Disabled (until initialized by platform driver)
- },
- {
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- 0x05, // Processor ID
- 0xFF, // Local APIC ID
- 0x00000000 // Flags - Disabled (until initialized by platform driver)
- },
- {
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- 0x06, // Processor ID
- 0xFF, // Local APIC ID
- 0x00000000 // Flags - Disabled (until initialized by platform driver)
- },
- {
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- 0x07, // Processor ID
- 0xFF, // Local APIC ID
- 0x00000000 // Flags - Disabled (until initialized by platform driver)
- },
- {
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- 0x08, // Processor ID
- 0xFF, // Local APIC ID
- 0x00000000 // Flags - Disabled (until initialized by platform driver)
- },
- {
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- 0x09, // Processor ID
- 0xFF, // Local APIC ID
- 0x00000000 // Flags - Disabled (until initialized by platform driver)
- },
- {
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- 0x0A, // Processor ID
- 0xFF, // Local APIC ID
- 0x00000000 // Flags - Disabled (until initialized by platform driver)
- },
- {
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- 0x0B, // Processor ID
- 0xFF, // Local APIC ID
- 0x00000000 // Flags - Disabled (until initialized by platform driver)
- },
- {
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- 0x0C, // Processor ID
- 0xFF, // Local APIC ID
- 0x00000000 // Flags - Disabled (until initialized by platform driver)
- },
- {
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- 0x0D, // Processor ID
- 0xFF, // Local APIC ID
- 0x00000000 // Flags - Disabled (until initialized by platform driver)
- },
- {
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- 0x0E, // Processor ID
- 0xFF, // Local APIC ID
- 0x00000000 // Flags - Disabled (until initialized by platform driver)
- },
- {
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- 0x0F, // Processor ID
- 0xFF, // Local APIC ID
- 0x00000000 // Flags - Disabled (until initialized by platform driver)
- },
- {
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC, // Type
- sizeof (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
- 0x10, // Processor ID
- 0xFF, // Local APIC ID
- 0x00000000 // Flags - Disabled (until initialized by platform driver)
- }
- },
-
- //
- // Sample IO APIC Structure
- //
- //EFI_ACPI_2_0_IO_APIC, // Type
- //sizeof (EFI_ACPI_2_0_IO_APIC_STRUCTURE), // Length
- //0x00, // IO APIC ID
- //EFI_ACPI_RESERVED_BYTE, // Reserved
- //0x00000000, // IO APIC Address (physical)
- //0x00000000, // Global System Interrupt Base
- {
- {
- //
- // I/O SAPIC (ICH)
- //
- EFI_ACPI_2_0_IO_APIC, // Type
- sizeof (EFI_ACPI_2_0_IO_APIC_STRUCTURE), // Length
- FixedPcdGet8 (PcdApicIoIdPch), // IO APIC ID
- EFI_ACPI_RESERVED_BYTE, // Reserved
- FixedPcdGet64 (PcdApicIoAddress), // IO APIC Address (physical)
- 0x18 * 0 // Global System Interrupt Base
- }
- },
- //
- // Sample Interrupt Source Override Structure
- //
- //EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE, // Type
- //sizeof (EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE), // Length
- //0x00, // Bus
- //0x00, // Source
- //0x00000000, // Global System Interrupt
- //0x0000, // Flags
- {
- {
- //
- // IRQ0=>IRQ2 Interrupt Source Override Structure
- //
- EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE, // Type
- sizeof (EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE),// Length
- 0x00, // Bus - ISA
- 0x00, // Source - IRQ0
- 0x00000002, // Global System Interrupt - IRQ2
- 0x0000 // Flags - Conforms to specifications of the bus
- },
- {
- //
- // ISO (SCI Active High) Interrupt Source Override Structure
- //
- EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE, // Type
- sizeof (EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE),// Length
- 0x00, // Bus - ISA
- 0x09, // Source - IRQ9
- 0x00000009, // Global System Interrupt - IRQ9
- 0x000D // Flags - Level-tiggered, Active High
- }
- },
- //
- // Sample Non-Maskable Interrupt Source Structure
- //
- //EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE, // Type
- //sizeof (EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE), // Length
- //0x0000, // Flags
- //0x00000000, // Global System Interrupt
-
- //
- // Sample Local APIC NMI Structure
- //
- //EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- //sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- //0x00, // ACPI Processor ID
- //0x0000, // Flags
- //0x00, // Local APIC LINT#
-
- {
- {
- EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- 0x01, // ACPI Processor ID
- 0x0005, // Flags - Edge-tiggered, Active High
- 0x01 // Local APIC LINT#
- },
- {
- EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- 0x02, // ACPI Processor ID
- 0x0005, // Flags - Edge-tiggered, Active High
- 0x01 // Local APIC LINT#
- },
- {
- EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- 0x03, // ACPI Processor ID
- 0x0005, // Flags - Edge-tiggered, Active High
- 0x01 // Local APIC LINT#
- },
- {
- EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- 0x04, // ACPI Processor ID
- 0x0005, // Flags - Edge-tiggered, Active High
- 0x01 // Local APIC LINT#
- },
- {
- EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- 0x05, // ACPI Processor ID
- 0x0005, // Flags - Edge-tiggered, Active High
- 0x01 // Local APIC LINT#
- },
- {
- EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- 0x06, // ACPI Processor ID
- 0x0005, // Flags - Edge-tiggered, Active High
- 0x01 // Local APIC LINT#
- },
- {
- EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- 0x07, // ACPI Processor ID
- 0x0005, // Flags - Edge-tiggered, Active High
- 0x01 // Local APIC LINT#
- },
- {
- EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- 0x08, // ACPI Processor ID
- 0x0005, // Flags - Edge-tiggered, Active High
- 0x01 // Local APIC LINT#
- },
- {
- EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- 0x09, // ACPI Processor ID
- 0x0005, // Flags - Edge-tiggered, Active High
- 0x01 // Local APIC LINT#
- },
- {
- EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- 0x0A, // ACPI Processor ID
- 0x0005, // Flags - Edge-tiggered, Active High
- 0x01 // Local APIC LINT#
- },
- {
- EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- 0x0B, // ACPI Processor ID
- 0x0005, // Flags - Edge-tiggered, Active High
- 0x01 // Local APIC LINT#
- },
- {
- EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- 0x0C, // ACPI Processor ID
- 0x0005, // Flags - Edge-tiggered, Active High
- 0x01 // Local APIC LINT#
- },
- {
- EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- 0x0D, // ACPI Processor ID
- 0x0005, // Flags - Edge-tiggered, Active High
- 0x01 // Local APIC LINT#
- },
- {
- EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- 0x0E, // ACPI Processor ID
- 0x0005, // Flags - Edge-tiggered, Active High
- 0x01 // Local APIC LINT#
- },
- {
- EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- 0x0F, // ACPI Processor ID
- 0x0005, // Flags - Edge-tiggered, Active High
- 0x01 // Local APIC LINT#
- },
- {
- EFI_ACPI_2_0_LOCAL_APIC_NMI, // Type
- sizeof (EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE), // Length
- 0x10, // ACPI Processor ID
- 0x0005, // Flags - Edge-tiggered, Active High
- 0x01 // Local APIC LINT#
- }
- }
-
- //
- // Sample Local APIC Address Override Structure
- //
- //EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE, // Type
- //sizeof (EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE), // Length
- //EFI_ACPI_RESERVED_WORD, // Reserved
- //0x0000000000000000, // Local APIC Address
-
- //
- // Sample Platform Interrupt Sources Structure
- //
- //EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES, // Type
- //sizeof (EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE), // Length
- //0x0000, // Flags
- //0x00, // Interrupt Type
- //0x00, // Processor ID
- //0x00, // Processor EID
- //0x00, // IO SAPIC Vector
- //0x00000000, // Global System Interrupt
- //EFI_ACPI_RESERVED_DWORD, // Reserved
-
-};
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Madt/Madt.h b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Madt/Madt.h deleted file mode 100644 index d45db43b6d..0000000000 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Madt/Madt.h +++ /dev/null @@ -1,144 +0,0 @@ -/** @file
- This file describes the contents of the ACPI Multiple APIC Description
- Table (MADT).
- To make changes to the MADT, it is necessary to update the count for the
- APIC structure being updated, and to modify table found in Madt.c.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _MADT_H_
-#define _MADT_H_
-
-//
-// Statements that include other files
-//
-
-#include <IndustryStandard/Acpi51.h>
-
-//
-// MADT Definitions
-//
-
-#define EFI_ACPI_OEM_MADT_REVISION 0x00000001
-
-
-//
-// Multiple APIC Flags are defined in AcpiX.0.h
-//
-#define EFI_ACPI_1_0_MULTIPLE_APIC_FLAGS (EFI_ACPI_1_0_PCAT_COMPAT)
-#define EFI_ACPI_2_0_MULTIPLE_APIC_FLAGS (EFI_ACPI_2_0_PCAT_COMPAT)
-
-//
-// Define the number of each table type.
-// This is where the table layout is modified.
-//
-
-#define EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT 16
-#define EFI_ACPI_IO_APIC_COUNT 1
-#define EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT 2
-#define EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT 0
-#define EFI_ACPI_LOCAL_APIC_NMI_COUNT 16
-#define EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT 0
-#define EFI_ACPI_IO_SAPIC_COUNT 0
-#define EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT 0
-#define EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT 0
-
-//
-// MADT structure
-//
-
-//
-// Ensure proper structure formats
-//
-#pragma pack (1)
-
-//
-// ACPI 1.0 Table structure
-//
-typedef struct {
- EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
-
-#if EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT > 0
- EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE LocalApic[EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT];
-#endif
-
-#if EFI_ACPI_IO_APIC_COUNT > 0
- EFI_ACPI_1_0_IO_APIC_STRUCTURE IoApic[EFI_ACPI_IO_APIC_COUNT];
-#endif
-
-#if EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT > 0
- EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE Iso[EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT];
-#endif
-
-#if EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT > 0
- EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE NmiSource[EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT];
-#endif
-
-#if EFI_ACPI_LOCAL_APIC_NMI_COUNT > 0
- EFI_ACPI_1_0_LOCAL_APIC_NMI_STRUCTURE LocalApicNmi[EFI_ACPI_LOCAL_APIC_NMI_COUNT];
-#endif
-
-#if EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT > 0
- EFI_ACPI_1_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE LocalApicOverride[EFI_ACPI_LOCAL_APIC_OVERRIDE_COUNT];
-#endif
-
-} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE;
-
-//
-// ACPI 2.0 Table structure
-//
-typedef struct {
- EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
-
-#if EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT > 0
- EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE LocalApic[EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT];
-#endif
-
-#if EFI_ACPI_IO_APIC_COUNT > 0
- EFI_ACPI_2_0_IO_APIC_STRUCTURE IoApic[EFI_ACPI_IO_APIC_COUNT];
-#endif
-
-#if EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT > 0
- EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE Iso[EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT];
-#endif
-
-#if EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT > 0
- EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE NmiSource[EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT];
-#endif
-
-#if EFI_ACPI_LOCAL_APIC_NMI_COUNT > 0
- EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE LocalApicNmi[EFI_ACPI_LOCAL_APIC_NMI_COUNT];
-#endif
-
-#if EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT > 0
- EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE LocalApicOverride[EFI_ACPI_LOCAL_APIC_OVERRIDE_COUNT];
-#endif
-
-#if EFI_ACPI_IO_SAPIC_COUNT > 0
- EFI_ACPI_2_0_IO_SAPIC_STRUCTURE IoSapic[EFI_ACPI_IO_SAPIC_COUNT];
-#endif
-
-#if EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT > 0
- EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE LocalSapic[EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT];
-#endif
-
-#if EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT > 0
- EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE PlatformInterruptSources[EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT];
-#endif
-
-} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE;
-
-#pragma pack ()
-
-extern EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt;
-
-#endif
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Mcfg/Mcfg.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Mcfg/Mcfg.c deleted file mode 100644 index 86f491a0bb..0000000000 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Mcfg/Mcfg.c +++ /dev/null @@ -1,78 +0,0 @@ -/** @file
- This file contains a structure definition for the ACPI Memory Mapped Configuration
- Address Space table (MCFG). Any changes to the number of entries in the table require
- updating the structure count in Mcfg.h and then adding the structure to the
- MCFG defined in this file. The table layout is defined in Mcfg.h and the
- table contents are defined in the MemoryMappedConfigurationSpaceAccessTable.h.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-//
-// Statements that include other files
-//
-
-#include "Mcfg.h"
-
-//
-// Multiple APIC Description Table
-//
-
-EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE Mcfg = {
- {
- EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,
- sizeof (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE),
- EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION,
-
- //
- // Checksum will be updated at runtime
- //
- 0x00,
-
- //
- // It is expected that these values will be programmed at runtime
- //
- { ' ', ' ', ' ', ' ', ' ', ' ' },
-
- 0,
- EFI_ACPI_OEM_MCFG_REVISION,
- 0,
- 0
- },
-
- //
- // Reserved
- //
- 0x0000000000000000,
-
- //
- // MCFG specific fields
- //
- {
- {
- //
- // Sample Base Address Structure
- //
- //0x0000000000000000, // BaseAddress
- //0x0000, // PciSegmentGroupNumber
- //0x00, // StartBusNumber
- //0x00, // EndBusNumber
- //0x00000000, // Reserved
-
- FixedPcdGet64 (PcdPciExpressBaseAddress), // BaseAddress
- 0x0000, // PciSegmentGroupNumber
- 0x00, // StartBusNumber
- ((FixedPcdGet32 (PcdPciExpressRegionLength) / 0x100000) - 1), // EndBusNumber
- 0x00000000 // Reserved
- }
- }
-};
-
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Mcfg/Mcfg.h b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Mcfg/Mcfg.h deleted file mode 100644 index e41c223ef5..0000000000 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Mcfg/Mcfg.h +++ /dev/null @@ -1,62 +0,0 @@ -/** @file
- This file describes the contents of the ACPI Memory Mapped Configuration
- Space Access Table (MCFG).
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _MCFG_H_
-#define _MCFG_H_
-
-//
-// Statements that include other files
-//
-
-#include <IndustryStandard/Acpi30.h>
-#include <IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h>
-
-//
-// MCFG Definitions
-//
-
-#define EFI_ACPI_OEM_MCFG_REVISION 0x00000001
-
-//
-// Define the number of allocation structures so that we can build the table structure.
-//
-
-#define EFI_ACPI_ALLOCATION_STRUCTURE_COUNT 1
-
-//
-// MCFG structure
-//
-
-//
-// Ensure proper structure formats
-//
-#pragma pack (1)
-
-//
-// MCFG Table structure
-//
-typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 Reserved;
-#if EFI_ACPI_ALLOCATION_STRUCTURE_COUNT > 0
- EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE AllocationStructure[EFI_ACPI_ALLOCATION_STRUCTURE_COUNT];
-#endif
-} EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE;
-
-#pragma pack ()
-
-extern EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE Mcfg;
-
-#endif
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Wsmt/Wsmt.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Wsmt/Wsmt.c index ca6657d878..6d25de2ae7 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Wsmt/Wsmt.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Wsmt/Wsmt.c @@ -16,7 +16,15 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. // Statements that include other files
//
-#include "Wsmt.h"
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/WindowsSmmSecurityMitigationTable.h>
+#include <Library/PcdLib.h>
+
+//
+// WSMT Definitions
+//
+
+#define EFI_ACPI_OEM_WSMT_REVISION 0x00000001
EFI_ACPI_WSMT_TABLE Wsmt = {
{
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Wsmt/Wsmt.h b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Wsmt/Wsmt.h deleted file mode 100644 index dba8e23685..0000000000 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Wsmt/Wsmt.h +++ /dev/null @@ -1,30 +0,0 @@ -/** @file
- ACPI WSMT table
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _WSMT_H_
-#define _WSMT_H_
-
-#include <IndustryStandard/Acpi.h>
-#include <IndustryStandard/WindowsSmmSecurityMitigationTable.h>
-#include <Library/PcdLib.h>
-
-//
-// WSMT Definitions
-//
-
-#define EFI_ACPI_OEM_WSMT_REVISION 0x00000001
-
-extern EFI_ACPI_WSMT_TABLE Wsmt;
-
-#endif
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/Common/SpiFvbServiceCommon.c b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/Common/SpiFvbServiceCommon.c index 24420a4368..20ad9a3a38 100644 --- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/Common/SpiFvbServiceCommon.c +++ b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/Common/SpiFvbServiceCommon.c @@ -26,14 +26,14 @@ FVB_GLOBAL mFvbModuleGlobal; // Now we only provide FVs on Variable region and MicorCode region for performance issue.
//
FV_INFO mPlatformFvBaseAddress[] = {
- {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(PcdFlashNvStorageVariableSize)},
- {FixedPcdGet32(PcdFlashFvMicrocodeBase), FixedPcdGet32(PcdFlashFvMicrocodeSize)},
+ {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(PcdFlashNvStorageVariableSize)},
+ {0, 0}, // {FixedPcdGet32(PcdFlashFvMicrocodeBase), FixedPcdGet32(PcdFlashFvMicrocodeSize)},
{0, 0}
};
FV_INFO mPlatformDefaultBaseAddress[] = {
- {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(PcdFlashNvStorageVariableSize)},
- {FixedPcdGet32(PcdFlashFvMicrocodeBase), FixedPcdGet32(PcdFlashFvMicrocodeSize)},
+ {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(PcdFlashNvStorageVariableSize)},
+ {0, 0}, // {FixedPcdGet32(PcdFlashFvMicrocodeBase), FixedPcdGet32(PcdFlashFvMicrocodeSize)},
{0, 0}
};
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/Smm/SpiFvbServiceSmm.c b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/Smm/SpiFvbServiceSmm.c index 04fbde2ca8..f0c2a1df8b 100644 --- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/Smm/SpiFvbServiceSmm.c +++ b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/Smm/SpiFvbServiceSmm.c @@ -127,6 +127,15 @@ FvbInitialize ( UINT32 BytesWritten;
UINTN BytesErased;
+ mPlatformFvBaseAddress[0].FvBase = PcdGet32(PcdFlashNvStorageVariableBase);
+ mPlatformFvBaseAddress[0].FvSize = PcdGet32(PcdFlashNvStorageVariableSize);
+ mPlatformFvBaseAddress[1].FvBase = PcdGet32(PcdFlashFvMicrocodeBase);
+ mPlatformFvBaseAddress[1].FvSize = PcdGet32(PcdFlashFvMicrocodeSize);
+ mPlatformDefaultBaseAddress[0].FvBase = PcdGet32(PcdFlashNvStorageVariableBase);
+ mPlatformDefaultBaseAddress[0].FvSize = PcdGet32(PcdFlashNvStorageVariableSize);
+ mPlatformDefaultBaseAddress[1].FvBase = PcdGet32(PcdFlashFvMicrocodeBase);
+ mPlatformDefaultBaseAddress[1].FvSize = PcdGet32(PcdFlashFvMicrocodeSize);
+
//
// We will only continue with FVB installation if the
// SPI is the active BIOS state
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf index 3da8e31d4f..eb3519fb6a 100644 --- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf +++ b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf @@ -45,7 +45,7 @@ MdeModulePkg/MdeModulePkg.dec
MinPlatformPkg/MinPlatformPkg.dec
-[FixedPcd]
+[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONSUMES
diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c index 4fdbe39e78..7323a46da4 100644 --- a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c +++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c @@ -166,6 +166,8 @@ PostFspmHobProcess ( PeiServicesGetBootMode (&BootMode);
PeiMemBase = 0;
+ PeiMemSize = 0;
+ RequiredMemSize = 0;
ResourceLength = 0;
//
// Parse the hob list from fsp
diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/FspWrapperPlatformSecLib.c b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/FspWrapperPlatformSecLib.c index 2cd15ce442..2fa99df501 100644 --- a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/FspWrapperPlatformSecLib.c +++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/FspWrapperPlatformSecLib.c @@ -71,22 +71,6 @@ PEI_SEC_PERFORMANCE_PPI mSecPerformancePpi = { SecGetPerformance
};
-EFI_PEI_FIRMWARE_VOLUME_INFO_PPI mFvSecurityInfoPpi = {
- EFI_FIRMWARE_FILE_SYSTEM2_GUID,
- (VOID *)(UINTN) FixedPcdGet32 (PcdFlashFvSecurityBase),
- FixedPcdGet32 (PcdFlashFvSecuritySize),
- NULL,
- NULL,
-};
-
-EFI_PEI_FIRMWARE_VOLUME_INFO_PPI mFvAdvancedInfoPpi = {
- EFI_FIRMWARE_FILE_SYSTEM2_GUID,
- (VOID *)(UINTN) FixedPcdGet32 (PcdFlashFvAdvancedBase),
- FixedPcdGet32 (PcdFlashFvAdvancedSize),
- NULL,
- NULL
-};
-
EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformPpi[] = {
{
EFI_PEI_PPI_DESCRIPTOR_PPI,
@@ -94,16 +78,6 @@ EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformPpi[] = { NULL // To be patched later.
},
{
- EFI_PEI_PPI_DESCRIPTOR_PPI,
- &gEfiPeiFirmwareVolumeInfoPpiGuid,
- &mFvSecurityInfoPpi
- },
- {
- EFI_PEI_PPI_DESCRIPTOR_PPI,
- &gEfiPeiFirmwareVolumeInfoPpiGuid,
- &mFvAdvancedInfoPpi
- },
- {
EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
&gPeiSecPerformancePpiGuid,
&mSecPerformancePpi
diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf index 08f903b3c8..9c133577cd 100644 --- a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf +++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf @@ -98,7 +98,3 @@ gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset ## CONSUMES
gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress ## CONSUMES
gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize ## CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase ## CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize ## CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase ## CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize ## CONSUMES
diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc index fa51a86a43..2174eaa609 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc @@ -77,7 +77,13 @@ # Generic Modules
#
UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
-
+ UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
+ NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf
+ IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf
+ UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf
+ TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf
+ DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf
+ TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf
OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
@@ -93,6 +99,10 @@ DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
+ ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
+ FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
+ SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+
#
# CPU
#
@@ -148,4 +158,11 @@ Tpm12CommandLib|SecurityPkg/Library/Tpm12CommandLib/Tpm12CommandLib.inf
Tpm2CommandLib|SecurityPkg/Library/Tpm2CommandLib/Tpm2CommandLib.inf
Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibDTpm/Tpm2DeviceLibDTpm.inf
+ Tcg2PhysicalPresenceLib|SecurityPkg/Library/DxeTcg2PhysicalPresenceLib/DxeTcg2PhysicalPresenceLib.inf
Tcg2PpVendorLib|SecurityPkg/Library/Tcg2PpVendorLibNull/Tcg2PpVendorLibNull.inf
+
+ LockBoxLib|MdeModulePkg/Library/LockBoxNullLib/LockBoxNullLib.inf
+
+ SmmMemLib|MdePkg/Library/SmmMemLib/SmmMemLib.inf
+
+ SmbusLib|MdePkg/Library/BaseSmbusLibNull/BaseSmbusLibNull.inf
diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeInclude.dsc b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeInclude.dsc index 93e1d1be55..d6b874e510 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeInclude.dsc +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeInclude.dsc @@ -64,17 +64,17 @@ MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
- UefiCpuPkg/CpuDxe/CpuDxe.inf
+ #UefiCpuPkg/CpuDxe/CpuDxe.inf
MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
- MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
+ #MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
- MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
- MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
- MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+ #MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
+ #MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+ #MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
@@ -87,7 +87,7 @@ MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
FatBinPkg/EnhancedFatDxe/Fat.inf
- MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
+ #MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
@@ -102,8 +102,17 @@ MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
- MdeModulePkg/Application/UiApp/UiApp.inf
- MdeModulePkg/Application/BootManagerMenuApp/BootManagerMenuApp.inf
+ MdeModulePkg/Application/UiApp/UiApp.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+ NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
+ NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
+ NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
+ }
+ MdeModulePkg/Application/BootManagerMenuApp/BootManagerMenuApp.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+ }
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
@@ -112,7 +121,7 @@ MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
MdeModulePkg/Universal/StatusCodeHandler/Smm/StatusCodeHandlerSmm.inf
- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
+ #UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
MdeModulePkg/Universal/SmmCommunicationBufferDxe/SmmCommunicationBufferDxe.inf
@@ -142,6 +151,6 @@ !endif
!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
- PerformancePkg/Dp_App/Dp.inf
+ ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
!endif
diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc index d373f9fbce..255a1c7ff3 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc @@ -41,9 +41,13 @@ !if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
!endif
+ TimerLib|PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.inf
+ TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+ HttpLib|MdeModulePkg/Library/DxeHttpLib/DxeHttpLib.inf
+
Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibRouter/Tpm2DeviceLibRouterDxe.inf
HashLib|SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDxe.inf
Tcg2PhysicalPresenceLib|SecurityPkg/Library/DxeTcg2PhysicalPresenceLib/DxeTcg2PhysicalPresenceLib.inf
@@ -55,6 +59,7 @@ !if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf
+ TimerLib|PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.inf
!endif
!if $(TARGET) == DEBUG
@@ -63,25 +68,35 @@ [LibraryClasses.common.DXE_DRIVER]
Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibTcg2/Tpm2DeviceLibTcg2.inf
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+
+[LibraryClasses.common.UEFI_DRIVER]
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+# PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
[LibraryClasses.common.DXE_SMM_DRIVER]
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/SmmReportStatusCodeLib/SmmReportStatusCodeLib.inf
MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.inf
LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxSmmLib.inf
SmmMemLib|MdePkg/Library/SmmMemLib/SmmMemLib.inf
+ SmmPeriodicSmiLib|MdePkg/Library/SmmPeriodicSmiLib/SmmPeriodicSmiLib.inf
!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
PerformanceLib|MdeModulePkg/Library/SmmPerformanceLib/SmmPerformanceLib.inf
+ TimerLib|PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.inf
!endif
SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf
+ SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf
CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
Tcg2PhysicalPresenceLib|SecurityPkg/Library/SmmTcg2PhysicalPresenceLib/SmmTcg2PhysicalPresenceLib.inf
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf
[LibraryClasses.common.SMM_CORE]
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
MemoryAllocationLib|MdeModulePkg/Library/PiSmmCoreMemoryAllocationLib/PiSmmCoreMemoryAllocationLib.inf
SmmServicesTableLib|MdeModulePkg/Library/PiSmmCoreSmmServicesTableLib/PiSmmCoreSmmServicesTableLib.inf
@@ -90,24 +105,33 @@ !if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
PerformanceLib|MdeModulePkg/Library/SmmCorePerformanceLib/SmmCorePerformanceLib.inf
+ TimerLib|PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.inf
!endif
!if $(TARGET) == DEBUG
DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
!endif
-
+
[LibraryClasses.common.DXE_RUNTIME_DRIVER]
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf
+!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ TimerLib|PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.inf
+!endif
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
[LibraryClasses.common.UEFI_DRIVER]
Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibTcg2/Tpm2DeviceLibTcg2.inf
[LibraryClasses.common.UEFI_APPLICATION]
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+ #PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
PerformanceLib|MdeModulePkg/Library/DxeSmmPerformanceLib/DxeSmmPerformanceLib.inf
+ TimerLib|PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.inf
!endif
diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc index 31bfc71eca..231eb60e41 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc @@ -16,16 +16,7 @@ #
# Generic EDKII Driver
#
-
- #
- # FSP wrapper SEC Core
- #
- UefiCpuPkg/SecCore/SecCore.inf {
- <LibraryClasses>
- #PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
- PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
- }
-
+
MdeModulePkg/Core/Pei/PeiMain.inf
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc index 2b43b420b8..6855d1e5b7 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc @@ -29,6 +29,12 @@ ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib.inf
+ CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
+
+
+!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
+ PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
+!endif
TimerLib|PcAtChipsetPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf
@@ -38,8 +44,10 @@ !if $(TARGET) == DEBUG
DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
!endif
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
[LibraryClasses.common.PEI_CORE]
+ TimerLib|PcAtChipsetPkg/Library/AcpiTimerLib/PeiAcpiTimerLib.inf
CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
!if $(TARGET) == DEBUG
DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
@@ -51,6 +59,7 @@ [LibraryClasses.common.PEIM]
CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
+ TimerLib|PcAtChipsetPkg/Library/AcpiTimerLib/PeiAcpiTimerLib.inf
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreOsBootInclude.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreOsBootInclude.fdf index 06251fcc79..0f975a8923 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreOsBootInclude.fdf +++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreOsBootInclude.fdf @@ -24,7 +24,7 @@ INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
INF MdeModulePkg/Universal/StatusCodeHandler/Smm/StatusCodeHandlerSmm.inf
-INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
+#INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
INF MdeModulePkg/Universal/SmmCommunicationBufferDxe/SmmCommunicationBufferDxe.inf
!endif
diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePreMemoryInclude.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePreMemoryInclude.fdf index a11a59be20..e1b195d4d7 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePreMemoryInclude.fdf +++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePreMemoryInclude.fdf @@ -13,8 +13,8 @@ #
##
-INF UefiCpuPkg/SecCore/SecCore.inf
-INF MdeModulePkg/Core/Pei/PeiMain.inf
+#INF UefiCpuPkg/SecCore/SecCore.inf
+#INF MdeModulePkg/Core/Pei/PeiMain.inf
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreUefiBootInclude.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreUefiBootInclude.fdf index 66607bbef5..7beb7e7d58 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreUefiBootInclude.fdf +++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreUefiBootInclude.fdf @@ -37,17 +37,17 @@ INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
-INF UefiCpuPkg/CpuDxe/CpuDxe.inf
+#INF UefiCpuPkg/CpuDxe/CpuDxe.inf
INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
-INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
+#INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
-INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
-INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
-INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+#INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
+#INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+#INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
@@ -61,7 +61,7 @@ INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
INF FatBinPkg/EnhancedFatDxe/Fat.inf
-INF MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
+#INF MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
@@ -75,6 +75,6 @@ INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
-INF RuleOverride = UI MdeModulePkg/Application/UiApp/UiApp.inf
+INF MdeModulePkg/Application/UiApp/UiApp.inf
INF MdeModulePkg/Application/BootManagerMenuApp/BootManagerMenuApp.inf
diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/RuleInclude.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/RuleInclude.fdf index e341829526..1b20442fa6 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Fdf/RuleInclude.fdf +++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/RuleInclude.fdf @@ -18,28 +18,35 @@ UI STRING="$(MODULE_NAME)" Optional
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
PE32 PE32 Align = 16 $(INF_OUTPUT)/$(MODULE_NAME).efi
- RAW BIN Align = 16 |.com
+ RAW BIN Align = 16 |.bin
}
[Rule.Common.SEC.BINARY]
FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
UI STRING="$(MODULE_NAME)" Optional
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
- PE32 PE32 Align = 16 $(INF_OUTPUT)/$(MODULE_NAME).efi
- RAW BIN Align = 16 |.com
+ PE32 PE32 Align = 16 |.efi
+ RAW BIN Align = 16 |.bin
}
[Rule.Common.PEI_CORE]
FILE PEI_CORE = $(NAMED_GUID) {
- PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ PE32 PE32 Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING="$(MODULE_NAME)" Optional
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
}
+[Rule.Common.PEI_CORE.BINARY]
+ FILE PEI_CORE = $(NAMED_GUID) {
+ PE32 PE32 Align = Auto |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
[Rule.Common.PEIM]
FILE PEIM = $(NAMED_GUID) {
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
- PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ PE32 PE32 Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING="$(MODULE_NAME)" Optional
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
}
@@ -52,21 +59,6 @@ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
}
-[Rule.Common.USER_DEFINED.APINIT]
-
- FILE RAW = $(NAMED_GUID) Fixed Align=4K {
- RAW SEC_BIN |.com
- UI STRING="$(MODULE_NAME)" Optional
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
- }
-
-[Rule.Common.USER_DEFINED.LEGACY16]
- FILE FREEFORM = $(NAMED_GUID) {
- RAW BIN |.com
- UI STRING="$(MODULE_NAME)" Optional
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
- }
-
[Rule.Common.DXE_CORE]
FILE DXE_CORE = $(NAMED_GUID) {
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
@@ -74,14 +66,6 @@ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
}
-[Rule.Common.DXE_DRIVER.BINARY]
- FILE DRIVER = $(NAMED_GUID) {
- DXE_DEPEX DXE_DEPEX Optional |.depex
- PE32 PE32 |.efi
- UI STRING="$(MODULE_NAME)" Optional
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
- }
-
[Rule.Common.UEFI_DRIVER]
FILE DRIVER = $(NAMED_GUID) {
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
@@ -128,8 +112,6 @@ FILE DRIVER = $(NAMED_GUID) {
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
- RAW ACPI Optional |.acpi
- RAW ASL Optional |.aml
UI STRING="$(MODULE_NAME)" Optional
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
}
@@ -170,7 +152,6 @@ [Rule.Common.SMM_CORE]
FILE SMM_CORE = $(NAMED_GUID) {
- DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING="$(MODULE_NAME)" Optional
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
@@ -183,6 +164,38 @@ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
}
+[Rule.Common.UEFI_APPLICATION.UI]
+ FILE APPLICATION = $(NAMED_GUID) {
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="Enter Setup"
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.USER_DEFINED.LOGO]
+ FILE FREEFORM = $(NAMED_GUID) {
+ RAW BIN |.bmp
+ }
+
+[Rule.Common.PEIM.LzmaCompress]
+ FILE PEIM = $(NAMED_GUID) {
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF {
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+ }
+
+[Rule.Common.PEIM.LzmaCompressBINARY]
+ FILE PEIM = $(NAMED_GUID) {
+ PEI_DEPEX PEI_DEPEX Optional |.depex
+ GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF {
+ PE32 PE32 |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+ }
+
[Rule.Common.UEFI_APPLICATION.BINARY]
FILE APPLICATION = $(NAMED_GUID) {
PE32 PE32 |.efi
@@ -205,49 +218,14 @@ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
}
-[Rule.Common.USER_DEFINED.ACPITABLE]
- FILE FREEFORM = $(NAMED_GUID) {
- RAW ACPI Optional |.acpi
- RAW ASL Optional |.aml
- UI STRING="$(MODULE_NAME)" Optional
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
- }
-
-#
-# FFS layout for R8 component type
-#
-[Rule.Common.PE32_PEIM]
- FILE PEIM = $(NAMED_GUID) {
- PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
- PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+[Rule.Common.USER_DEFINED.APINIT]
+ FILE RAW = $(NAMED_GUID) Fixed Align=4K {
+ RAW SEC_BIN |.com
UI STRING="$(MODULE_NAME)" Optional
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
- }
-
-[Rule.Common.BS_DRIVER]
- FILE DRIVER = $(NAMED_GUID) {
- DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
- PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
- UI STRING="$(MODULE_NAME)" Optional
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
- }
-
-[Rule.Common.RT_DRIVER]
- FILE DRIVER = $(NAMED_GUID) {
- DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
- PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
- UI STRING="$(MODULE_NAME)" Optional
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
- }
-
-[Rule.Common.APPLICATION]
- FILE APPLICATION = $(NAMED_GUID) {
- PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
- UI STRING="$(MODULE_NAME)" Optional
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
- }
+ }
-[Rule.Common.ACPITABLE]
+[Rule.Common.USER_DEFINED.ACPITABLE]
FILE FREEFORM = $(NAMED_GUID) {
RAW ACPI Optional |.acpi
RAW ASL Optional |.aml
@@ -255,49 +233,12 @@ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
}
-[Rule.Common.PE32_PEIM.Align32K]
- FILE PEIM = $(NAMED_GUID) Align=32K {
- PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
- PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
- UI STRING="$(MODULE_NAME)" Optional
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
- }
-
-[Rule.Common.PE32_PEIM.Align64K]
- FILE PEIM = $(NAMED_GUID) Align=64K {
- PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
- PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
- UI STRING="$(MODULE_NAME)" Optional
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
- }
-
-[Rule.Common.PE32_PEIM.LzmaCompress]
- FILE PEIM = $(NAMED_GUID) {
- PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
- GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF {
- PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
- UI STRING="$(MODULE_NAME)" Optional
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
- }
- }
-
-[Rule.Common.PEIM.LzmaCompress]
- FILE PEIM = $(NAMED_GUID) {
- PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
- GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF {
- PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
- UI STRING="$(MODULE_NAME)" Optional
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
- }
+[Rule.Common.PEIM.BIN_FV]
+ FILE FV_IMAGE = $(NAMED_GUID) {
+ FV_IMAGE FV |.fv
}
-[Rule.Common.PEIM.LzmaCompressBinary]
- FILE PEIM = $(NAMED_GUID) {
- PEI_DEPEX PEI_DEPEX Optional |.depex
- COMPRESS PI_STD {
- PE32 PE32 |.efi
- UI STRING="$(MODULE_NAME)" Optional
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
- }
+[Rule.Common.DXE_DRIVER.BIN_FV]
+ FILE FV_IMAGE = $(NAMED_GUID) {
+ FV_IMAGE FV |.fv
}
-
diff --git a/Platform/Intel/MinPlatformPkg/Include/Library/CompressLib.h b/Platform/Intel/MinPlatformPkg/Include/Library/CompressLib.h new file mode 100644 index 0000000000..e7db7bc8c5 --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/Include/Library/CompressLib.h @@ -0,0 +1,40 @@ +/** @file
+ Header file for compression routine.
+
+ Copyright (c) 2005 - 2014, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _EFI_COMPRESS_LIB_H_
+#define _EFI_COMPRESS_LIB_H_
+
+/**
+ The compression routine.
+
+ @param[in] SrcBuffer The buffer containing the source data.
+ @param[in] SrcSize Number of bytes in SrcBuffer.
+ @param[in] DstBuffer The buffer to put the compressed image in.
+ @param[in, out] DstSize On input the size (in bytes) of DstBuffer, on
+ return the number of bytes placed in DstBuffer.
+
+ @retval EFI_SUCCESS The compression was sucessful.
+ @retval EFI_BUFFER_TOO_SMALL The buffer was too small. DstSize is required.
+**/
+EFI_STATUS
+EFIAPI
+Compress (
+ IN VOID *SrcBuffer,
+ IN UINT64 SrcSize,
+ IN VOID *DstBuffer,
+ IN OUT UINT64 *DstSize
+ );
+
+#endif
+
diff --git a/Platform/Intel/MinPlatformPkg/Include/Ppi/BaseMemoryTest.h b/Platform/Intel/MinPlatformPkg/Include/Ppi/BaseMemoryTest.h new file mode 100644 index 0000000000..3ffe993e3d --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/Include/Ppi/BaseMemoryTest.h @@ -0,0 +1,53 @@ +/** @file
+ The file describes the PPI which notifies other drivers
+ of the PEIM being initialized by the PEI Dispatcher.
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This PPI is introduced in PI Version 1.0.
+
+**/
+
+#ifndef _BASE_MEMORY_TEST_H_
+#define _BASE_MEMORY_TEST_H_
+
+#define PEI_BASE_MEMORY_TEST_GUID \
+ { \
+ 0xb6ec423c, 0x21d2, 0x490d, {0x85, 0xc6, 0xdd, 0x58, 0x64, 0xea, 0xa6, 0x74} \
+ }
+
+typedef struct _PEI_BASE_MEMORY_TEST_PPI PEI_BASE_MEMORY_TEST_PPI;
+
+typedef enum {
+ Ignore,
+ Quick,
+ Sparse,
+ Extensive
+} PEI_MEMORY_TEST_OP;
+
+typedef
+EFI_STATUS
+(EFIAPI *PEI_BASE_MEMORY_TEST) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_BASE_MEMORY_TEST_PPI * This,
+ IN EFI_PHYSICAL_ADDRESS BeginAddress,
+ IN UINT64 MemoryLength,
+ IN PEI_MEMORY_TEST_OP Operation,
+ OUT EFI_PHYSICAL_ADDRESS * ErrorAddress
+ );
+
+struct _PEI_BASE_MEMORY_TEST_PPI {
+ PEI_BASE_MEMORY_TEST BaseMemoryTest;
+};
+
+extern EFI_GUID gPeiBaseMemoryTestPpiGuid;
+
+#endif
diff --git a/Platform/Intel/MinPlatformPkg/Include/Ppi/PlatformMemorySize.h b/Platform/Intel/MinPlatformPkg/Include/Ppi/PlatformMemorySize.h new file mode 100644 index 0000000000..f90c4672f8 --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/Include/Ppi/PlatformMemorySize.h @@ -0,0 +1,51 @@ +//
+// This file contains 'Framework Code' and is licensed as such
+// under the terms of your license agreement with Intel or your
+// vendor. This file may not be modified, except as allowed by
+// additional terms of your license agreement.
+//
+/**
+
+Copyright (c) 1999 - 2003 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+ @file PlatformMemorySize.h
+
+ Platform Memory Size PPI as defined in Tiano
+
+ PPI for describing the minimum platform memory size in order to successfully
+ pass control into DXE
+
+**/
+
+#ifndef _PEI_PLATFORM_MEMORY_SIZE_H_
+#define _PEI_PLATFORM_MEMORY_SIZE_H_
+
+#define PEI_PLATFORM_MEMORY_SIZE_PPI_GUID \
+ { \
+ 0x9a7ef41e, 0xc140, 0x4bd1, {0xb8, 0x84, 0x1e, 0x11, 0x24, 0xb, 0x4c, 0xe6 } \
+ }
+
+typedef struct _PEI_PLATFORM_MEMORY_SIZE_PPI PEI_PLATFORM_MEMORY_SIZE_PPI;
+
+typedef
+EFI_STATUS
+(EFIAPI *PEI_GET_MINIMUM_PLATFORM_MEMORY_SIZE) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_PLATFORM_MEMORY_SIZE_PPI * This,
+ IN OUT UINT64 *MemorySize
+ );
+
+typedef struct _PEI_PLATFORM_MEMORY_SIZE_PPI {
+ PEI_GET_MINIMUM_PLATFORM_MEMORY_SIZE GetPlatformMemorySize;
+} PEI_PLATFORM_MEMORY_SIZE_PPI;
+
+extern EFI_GUID gPeiPlatformMemorySizePpiGuid;
+
+#endif
diff --git a/Platform/Intel/MinPlatformPkg/Library/CompressLib/CompressLib.c b/Platform/Intel/MinPlatformPkg/Library/CompressLib/CompressLib.c new file mode 100644 index 0000000000..52ce2cde15 --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/Library/CompressLib/CompressLib.c @@ -0,0 +1,1426 @@ +/** @file
+ Main file for compression routine.
+
+ Compression routine. The compression algorithm is a mixture of
+ LZ77 and Huffman coding. LZ77 transforms the source data into a
+ sequence of Original Characters and Pointers to repeated strings.
+ This sequence is further divided into Blocks and Huffman codings
+ are applied to each Block.
+
+ Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/MemoryAllocationLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Uefi/UefiBaseType.h>
+
+#define SHELL_FREE_NON_NULL(Pointer) \
+ do { \
+ if ((Pointer) != NULL) { \
+ FreePool((Pointer)); \
+ (Pointer) = NULL; \
+ } \
+ } while(FALSE)
+
+
+
+//
+// Macro Definitions
+//
+typedef INT16 NODE;
+#define UINT8_MAX 0xff
+#define UINT8_BIT 8
+#define THRESHOLD 3
+#define INIT_CRC 0
+#define WNDBIT 13
+#define WNDSIZ (1U << WNDBIT)
+#define MAXMATCH 256
+#define BLKSIZ (1U << 14) // 16 * 1024U
+#define PERC_FLAG 0x8000U
+#define CODE_BIT 16
+#define NIL 0
+#define MAX_HASH_VAL (3 * WNDSIZ + (WNDSIZ / 512 + 1) * UINT8_MAX)
+#define HASH(LoopVar7, LoopVar5) ((LoopVar7) + ((LoopVar5) << (WNDBIT - 9)) + WNDSIZ * 2)
+#define CRCPOLY 0xA001
+#define UPDATE_CRC(LoopVar5) mCrc = mCrcTable[(mCrc ^ (LoopVar5)) & 0xFF] ^ (mCrc >> UINT8_BIT)
+
+//
+// C: the Char&Len Set; P: the Position Set; T: the exTra Set
+//
+#define NC (UINT8_MAX + MAXMATCH + 2 - THRESHOLD)
+#define CBIT 9
+#define NP (WNDBIT + 1)
+#define PBIT 4
+#define NT (CODE_BIT + 3)
+#define TBIT 5
+#if NT > NP
+ #define NPT NT
+#else
+ #define NPT NP
+#endif
+//
+// Function Prototypes
+//
+
+/**
+ Put a dword to output stream
+
+ @param[in] Data The dword to put.
+**/
+VOID
+EFIAPI
+PutDword(
+ IN UINT32 Data
+ );
+
+//
+// Global Variables
+//
+STATIC UINT8 *mSrc;
+STATIC UINT8 *mDst;
+STATIC UINT8 *mSrcUpperLimit;
+STATIC UINT8 *mDstUpperLimit;
+
+STATIC UINT8 *mLevel;
+STATIC UINT8 *mText;
+STATIC UINT8 *mChildCount;
+STATIC UINT8 *mBuf;
+STATIC UINT8 mCLen[NC];
+STATIC UINT8 mPTLen[NPT];
+STATIC UINT8 *mLen;
+STATIC INT16 mHeap[NC + 1];
+STATIC INT32 mRemainder;
+STATIC INT32 mMatchLen;
+STATIC INT32 mBitCount;
+STATIC INT32 mHeapSize;
+STATIC INT32 mTempInt32;
+STATIC UINT32 mBufSiz = 0;
+STATIC UINT32 mOutputPos;
+STATIC UINT32 mOutputMask;
+STATIC UINT32 mSubBitBuf;
+STATIC UINT32 mCrc;
+STATIC UINT32 mCompSize;
+STATIC UINT32 mOrigSize;
+
+STATIC UINT16 *mFreq;
+STATIC UINT16 *mSortPtr;
+STATIC UINT16 mLenCnt[17];
+STATIC UINT16 mLeft[2 * NC - 1];
+STATIC UINT16 mRight[2 * NC - 1];
+STATIC UINT16 mCrcTable[UINT8_MAX + 1];
+STATIC UINT16 mCFreq[2 * NC - 1];
+STATIC UINT16 mCCode[NC];
+STATIC UINT16 mPFreq[2 * NP - 1];
+STATIC UINT16 mPTCode[NPT];
+STATIC UINT16 mTFreq[2 * NT - 1];
+
+STATIC NODE mPos;
+STATIC NODE mMatchPos;
+STATIC NODE mAvail;
+STATIC NODE *mPosition;
+STATIC NODE *mParent;
+STATIC NODE *mPrev;
+STATIC NODE *mNext = NULL;
+INT32 mHuffmanDepth = 0;
+
+/**
+ Make a CRC table.
+
+**/
+VOID
+EFIAPI
+MakeCrcTable (
+ VOID
+ )
+{
+ UINT32 LoopVar1;
+
+ UINT32 LoopVar2;
+
+ UINT32 LoopVar4;
+
+ for (LoopVar1 = 0; LoopVar1 <= UINT8_MAX; LoopVar1++) {
+ LoopVar4 = LoopVar1;
+ for (LoopVar2 = 0; LoopVar2 < UINT8_BIT; LoopVar2++) {
+ if ((LoopVar4 & 1) != 0) {
+ LoopVar4 = (LoopVar4 >> 1) ^ CRCPOLY;
+ } else {
+ LoopVar4 >>= 1;
+ }
+ }
+
+ mCrcTable[LoopVar1] = (UINT16) LoopVar4;
+ }
+}
+
+/**
+ Put a dword to output stream
+
+ @param[in] Data The dword to put.
+**/
+VOID
+EFIAPI
+PutDword (
+ IN UINT32 Data
+ )
+{
+ if (mDst < mDstUpperLimit) {
+ *mDst++ = (UINT8) (((UINT8) (Data)) & 0xff);
+ }
+
+ if (mDst < mDstUpperLimit) {
+ *mDst++ = (UINT8) (((UINT8) (Data >> 0x08)) & 0xff);
+ }
+
+ if (mDst < mDstUpperLimit) {
+ *mDst++ = (UINT8) (((UINT8) (Data >> 0x10)) & 0xff);
+ }
+
+ if (mDst < mDstUpperLimit) {
+ *mDst++ = (UINT8) (((UINT8) (Data >> 0x18)) & 0xff);
+ }
+}
+
+/**
+ Allocate memory spaces for data structures used in compression process.
+
+ @retval EFI_SUCCESS Memory was allocated successfully.
+ @retval EFI_OUT_OF_RESOURCES A memory allocation failed.
+**/
+EFI_STATUS
+EFIAPI
+AllocateMemory (
+ VOID
+ )
+{
+ mText = AllocateZeroPool (WNDSIZ * 2 + MAXMATCH);
+ mLevel = AllocateZeroPool ((WNDSIZ + UINT8_MAX + 1) * sizeof (*mLevel));
+ mChildCount = AllocateZeroPool ((WNDSIZ + UINT8_MAX + 1) * sizeof (*mChildCount));
+ mPosition = AllocateZeroPool ((WNDSIZ + UINT8_MAX + 1) * sizeof (*mPosition));
+ mParent = AllocateZeroPool (WNDSIZ * 2 * sizeof (*mParent));
+ mPrev = AllocateZeroPool (WNDSIZ * 2 * sizeof (*mPrev));
+ mNext = AllocateZeroPool ((MAX_HASH_VAL + 1) * sizeof (*mNext));
+
+ mBufSiz = BLKSIZ;
+ mBuf = AllocateZeroPool (mBufSiz);
+ while (mBuf == NULL) {
+ mBufSiz = (mBufSiz / 10U) * 9U;
+ if (mBufSiz < 4 * 1024U) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ mBuf = AllocateZeroPool (mBufSiz);
+ }
+
+ mBuf[0] = 0;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Called when compression is completed to free memory previously allocated.
+
+**/
+VOID
+EFIAPI
+FreeMemory (
+ VOID
+ )
+{
+ SHELL_FREE_NON_NULL (mText);
+ SHELL_FREE_NON_NULL (mLevel);
+ SHELL_FREE_NON_NULL (mChildCount);
+ SHELL_FREE_NON_NULL (mPosition);
+ SHELL_FREE_NON_NULL (mParent);
+ SHELL_FREE_NON_NULL (mPrev);
+ SHELL_FREE_NON_NULL (mNext);
+ SHELL_FREE_NON_NULL (mBuf);
+}
+
+/**
+ Initialize String Info Log data structures.
+**/
+VOID
+EFIAPI
+InitSlide (
+ VOID
+ )
+{
+ NODE LoopVar1;
+
+ SetMem (mLevel + WNDSIZ, (UINT8_MAX + 1) * sizeof (UINT8), 1);
+ SetMem (mPosition + WNDSIZ, (UINT8_MAX + 1) * sizeof (NODE), 0);
+
+ SetMem (mParent + WNDSIZ, WNDSIZ * sizeof (NODE), 0);
+
+ mAvail = 1;
+ for (LoopVar1 = 1; LoopVar1 < WNDSIZ - 1; LoopVar1++) {
+ mNext[LoopVar1] = (NODE) (LoopVar1 + 1);
+ }
+
+ mNext[WNDSIZ - 1] = NIL;
+ SetMem (mNext + WNDSIZ * 2, (MAX_HASH_VAL - WNDSIZ * 2 + 1) * sizeof (NODE), 0);
+}
+
+/**
+ Find child node given the parent node and the edge character
+
+ @param[in] LoopVar6 The parent node.
+ @param[in] LoopVar5 The edge character.
+
+ @return The child node.
+ @retval NIL(Zero) No child could be found.
+
+**/
+NODE
+EFIAPI
+Child (
+ IN NODE LoopVar6,
+ IN UINT8 LoopVar5
+ )
+{
+ NODE LoopVar4;
+
+ LoopVar4 = mNext[HASH (LoopVar6, LoopVar5)];
+ mParent[NIL] = LoopVar6; /* sentinel */
+ while (mParent[LoopVar4] != LoopVar6) {
+ LoopVar4 = mNext[LoopVar4];
+ }
+
+ return LoopVar4;
+}
+
+/**
+ Create a new child for a given parent node.
+
+ @param[in] LoopVar6 The parent node.
+ @param[in] LoopVar5 The edge character.
+ @param[in] LoopVar4 The child node.
+**/
+VOID
+EFIAPI
+MakeChild (
+ IN NODE LoopVar6,
+ IN UINT8 LoopVar5,
+ IN NODE LoopVar4
+ )
+{
+ NODE LoopVar12;
+
+ NODE LoopVar10;
+
+ LoopVar12 = (NODE) HASH (LoopVar6, LoopVar5);
+ LoopVar10 = mNext[LoopVar12];
+ mNext[LoopVar12] = LoopVar4;
+ mNext[LoopVar4] = LoopVar10;
+ mPrev[LoopVar10] = LoopVar4;
+ mPrev[LoopVar4] = LoopVar12;
+ mParent[LoopVar4] = LoopVar6;
+ mChildCount[LoopVar6]++;
+}
+
+/**
+ Split a node.
+
+ @param[in] Old The node to split.
+**/
+VOID
+EFIAPI
+Split (
+ IN NODE Old
+ )
+{
+ NODE New;
+
+ NODE LoopVar10;
+
+ New = mAvail;
+ mAvail = mNext[New];
+ mChildCount[New] = 0;
+ LoopVar10 = mPrev[Old];
+ mPrev[New] = LoopVar10;
+ mNext[LoopVar10] = New;
+ LoopVar10 = mNext[Old];
+ mNext[New] = LoopVar10;
+ mPrev[LoopVar10] = New;
+ mParent[New] = mParent[Old];
+ mLevel[New] = (UINT8) mMatchLen;
+ mPosition[New] = mPos;
+ MakeChild (New, mText[mMatchPos + mMatchLen], Old);
+ MakeChild (New, mText[mPos + mMatchLen], mPos);
+}
+
+/**
+ Insert string info for current position into the String Info Log.
+
+**/
+VOID
+EFIAPI
+InsertNode (
+ VOID
+ )
+{
+ NODE LoopVar6;
+
+ NODE LoopVar4;
+
+ NODE LoopVar2;
+
+ NODE LoopVar10;
+ UINT8 LoopVar5;
+ UINT8 *TempString3;
+ UINT8 *TempString2;
+
+ if (mMatchLen >= 4) {
+ //
+ // We have just got a long match, the target tree
+ // can be located by MatchPos + 1. Travese the tree
+ // from bottom up to get to a proper starting point.
+ // The usage of PERC_FLAG ensures proper node deletion
+ // in DeleteNode() later.
+ //
+ mMatchLen--;
+ LoopVar4 = (NODE) ((mMatchPos + 1) | WNDSIZ);
+ LoopVar6 = mParent[LoopVar4];
+ while (LoopVar6 == NIL) {
+ LoopVar4 = mNext[LoopVar4];
+ LoopVar6 = mParent[LoopVar4];
+ }
+
+ while (mLevel[LoopVar6] >= mMatchLen) {
+ LoopVar4 = LoopVar6;
+ LoopVar6 = mParent[LoopVar6];
+ }
+
+ LoopVar10 = LoopVar6;
+ while (mPosition[LoopVar10] < 0) {
+ mPosition[LoopVar10] = mPos;
+ LoopVar10 = mParent[LoopVar10];
+ }
+
+ if (LoopVar10 < WNDSIZ) {
+ mPosition[LoopVar10] = (NODE) (mPos | PERC_FLAG);
+ }
+ } else {
+ //
+ // Locate the target tree
+ //
+ LoopVar6 = (NODE) (mText[mPos] + WNDSIZ);
+ LoopVar5 = mText[mPos + 1];
+ LoopVar4 = Child (LoopVar6, LoopVar5);
+ if (LoopVar4 == NIL) {
+ MakeChild (LoopVar6, LoopVar5, mPos);
+ mMatchLen = 1;
+ return ;
+ }
+
+ mMatchLen = 2;
+ }
+ //
+ // Traverse down the tree to find a match.
+ // Update Position value along the route.
+ // Node split or creation is involved.
+ //
+ for (;;) {
+ if (LoopVar4 >= WNDSIZ) {
+ LoopVar2 = MAXMATCH;
+ mMatchPos = LoopVar4;
+ } else {
+ LoopVar2 = mLevel[LoopVar4];
+ mMatchPos = (NODE) (mPosition[LoopVar4] & ~PERC_FLAG);
+ }
+
+ if (mMatchPos >= mPos) {
+ mMatchPos -= WNDSIZ;
+ }
+
+ TempString3 = &mText[mPos + mMatchLen];
+ TempString2 = &mText[mMatchPos + mMatchLen];
+ while (mMatchLen < LoopVar2) {
+ if (*TempString3 != *TempString2) {
+ Split (LoopVar4);
+ return ;
+ }
+
+ mMatchLen++;
+ TempString3++;
+ TempString2++;
+ }
+
+ if (mMatchLen >= MAXMATCH) {
+ break;
+ }
+
+ mPosition[LoopVar4] = mPos;
+ LoopVar6 = LoopVar4;
+ LoopVar4 = Child (LoopVar6, *TempString3);
+ if (LoopVar4 == NIL) {
+ MakeChild (LoopVar6, *TempString3, mPos);
+ return ;
+ }
+
+ mMatchLen++;
+ }
+
+ LoopVar10 = mPrev[LoopVar4];
+ mPrev[mPos] = LoopVar10;
+ mNext[LoopVar10] = mPos;
+ LoopVar10 = mNext[LoopVar4];
+ mNext[mPos] = LoopVar10;
+ mPrev[LoopVar10] = mPos;
+ mParent[mPos] = LoopVar6;
+ mParent[LoopVar4] = NIL;
+
+ //
+ // Special usage of 'next'
+ //
+ mNext[LoopVar4] = mPos;
+
+}
+
+/**
+ Delete outdated string info. (The Usage of PERC_FLAG
+ ensures a clean deletion).
+
+**/
+VOID
+EFIAPI
+DeleteNode (
+ VOID
+ )
+{
+ NODE LoopVar6;
+
+ NODE LoopVar4;
+
+ NODE LoopVar11;
+
+ NODE LoopVar10;
+
+ NODE LoopVar9;
+
+ if (mParent[mPos] == NIL) {
+ return ;
+ }
+
+ LoopVar4 = mPrev[mPos];
+ LoopVar11 = mNext[mPos];
+ mNext[LoopVar4] = LoopVar11;
+ mPrev[LoopVar11] = LoopVar4;
+ LoopVar4 = mParent[mPos];
+ mParent[mPos] = NIL;
+ if (LoopVar4 >= WNDSIZ) {
+ return ;
+ }
+
+ mChildCount[LoopVar4]--;
+ if (mChildCount[LoopVar4] > 1) {
+ return ;
+ }
+
+ LoopVar10 = (NODE) (mPosition[LoopVar4] & ~PERC_FLAG);
+ if (LoopVar10 >= mPos) {
+ LoopVar10 -= WNDSIZ;
+ }
+
+ LoopVar11 = LoopVar10;
+ LoopVar6 = mParent[LoopVar4];
+ LoopVar9 = mPosition[LoopVar6];
+ while ((LoopVar9 & PERC_FLAG) != 0){
+ LoopVar9 &= ~PERC_FLAG;
+ if (LoopVar9 >= mPos) {
+ LoopVar9 -= WNDSIZ;
+ }
+
+ if (LoopVar9 > LoopVar11) {
+ LoopVar11 = LoopVar9;
+ }
+
+ mPosition[LoopVar6] = (NODE) (LoopVar11 | WNDSIZ);
+ LoopVar6 = mParent[LoopVar6];
+ LoopVar9 = mPosition[LoopVar6];
+ }
+
+ if (LoopVar6 < WNDSIZ) {
+ if (LoopVar9 >= mPos) {
+ LoopVar9 -= WNDSIZ;
+ }
+
+ if (LoopVar9 > LoopVar11) {
+ LoopVar11 = LoopVar9;
+ }
+
+ mPosition[LoopVar6] = (NODE) (LoopVar11 | WNDSIZ | PERC_FLAG);
+ }
+
+ LoopVar11 = Child (LoopVar4, mText[LoopVar10 + mLevel[LoopVar4]]);
+ LoopVar10 = mPrev[LoopVar11];
+ LoopVar9 = mNext[LoopVar11];
+ mNext[LoopVar10] = LoopVar9;
+ mPrev[LoopVar9] = LoopVar10;
+ LoopVar10 = mPrev[LoopVar4];
+ mNext[LoopVar10] = LoopVar11;
+ mPrev[LoopVar11] = LoopVar10;
+ LoopVar10 = mNext[LoopVar4];
+ mPrev[LoopVar10] = LoopVar11;
+ mNext[LoopVar11] = LoopVar10;
+ mParent[LoopVar11] = mParent[LoopVar4];
+ mParent[LoopVar4] = NIL;
+ mNext[LoopVar4] = mAvail;
+ mAvail = LoopVar4;
+}
+
+/**
+ Read in source data
+
+ @param[out] LoopVar7 The buffer to hold the data.
+ @param[in] LoopVar8 The number of bytes to read.
+
+ @return The number of bytes actually read.
+**/
+INT32
+EFIAPI
+FreadCrc (
+ OUT UINT8 *LoopVar7,
+ IN INT32 LoopVar8
+ )
+{
+ INT32 LoopVar1;
+
+ for (LoopVar1 = 0; mSrc < mSrcUpperLimit && LoopVar1 < LoopVar8; LoopVar1++) {
+ *LoopVar7++ = *mSrc++;
+ }
+
+ LoopVar8 = LoopVar1;
+
+ LoopVar7 -= LoopVar8;
+ mOrigSize += LoopVar8;
+ LoopVar1--;
+ while (LoopVar1 >= 0) {
+ UPDATE_CRC (*LoopVar7++);
+ LoopVar1--;
+ }
+
+ return LoopVar8;
+}
+
+/**
+ Advance the current position (read in new data if needed).
+ Delete outdated string info. Find a match string for current position.
+
+ @retval TRUE The operation was successful.
+ @retval FALSE The operation failed due to insufficient memory.
+**/
+BOOLEAN
+EFIAPI
+GetNextMatch (
+ VOID
+ )
+{
+ INT32 LoopVar8;
+ VOID *Temp;
+
+ mRemainder--;
+ mPos++;
+ if (mPos == WNDSIZ * 2) {
+ Temp = AllocateZeroPool (WNDSIZ + MAXMATCH);
+ if (Temp == NULL) {
+ return (FALSE);
+ }
+ CopyMem (Temp, &mText[WNDSIZ], WNDSIZ + MAXMATCH);
+ CopyMem (&mText[0], Temp, WNDSIZ + MAXMATCH);
+ FreePool (Temp);
+ LoopVar8 = FreadCrc (&mText[WNDSIZ + MAXMATCH], WNDSIZ);
+ mRemainder += LoopVar8;
+ mPos = WNDSIZ;
+ }
+
+ DeleteNode ();
+ InsertNode ();
+
+ return (TRUE);
+}
+
+/**
+ Send entry LoopVar1 down the queue.
+
+ @param[in] LoopVar1 The index of the item to move.
+**/
+VOID
+EFIAPI
+DownHeap (
+ IN INT32 i
+ )
+{
+ INT32 LoopVar1;
+
+ INT32 LoopVar2;
+
+ //
+ // priority queue: send i-th entry down heap
+ //
+ LoopVar2 = mHeap[i];
+ LoopVar1 = 2 * i;
+ while (LoopVar1 <= mHeapSize) {
+ if (LoopVar1 < mHeapSize && mFreq[mHeap[LoopVar1]] > mFreq[mHeap[LoopVar1 + 1]]) {
+ LoopVar1++;
+ }
+
+ if (mFreq[LoopVar2] <= mFreq[mHeap[LoopVar1]]) {
+ break;
+ }
+
+ mHeap[i] = mHeap[LoopVar1];
+ i = LoopVar1;
+ LoopVar1 = 2 * i;
+ }
+
+ mHeap[i] = (INT16) LoopVar2;
+}
+
+/**
+ Count the number of each code length for a Huffman tree.
+
+ @param[in] LoopVar1 The top node.
+**/
+VOID
+EFIAPI
+CountLen (
+ IN INT32 LoopVar1
+ )
+{
+ if (LoopVar1 < mTempInt32) {
+ mLenCnt[(mHuffmanDepth < 16) ? mHuffmanDepth : 16]++;
+ } else {
+ mHuffmanDepth++;
+ CountLen (mLeft[LoopVar1]);
+ CountLen (mRight[LoopVar1]);
+ mHuffmanDepth--;
+ }
+}
+
+/**
+ Create code length array for a Huffman tree.
+
+ @param[in] Root The root of the tree.
+**/
+VOID
+EFIAPI
+MakeLen (
+ IN INT32 Root
+ )
+{
+ INT32 LoopVar1;
+
+ INT32 LoopVar2;
+ UINT32 Cum;
+
+ for (LoopVar1 = 0; LoopVar1 <= 16; LoopVar1++) {
+ mLenCnt[LoopVar1] = 0;
+ }
+
+ CountLen (Root);
+
+ //
+ // Adjust the length count array so that
+ // no code will be generated longer than its designated length
+ //
+ Cum = 0;
+ for (LoopVar1 = 16; LoopVar1 > 0; LoopVar1--) {
+ Cum += mLenCnt[LoopVar1] << (16 - LoopVar1);
+ }
+
+ while (Cum != (1U << 16)) {
+ mLenCnt[16]--;
+ for (LoopVar1 = 15; LoopVar1 > 0; LoopVar1--) {
+ if (mLenCnt[LoopVar1] != 0) {
+ mLenCnt[LoopVar1]--;
+ mLenCnt[LoopVar1 + 1] += 2;
+ break;
+ }
+ }
+
+ Cum--;
+ }
+
+ for (LoopVar1 = 16; LoopVar1 > 0; LoopVar1--) {
+ LoopVar2 = mLenCnt[LoopVar1];
+ LoopVar2--;
+ while (LoopVar2 >= 0) {
+ mLen[*mSortPtr++] = (UINT8) LoopVar1;
+ LoopVar2--;
+ }
+ }
+}
+
+/**
+ Assign code to each symbol based on the code length array.
+
+ @param[in] LoopVar8 The number of symbols.
+ @param[in] Len The code length array.
+ @param[out] Code The stores codes for each symbol.
+**/
+VOID
+EFIAPI
+MakeCode (
+ IN INT32 LoopVar8,
+ IN UINT8 Len[ ],
+ OUT UINT16 Code[ ]
+ )
+{
+ INT32 LoopVar1;
+ UINT16 Start[18];
+
+ Start[1] = 0;
+ for (LoopVar1 = 1; LoopVar1 <= 16; LoopVar1++) {
+ Start[LoopVar1 + 1] = (UINT16) ((Start[LoopVar1] + mLenCnt[LoopVar1]) << 1);
+ }
+
+ for (LoopVar1 = 0; LoopVar1 < LoopVar8; LoopVar1++) {
+ Code[LoopVar1] = Start[Len[LoopVar1]]++;
+ }
+}
+
+/**
+ Generates Huffman codes given a frequency distribution of symbols.
+
+ @param[in] NParm The number of symbols.
+ @param[in] FreqParm The frequency of each symbol.
+ @param[out] LenParm The code length for each symbol.
+ @param[out] CodeParm The code for each symbol.
+
+ @return The root of the Huffman tree.
+**/
+INT32
+EFIAPI
+MakeTree (
+ IN INT32 NParm,
+ IN UINT16 FreqParm[ ],
+ OUT UINT8 LenParm[ ],
+ OUT UINT16 CodeParm[ ]
+ )
+{
+ INT32 LoopVar1;
+
+ INT32 LoopVar2;
+
+ INT32 LoopVar3;
+
+ INT32 Avail;
+
+ //
+ // make tree, calculate len[], return root
+ //
+ mTempInt32 = NParm;
+ mFreq = FreqParm;
+ mLen = LenParm;
+ Avail = mTempInt32;
+ mHeapSize = 0;
+ mHeap[1] = 0;
+ for (LoopVar1 = 0; LoopVar1 < mTempInt32; LoopVar1++) {
+ mLen[LoopVar1] = 0;
+ if ((mFreq[LoopVar1]) != 0) {
+ mHeapSize++;
+ mHeap[mHeapSize] = (INT16) LoopVar1;
+ }
+ }
+
+ if (mHeapSize < 2) {
+ CodeParm[mHeap[1]] = 0;
+ return mHeap[1];
+ }
+
+ for (LoopVar1 = mHeapSize / 2; LoopVar1 >= 1; LoopVar1--) {
+ //
+ // make priority queue
+ //
+ DownHeap (LoopVar1);
+ }
+
+ mSortPtr = CodeParm;
+ do {
+ LoopVar1 = mHeap[1];
+ if (LoopVar1 < mTempInt32) {
+ *mSortPtr++ = (UINT16) LoopVar1;
+ }
+
+ mHeap[1] = mHeap[mHeapSize--];
+ DownHeap (1);
+ LoopVar2 = mHeap[1];
+ if (LoopVar2 < mTempInt32) {
+ *mSortPtr++ = (UINT16) LoopVar2;
+ }
+
+ LoopVar3 = Avail++;
+ mFreq[LoopVar3] = (UINT16) (mFreq[LoopVar1] + mFreq[LoopVar2]);
+ mHeap[1] = (INT16) LoopVar3;
+ DownHeap (1);
+ mLeft[LoopVar3] = (UINT16) LoopVar1;
+ mRight[LoopVar3] = (UINT16) LoopVar2;
+ } while (mHeapSize > 1);
+
+ mSortPtr = CodeParm;
+ MakeLen (LoopVar3);
+ MakeCode (NParm, LenParm, CodeParm);
+
+ //
+ // return root
+ //
+ return LoopVar3;
+}
+
+/**
+ Outputs rightmost LoopVar8 bits of x
+
+ @param[in] LoopVar8 The rightmost LoopVar8 bits of the data is used.
+ @param[in] x The data.
+**/
+VOID
+EFIAPI
+PutBits (
+ IN INT32 LoopVar8,
+ IN UINT32 x
+ )
+{
+ UINT8 Temp;
+
+ if (LoopVar8 < mBitCount) {
+ mSubBitBuf |= x << (mBitCount -= LoopVar8);
+ } else {
+
+ Temp = (UINT8)(mSubBitBuf | (x >> (LoopVar8 -= mBitCount)));
+ if (mDst < mDstUpperLimit) {
+ *mDst++ = Temp;
+ }
+ mCompSize++;
+
+ if (LoopVar8 < UINT8_BIT) {
+ mSubBitBuf = x << (mBitCount = UINT8_BIT - LoopVar8);
+ } else {
+
+ Temp = (UINT8)(x >> (LoopVar8 - UINT8_BIT));
+ if (mDst < mDstUpperLimit) {
+ *mDst++ = Temp;
+ }
+ mCompSize++;
+
+ mSubBitBuf = x << (mBitCount = 2 * UINT8_BIT - LoopVar8);
+ }
+ }
+}
+
+/**
+ Encode a signed 32 bit number.
+
+ @param[in] LoopVar5 The number to encode.
+**/
+VOID
+EFIAPI
+EncodeC (
+ IN INT32 LoopVar5
+ )
+{
+ PutBits (mCLen[LoopVar5], mCCode[LoopVar5]);
+}
+
+/**
+ Encode a unsigned 32 bit number.
+
+ @param[in] LoopVar7 The number to encode.
+**/
+VOID
+EFIAPI
+EncodeP (
+ IN UINT32 LoopVar7
+ )
+{
+ UINT32 LoopVar5;
+
+ UINT32 LoopVar6;
+
+ LoopVar5 = 0;
+ LoopVar6 = LoopVar7;
+ while (LoopVar6 != 0) {
+ LoopVar6 >>= 1;
+ LoopVar5++;
+ }
+
+ PutBits (mPTLen[LoopVar5], mPTCode[LoopVar5]);
+ if (LoopVar5 > 1) {
+ PutBits(LoopVar5 - 1, LoopVar7 & (0xFFFFU >> (17 - LoopVar5)));
+ }
+}
+
+/**
+ Count the frequencies for the Extra Set.
+
+**/
+VOID
+EFIAPI
+CountTFreq (
+ VOID
+ )
+{
+ INT32 LoopVar1;
+
+ INT32 LoopVar3;
+
+ INT32 LoopVar8;
+
+ INT32 Count;
+
+ for (LoopVar1 = 0; LoopVar1 < NT; LoopVar1++) {
+ mTFreq[LoopVar1] = 0;
+ }
+
+ LoopVar8 = NC;
+ while (LoopVar8 > 0 && mCLen[LoopVar8 - 1] == 0) {
+ LoopVar8--;
+ }
+
+ LoopVar1 = 0;
+ while (LoopVar1 < LoopVar8) {
+ LoopVar3 = mCLen[LoopVar1++];
+ if (LoopVar3 == 0) {
+ Count = 1;
+ while (LoopVar1 < LoopVar8 && mCLen[LoopVar1] == 0) {
+ LoopVar1++;
+ Count++;
+ }
+
+ if (Count <= 2) {
+ mTFreq[0] = (UINT16) (mTFreq[0] + Count);
+ } else if (Count <= 18) {
+ mTFreq[1]++;
+ } else if (Count == 19) {
+ mTFreq[0]++;
+ mTFreq[1]++;
+ } else {
+ mTFreq[2]++;
+ }
+ } else {
+ ASSERT((LoopVar3+2)<(2 * NT - 1));
+ mTFreq[LoopVar3 + 2]++;
+ }
+ }
+}
+
+/**
+ Outputs the code length array for the Extra Set or the Position Set.
+
+ @param[in] LoopVar8 The number of symbols.
+ @param[in] nbit The number of bits needed to represent 'LoopVar8'.
+ @param[in] Special The special symbol that needs to be take care of.
+
+**/
+VOID
+EFIAPI
+WritePTLen (
+ IN INT32 LoopVar8,
+ IN INT32 nbit,
+ IN INT32 Special
+ )
+{
+ INT32 LoopVar1;
+
+ INT32 LoopVar3;
+
+ while (LoopVar8 > 0 && mPTLen[LoopVar8 - 1] == 0) {
+ LoopVar8--;
+ }
+
+ PutBits (nbit, LoopVar8);
+ LoopVar1 = 0;
+ while (LoopVar1 < LoopVar8) {
+ LoopVar3 = mPTLen[LoopVar1++];
+ if (LoopVar3 <= 6) {
+ PutBits (3, LoopVar3);
+ } else {
+ PutBits (LoopVar3 - 3, (1U << (LoopVar3 - 3)) - 2);
+ }
+
+ if (LoopVar1 == Special) {
+ while (LoopVar1 < 6 && mPTLen[LoopVar1] == 0) {
+ LoopVar1++;
+ }
+
+ PutBits (2, (LoopVar1 - 3) & 3);
+ }
+ }
+}
+
+/**
+ Outputs the code length array for Char&Length Set.
+**/
+VOID
+EFIAPI
+WriteCLen (
+ VOID
+ )
+{
+ INT32 LoopVar1;
+
+ INT32 LoopVar3;
+
+ INT32 LoopVar8;
+
+ INT32 Count;
+
+ LoopVar8 = NC;
+ while (LoopVar8 > 0 && mCLen[LoopVar8 - 1] == 0) {
+ LoopVar8--;
+ }
+
+ PutBits (CBIT, LoopVar8);
+ LoopVar1 = 0;
+ while (LoopVar1 < LoopVar8) {
+ LoopVar3 = mCLen[LoopVar1++];
+ if (LoopVar3 == 0) {
+ Count = 1;
+ while (LoopVar1 < LoopVar8 && mCLen[LoopVar1] == 0) {
+ LoopVar1++;
+ Count++;
+ }
+
+ if (Count <= 2) {
+ for (LoopVar3 = 0; LoopVar3 < Count; LoopVar3++) {
+ PutBits (mPTLen[0], mPTCode[0]);
+ }
+ } else if (Count <= 18) {
+ PutBits (mPTLen[1], mPTCode[1]);
+ PutBits (4, Count - 3);
+ } else if (Count == 19) {
+ PutBits (mPTLen[0], mPTCode[0]);
+ PutBits (mPTLen[1], mPTCode[1]);
+ PutBits (4, 15);
+ } else {
+ PutBits (mPTLen[2], mPTCode[2]);
+ PutBits (CBIT, Count - 20);
+ }
+ } else {
+ ASSERT((LoopVar3+2)<NPT);
+ PutBits (mPTLen[LoopVar3 + 2], mPTCode[LoopVar3 + 2]);
+ }
+ }
+}
+
+/**
+ Huffman code the block and output it.
+
+**/
+VOID
+EFIAPI
+SendBlock (
+ VOID
+ )
+{
+ UINT32 LoopVar1;
+
+ UINT32 LoopVar3;
+
+ UINT32 Flags;
+
+ UINT32 Root;
+
+ UINT32 Pos;
+
+ UINT32 Size;
+ Flags = 0;
+
+ Root = MakeTree (NC, mCFreq, mCLen, mCCode);
+ Size = mCFreq[Root];
+ PutBits (16, Size);
+ if (Root >= NC) {
+ CountTFreq ();
+ Root = MakeTree (NT, mTFreq, mPTLen, mPTCode);
+ if (Root >= NT) {
+ WritePTLen (NT, TBIT, 3);
+ } else {
+ PutBits (TBIT, 0);
+ PutBits (TBIT, Root);
+ }
+
+ WriteCLen ();
+ } else {
+ PutBits (TBIT, 0);
+ PutBits (TBIT, 0);
+ PutBits (CBIT, 0);
+ PutBits (CBIT, Root);
+ }
+
+ Root = MakeTree (NP, mPFreq, mPTLen, mPTCode);
+ if (Root >= NP) {
+ WritePTLen (NP, PBIT, -1);
+ } else {
+ PutBits (PBIT, 0);
+ PutBits (PBIT, Root);
+ }
+
+ Pos = 0;
+ for (LoopVar1 = 0; LoopVar1 < Size; LoopVar1++) {
+ if (LoopVar1 % UINT8_BIT == 0) {
+ Flags = mBuf[Pos++];
+ } else {
+ Flags <<= 1;
+ }
+ if ((Flags & (1U << (UINT8_BIT - 1))) != 0){
+ EncodeC(mBuf[Pos++] + (1U << UINT8_BIT));
+ LoopVar3 = mBuf[Pos++] << UINT8_BIT;
+ LoopVar3 += mBuf[Pos++];
+
+ EncodeP (LoopVar3);
+ } else {
+ EncodeC (mBuf[Pos++]);
+ }
+ }
+
+ SetMem (mCFreq, NC * sizeof (UINT16), 0);
+ SetMem (mPFreq, NP * sizeof (UINT16), 0);
+}
+
+/**
+ Start the huffman encoding.
+
+**/
+VOID
+EFIAPI
+HufEncodeStart (
+ VOID
+ )
+{
+ SetMem (mCFreq, NC * sizeof (UINT16), 0);
+ SetMem (mPFreq, NP * sizeof (UINT16), 0);
+
+ mOutputPos = mOutputMask = 0;
+
+ mBitCount = UINT8_BIT;
+ mSubBitBuf = 0;
+}
+
+/**
+ Outputs an Original Character or a Pointer.
+
+ @param[in] LoopVar5 The original character or the 'String Length' element of
+ a Pointer.
+ @param[in] LoopVar7 The 'Position' field of a Pointer.
+**/
+VOID
+EFIAPI
+CompressOutput (
+ IN UINT32 LoopVar5,
+ IN UINT32 LoopVar7
+ )
+{
+ STATIC UINT32 CPos;
+
+ if ((mOutputMask >>= 1) == 0) {
+ mOutputMask = 1U << (UINT8_BIT - 1);
+ if (mOutputPos >= mBufSiz - 3 * UINT8_BIT) {
+ SendBlock ();
+ mOutputPos = 0;
+ }
+
+ CPos = mOutputPos++;
+ mBuf[CPos] = 0;
+ }
+ mBuf[mOutputPos++] = (UINT8) LoopVar5;
+ mCFreq[LoopVar5]++;
+ if (LoopVar5 >= (1U << UINT8_BIT)) {
+ mBuf[CPos] = (UINT8)(mBuf[CPos]|mOutputMask);
+ mBuf[mOutputPos++] = (UINT8)(LoopVar7 >> UINT8_BIT);
+ mBuf[mOutputPos++] = (UINT8) LoopVar7;
+ LoopVar5 = 0;
+ while (LoopVar7!=0) {
+ LoopVar7 >>= 1;
+ LoopVar5++;
+ }
+ mPFreq[LoopVar5]++;
+ }
+}
+
+/**
+ End the huffman encoding.
+
+**/
+VOID
+EFIAPI
+HufEncodeEnd (
+ VOID
+ )
+{
+ SendBlock ();
+
+ //
+ // Flush remaining bits
+ //
+ PutBits (UINT8_BIT - 1, 0);
+}
+
+/**
+ The main controlling routine for compression process.
+
+ @retval EFI_SUCCESS The compression is successful.
+ @retval EFI_OUT_0F_RESOURCES Not enough memory for compression process.
+**/
+EFI_STATUS
+EFIAPI
+Encode (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ INT32 LastMatchLen;
+ NODE LastMatchPos;
+
+ Status = AllocateMemory ();
+ if (EFI_ERROR (Status)) {
+ FreeMemory ();
+ return Status;
+ }
+
+ InitSlide ();
+
+ HufEncodeStart ();
+
+ mRemainder = FreadCrc (&mText[WNDSIZ], WNDSIZ + MAXMATCH);
+
+ mMatchLen = 0;
+ mPos = WNDSIZ;
+ InsertNode ();
+ if (mMatchLen > mRemainder) {
+ mMatchLen = mRemainder;
+ }
+
+ while (mRemainder > 0) {
+ LastMatchLen = mMatchLen;
+ LastMatchPos = mMatchPos;
+ if (!GetNextMatch ()) {
+ Status = EFI_OUT_OF_RESOURCES;
+ }
+ if (mMatchLen > mRemainder) {
+ mMatchLen = mRemainder;
+ }
+
+ if (mMatchLen > LastMatchLen || LastMatchLen < THRESHOLD) {
+ //
+ // Not enough benefits are gained by outputting a pointer,
+ // so just output the original character
+ //
+ CompressOutput(mText[mPos - 1], 0);
+ } else {
+ //
+ // Outputting a pointer is beneficial enough, do it.
+ //
+
+ CompressOutput(LastMatchLen + (UINT8_MAX + 1 - THRESHOLD),
+ (mPos - LastMatchPos - 2) & (WNDSIZ - 1));
+ LastMatchLen--;
+ while (LastMatchLen > 0) {
+ if (!GetNextMatch ()) {
+ Status = EFI_OUT_OF_RESOURCES;
+ }
+ LastMatchLen--;
+ }
+
+ if (mMatchLen > mRemainder) {
+ mMatchLen = mRemainder;
+ }
+ }
+ }
+
+ HufEncodeEnd ();
+ FreeMemory ();
+ return (Status);
+}
+
+/**
+ The compression routine.
+
+ @param[in] SrcBuffer The buffer containing the source data.
+ @param[in] SrcSize The number of bytes in SrcBuffer.
+ @param[in] DstBuffer The buffer to put the compressed image in.
+ @param[in, out] DstSize On input the size (in bytes) of DstBuffer, on
+ return the number of bytes placed in DstBuffer.
+
+ @retval EFI_SUCCESS The compression was sucessful.
+ @retval EFI_BUFFER_TOO_SMALL The buffer was too small. DstSize is required.
+**/
+EFI_STATUS
+EFIAPI
+Compress (
+ IN VOID *SrcBuffer,
+ IN UINT64 SrcSize,
+ IN VOID *DstBuffer,
+ IN OUT UINT64 *DstSize
+ )
+{
+ EFI_STATUS Status;
+
+ //
+ // Initializations
+ //
+ mBufSiz = 0;
+ mBuf = NULL;
+ mText = NULL;
+ mLevel = NULL;
+ mChildCount = NULL;
+ mPosition = NULL;
+ mParent = NULL;
+ mPrev = NULL;
+ mNext = NULL;
+
+ mSrc = SrcBuffer;
+ mSrcUpperLimit = mSrc + SrcSize;
+ mDst = DstBuffer;
+ mDstUpperLimit = mDst +*DstSize;
+
+ PutDword (0L);
+ PutDword (0L);
+
+ MakeCrcTable ();
+
+ mOrigSize = mCompSize = 0;
+ mCrc = INIT_CRC;
+
+ //
+ // Compress it
+ //
+ Status = Encode ();
+ if (EFI_ERROR (Status)) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ //
+ // Null terminate the compressed data
+ //
+ if (mDst < mDstUpperLimit) {
+ *mDst++ = 0;
+ }
+ //
+ // Fill in compressed size and original size
+ //
+ mDst = DstBuffer;
+ PutDword (mCompSize + 1);
+ PutDword (mOrigSize);
+
+ //
+ // Return
+ //
+ if (mCompSize + 1 + 8 > *DstSize) {
+ *DstSize = mCompSize + 1 + 8;
+ return EFI_BUFFER_TOO_SMALL;
+ } else {
+ *DstSize = mCompSize + 1 + 8;
+ return EFI_SUCCESS;
+ }
+
+}
+
diff --git a/Platform/Intel/MinPlatformPkg/Library/CompressLib/CompressLib.inf b/Platform/Intel/MinPlatformPkg/Library/CompressLib/CompressLib.inf new file mode 100644 index 0000000000..86f41f1651 --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/Library/CompressLib/CompressLib.inf @@ -0,0 +1,41 @@ +## @file
+# UEFI Decompress Library implementation.
+#
+# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = CompressLib
+ FILE_GUID = d9249b61-30a7-456d-a3a1-23d24fed17aa
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = CompressLib
+
+
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+[Sources]
+ CompressLib.c
+
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ BaseMemoryLib
+
diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec index 94232c29b8..de7f8ae8c4 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec @@ -1,5 +1,6 @@ ## @file
-# Module describe the entire platform configuration.
+# This package provides the modules that build for a minimal platform.
+# This MinPlatformPkg should only depend on EDKII Core packages.
#
# The DEC files are used by the utilities that parse DSC and
# INF files to generate AutoGen.c and AutoGen.h files
@@ -31,6 +32,9 @@ Include [Ppis]
gEdkiiSiliconInitializedPpiGuid = {0x82a72dc8, 0x61ec, 0x403e, {0xb1, 0x5a, 0x8d, 0x7a, 0x3a, 0x71, 0x84, 0x98}}
+gPeiBaseMemoryTestPpiGuid = { 0xb6ec423c, 0x21d2, 0x490d, { 0x85, 0xc6, 0xdd, 0x58, 0x64, 0xea, 0xa6, 0x74 } }
+gPeiPlatformMemorySizePpiGuid = { 0x9a7ef41e, 0xc140, 0x4bd1, { 0xb8, 0x84, 0x1e, 0x11, 0x24, 0x0b, 0x4c, 0xe6 } }
+
[Guids]
gMinPlatformPkgTokenSpaceGuid = {0x69d13bf0, 0xaf91, 0x4d96, {0xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}}
@@ -72,69 +76,38 @@ SecBoardInitLib|Include/Library/SecBoardInitLib.h TestPointLib|Include/Library/TestPointLib.h
TestPointCheckLib|Include/Library/TestPointCheckLib.h
-[PcdsFixedAtBuild]
-
-##
-## The Flash relevant PCD are ineffective and will be patched basing on FDF definitions during build.
-## Set all of them to 0 here to prevent from confusion.
-##
-gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x10000001
-gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002
-
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT32|0x30000004
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT32|0x30000005
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UINT32|0x30000006
-
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UINT32|0x20000004
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UINT32|0x20000005
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UINT32|0x20000006
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000|UINT32|0x20000007
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000|UINT32|0x20000008
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x00000000|UINT32|0x20000009
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UINT32|0x2000000A
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UINT32|0x2000000B
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|UINT32|0x2000000C
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT32|0x2000000D
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT32|0x2000000E
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UINT32|0x2000000F
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UINT32|0x20000010
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT32|0x20000011
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UINT32|0x20000012
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UINT32|0x20000013
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UINT32|0x20000014
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000|UINT32|0x20000015
-
-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UINT32|0x20000016
-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT32|0x20000017
-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UINT32|0x20000018
-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x00000000|UINT32|0x20000019
-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x00000000|UINT32|0x2000001A
-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x00000000|UINT32|0x2000001B
+[PcdsFixedAtBuild, PcdsPatchableInModule]
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|0x00000000|UINT32|0x20000021
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize|0x00000000|UINT32|0x20000022
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset|0x00000000|UINT32|0x20000023
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase|0x00000000|UINT32|0x20000024
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize|0x00000000|UINT32|0x20000025
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset|0x00000000|UINT32|0x20000026
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32|0x20000027
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32|0x20000028
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT32|0x20000029
+gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|FALSE|BOOLEAN|0x80000008
gMinPlatformPkgTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32|0x80000000
gMinPlatformPkgTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x00000040|UINT32|0x80000001
gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0x00000000|UINT32|0x80000002
-gMinPlatformPkgTokenSpaceGuid.PcdApicLocalAddress|0xFEE00000|UINT64|0x9000000B
-gMinPlatformPkgTokenSpaceGuid.PcdApicLocalMmioSize|0x1000|UINT32|0x9000000C
+gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress|0xFEE00000|UINT32|0x9000000B
+gMinPlatformPkgTokenSpaceGuid.PcdLocalApicMmioSize|0x1000|UINT32|0x9000000C
-gMinPlatformPkgTokenSpaceGuid.PcdApicIoAddress|0xFEC00000|UINT64|0x9000000D
-gMinPlatformPkgTokenSpaceGuid.PcdApicIoMmioSize|0x1000|UINT32|0x9000000E
+gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress|0xFEC00000|UINT32|0x9000000D
+gMinPlatformPkgTokenSpaceGuid.PcdIoApicMmioSize|0x1000|UINT32|0x9000000E
+gMinPlatformPkgTokenSpaceGuid.PcdIoApicId|0x02|UINT8|0x90000014
gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi|0xF0|UINT8|0x90000012
gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi|0xF1|UINT8|0x90000013
-gMinPlatformPkgTokenSpaceGuid.PcdApicIoIdPch|0x02|UINT8|0x9000001E
+gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicCount|0|UINT8|0x90000015
+gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicIdBase|0x09|UINT8|0x90000016
+gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicAddressBase|0xFEC01000|UINT32|0x90000017
+gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicInterruptBase|24|UINT32|0x90000018
+
+gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2|UINT32|0x90000021
+gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8|UINT32|0x90000022
+gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|4|UINT32|0x90000023
+
+gMinPlatformPkgTokenSpaceGuid.PcdHpetTimerBlockId|0x8086A201|UINT32|0x90000024
+
+gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|0x90000025
+gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x90000026
+gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x90000027
gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0x65|UINT32|0x20000500
gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x30|UINT32|0x20000501
@@ -155,8 +128,6 @@ gMinPlatformPkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x1000|UINT32|0x10001003 #
gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0|UINT32|0x10001006
-gMinPlatformPkgTokenSpaceGuid.PcdPreferredPmProfile|0x0|UINT8|0x00100205
-
gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable|TRUE|BOOLEAN|0x00100206
#
@@ -179,11 +150,63 @@ gMinPlatformPkgTokenSpaceGuid.PcdHstiIbvPlatformFeature|{0x00, 0x00, 0x00}|VOID* # Stage memory: {0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
# Stage UEFI boot: {0x03, 0x07, 0x03, 0x05, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
# Stage OS boot: {0x03, 0x07, 0x03, 0x05, 0x3F, 0x00, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-# Stage Secure boot: {0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-# Stage Advanced: {0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00100302
+# Stage Secure boot: {0x03, 0x0F, 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+# Stage Advanced: {0x03, 0x0F, 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00100302
-[PcdsDynamic]
+[PcdsPatchableInModule]
+##
+## The Flash relevant PCD are ineffective and will be patched basing on FDF definitions during build.
+## Set all of them to 0 here to prevent from confusion.
+##
+gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x10000001
+gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002
+
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT32|0x30000004
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT32|0x30000005
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UINT32|0x30000006
+
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UINT32|0x20000004
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UINT32|0x20000005
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UINT32|0x20000006
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000|UINT32|0x20000007
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000|UINT32|0x20000008
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x00000000|UINT32|0x20000009
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UINT32|0x2000000A
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UINT32|0x2000000B
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|UINT32|0x2000000C
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT32|0x2000000D
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT32|0x2000000E
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UINT32|0x2000000F
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UINT32|0x20000010
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT32|0x20000011
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UINT32|0x20000012
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UINT32|0x20000013
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UINT32|0x20000014
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000|UINT32|0x20000015
+
+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UINT32|0x20000016
+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT32|0x20000017
+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UINT32|0x20000018
+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x00000000|UINT32|0x20000019
+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x00000000|UINT32|0x2000001A
+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x00000000|UINT32|0x2000001B
+
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|0x00000000|UINT32|0x20000021
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize|0x00000000|UINT32|0x20000022
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset|0x00000000|UINT32|0x20000023
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase|0x00000000|UINT32|0x20000024
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize|0x00000000|UINT32|0x20000025
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset|0x00000000|UINT32|0x20000026
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32|0x20000027
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32|0x20000028
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT32|0x20000029
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUBase|0x00000000|UINT32|0x2000002A
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUSize|0x00000000|UINT32|0x2000002B
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUOffset|0x00000000|UINT32|0x2000002C
+
+[PcdsDynamic, PcdsDynamicEx]
+gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x90000019
[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
@@ -205,11 +228,6 @@ gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, gMinPlatformPkgTokenSpaceGuid.PcdPciNoExtendedConfigSpace |FALSE|BOOLEAN|0x4001004C
gMinPlatformPkgTokenSpaceGuid.PcdPciResourceAssigned |FALSE|BOOLEAN|0x4001004D
- gMinPlatformPkgTokenSpaceGuid.PcdLowPowerS0Idle|0|UINT8|0x40000006
- gMinPlatformPkgTokenSpaceGuid.PcdTenSecondPowerButtonEnable|0|UINT8|0x40000008
- gMinPlatformPkgTokenSpaceGuid.PcdPciExpNative|0|UINT8|0x40000004
- gMinPlatformPkgTokenSpaceGuid.PcdNativeAspmEnable|1|UINT8|0x40000005
-
gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT16|0x00010035
gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT16|0x00010036
gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x1804|UINT16|0x0001037
diff --git a/Platform/Intel/MinPlatformPkg/Pci/Library/PciSegmentInfoLibSimple/PciSegmentInfoLibSimple.c b/Platform/Intel/MinPlatformPkg/Pci/Library/PciSegmentInfoLibSimple/PciSegmentInfoLibSimple.c index 0819e2ef0c..f216f224cd 100644 --- a/Platform/Intel/MinPlatformPkg/Pci/Library/PciSegmentInfoLibSimple/PciSegmentInfoLibSimple.c +++ b/Platform/Intel/MinPlatformPkg/Pci/Library/PciSegmentInfoLibSimple/PciSegmentInfoLibSimple.c @@ -26,6 +26,8 @@ EFI_GUID mPciSegmentInfoHobGuid = PCI_SEGMENT_INFO_HOB_GUID;
+volatile PCI_SEGMENT_INFO mPciSegmentInfo;
+
/**
Return an array of PCI_SEGMENT_INFO holding the segment information.
@@ -52,15 +54,27 @@ GetPciSegmentInfo ( if (Hob != NULL) {
PciSegmentInfo = GET_GUID_HOB_DATA(Hob);
} else {
- PciSegmentInfo = BuildGuidHob (&mPciSegmentInfoHobGuid, sizeof(PCI_SEGMENT_INFO));
- ASSERT(PciSegmentInfo != NULL);
- if (PciSegmentInfo == NULL) {
- return NULL;
+ mPciSegmentInfo.SegmentNumber = 0;
+ mPciSegmentInfo.BaseAddress = PcdGet64(PcdPciExpressBaseAddress);
+ mPciSegmentInfo.StartBusNumber = 0;
+ mPciSegmentInfo.EndBusNumber = (UINT8)((PcdGet32 (PcdPciExpressRegionLength) / 0x100000) - 1);
+
+ DEBUG ((DEBUG_INFO, "mPciSegmentInfo.BaseAddress - 0x%x\n", mPciSegmentInfo.BaseAddress));
+
+ if (mPciSegmentInfo.BaseAddress == 0) {
+ // Premem phase
+ PciSegmentInfo = BuildGuidHob (&mPciSegmentInfoHobGuid, sizeof(PCI_SEGMENT_INFO));
+ ASSERT(PciSegmentInfo != NULL);
+ if (PciSegmentInfo == NULL) {
+ return NULL;
+ }
+ PciSegmentInfo->SegmentNumber = 0;
+ PciSegmentInfo->BaseAddress = PcdGet64(PcdPciExpressBaseAddress);
+ PciSegmentInfo->StartBusNumber = 0;
+ PciSegmentInfo->EndBusNumber = (UINT8)((PcdGet32 (PcdPciExpressRegionLength) / 0x100000) - 1);
+ } else {
+ PciSegmentInfo = (VOID *)&mPciSegmentInfo;
}
- PciSegmentInfo->SegmentNumber = 0;
- PciSegmentInfo->BaseAddress = PcdGet64(PcdPciExpressBaseAddress);
- PciSegmentInfo->StartBusNumber = 0;
- PciSegmentInfo->EndBusNumber = 0xFF;
}
return PciSegmentInfo;
}
diff --git a/Platform/Intel/MinPlatformPkg/Pci/Library/PciSegmentInfoLibSimple/PciSegmentInfoLibSimple.inf b/Platform/Intel/MinPlatformPkg/Pci/Library/PciSegmentInfoLibSimple/PciSegmentInfoLibSimple.inf index 081910e5c5..f41523efa2 100644 --- a/Platform/Intel/MinPlatformPkg/Pci/Library/PciSegmentInfoLibSimple/PciSegmentInfoLibSimple.inf +++ b/Platform/Intel/MinPlatformPkg/Pci/Library/PciSegmentInfoLibSimple/PciSegmentInfoLibSimple.inf @@ -32,6 +32,7 @@ [Packages]
MdePkg/MdePkg.dec
+ MinPlatformPkg/MinPlatformPkg.dec
[LibraryClasses]
PcdLib
@@ -40,3 +41,4 @@ [Pcd]
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
+ gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.c b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.c index 99261471fa..f27bd09351 100644 --- a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.c +++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.c @@ -157,6 +157,30 @@ SetCacheMtrrAfterEndOfPei ( MemoryLength -= Power2Length;
}
+ DEBUG ((DEBUG_INFO, "PcdPciReservedMemAbove4GBLimit - 0x%lx\n", PcdGet64 (PcdPciReservedMemAbove4GBLimit)));
+ DEBUG ((DEBUG_INFO, "PcdPciReservedMemAbove4GBBase - 0x%lx\n", PcdGet64 (PcdPciReservedMemAbove4GBBase)));
+ if (PcdGet64 (PcdPciReservedMemAbove4GBLimit) > PcdGet64 (PcdPciReservedMemAbove4GBBase)) {
+ Status = MtrrSetMemoryAttributeInMtrrSettings (
+ &MtrrSetting,
+ PcdGet64 (PcdPciReservedMemAbove4GBBase),
+ PcdGet64 (PcdPciReservedMemAbove4GBLimit) - PcdGet64 (PcdPciReservedMemAbove4GBBase) + 1,
+ CacheUncacheable
+ );
+ ASSERT_EFI_ERROR ( Status);
+ }
+
+ DEBUG ((DEBUG_INFO, "PcdPciReservedPMemAbove4GBLimit - 0x%lx\n", PcdGet64 (PcdPciReservedPMemAbove4GBLimit)));
+ DEBUG ((DEBUG_INFO, "PcdPciReservedPMemAbove4GBBase - 0x%lx\n", PcdGet64 (PcdPciReservedPMemAbove4GBBase)));
+ if (PcdGet64 (PcdPciReservedPMemAbove4GBLimit) > PcdGet64 (PcdPciReservedPMemAbove4GBBase)) {
+ Status = MtrrSetMemoryAttributeInMtrrSettings (
+ &MtrrSetting,
+ PcdGet64 (PcdPciReservedPMemAbove4GBBase),
+ PcdGet64 (PcdPciReservedPMemAbove4GBLimit) - PcdGet64 (PcdPciReservedPMemAbove4GBBase) + 1,
+ CacheUncacheable
+ );
+ ASSERT_EFI_ERROR ( Status);
+ }
+
//
// Update MTRR setting from MTRR buffer
//
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.inf b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.inf index 264a9b23b9..9fc4d1a612 100644 --- a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.inf +++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.inf @@ -56,4 +56,8 @@ [Depex]
gEfiPeiMemoryDiscoveredPpiGuid
-[FixedPcd]
+[Pcd]
+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBBase
+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit
+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemAbove4GBBase
+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemAbove4GBLimit
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c index 162a0acc41..dfb64e4bc5 100644 --- a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c +++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c @@ -32,6 +32,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include <Library/BoardInitLib.h>
#include <Library/TestPointCheckLib.h>
#include <Guid/MemoryTypeInformation.h>
+#include <Ppi/PlatformMemorySize.h>
+#include <Ppi/BaseMemoryTest.h>
EFI_STATUS
EFIAPI
@@ -49,6 +51,40 @@ MemoryDiscoveredPpiNotifyCallback ( IN VOID *Ppi
);
+EFI_STATUS
+EFIAPI
+GetPlatformMemorySize (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_PLATFORM_MEMORY_SIZE_PPI *This,
+ IN OUT UINT64 *MemorySize
+ );
+
+/**
+
+ This function checks the memory range in PEI.
+
+ @param PeiServices Pointer to PEI Services.
+ @param This Pei memory test PPI pointer.
+ @param BeginAddress Beginning of the memory address to be checked.
+ @param MemoryLength Bytes of memory range to be checked.
+ @param Operation Type of memory check operation to be performed.
+ @param ErrorAddress Return the address of the error memory address.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_DEVICE_ERROR Memory test failed. It's not safe to use this range of memory.
+
+**/
+EFI_STATUS
+EFIAPI
+BaseMemoryTest (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_BASE_MEMORY_TEST_PPI *This,
+ IN EFI_PHYSICAL_ADDRESS BeginAddress,
+ IN UINT64 MemoryLength,
+ IN PEI_MEMORY_TEST_OP Operation,
+ OUT EFI_PHYSICAL_ADDRESS *ErrorAddress
+ );
+
static EFI_PEI_NOTIFY_DESCRIPTOR mPreMemNotifyList = {
(EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
&gEfiPeiReadOnlyVariable2PpiGuid,
@@ -73,6 +109,23 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR mPpiBootMode = { NULL
};
+static PEI_BASE_MEMORY_TEST_PPI mPeiBaseMemoryTestPpi = { BaseMemoryTest };
+
+static PEI_PLATFORM_MEMORY_SIZE_PPI mMemoryMemorySizePpi = { GetPlatformMemorySize };
+
+static EFI_PEI_PPI_DESCRIPTOR mMemPpiList[] = {
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI,
+ &gPeiBaseMemoryTestPpiGuid,
+ &mPeiBaseMemoryTestPpi
+ },
+ {
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gPeiPlatformMemorySizePpiGuid,
+ &mMemoryMemorySizePpi
+ },
+};
+
///
/// Memory Reserved should be between 125% to 150% of the Current required memory
/// otherwise BdsMisc.c would do a reset to make it 125% to avoid s4 resume issues.
@@ -131,6 +184,160 @@ BuildMemoryTypeInformation ( );
}
+EFI_STATUS
+EFIAPI
+GetPlatformMemorySize (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_PLATFORM_MEMORY_SIZE_PPI *This,
+ IN OUT UINT64 *MemorySize
+ )
+{
+ EFI_STATUS Status;
+ EFI_PEI_READ_ONLY_VARIABLE2_PPI *Variable;
+ UINTN DataSize;
+ EFI_MEMORY_TYPE_INFORMATION MemoryData[EfiMaxMemoryType + 1];
+ UINTN Index;
+ EFI_BOOT_MODE BootMode;
+ UINTN IndexNumber;
+
+#define PEI_MIN_MEMORY_SIZE (EFI_PHYSICAL_ADDRESS) ((320 * 0x100000))
+
+ *MemorySize = PEI_MIN_MEMORY_SIZE;
+ Status = PeiServicesLocatePpi (
+ &gEfiPeiReadOnlyVariable2PpiGuid,
+ 0,
+ NULL,
+ (VOID **)&Variable
+ );
+
+ ASSERT_EFI_ERROR (Status);
+
+ Status = PeiServicesGetBootMode (&BootMode);
+ ASSERT_EFI_ERROR (Status);
+
+ DataSize = sizeof (MemoryData);
+
+ Status = Variable->GetVariable (
+ Variable,
+ EFI_MEMORY_TYPE_INFORMATION_VARIABLE_NAME,
+ &gEfiMemoryTypeInformationGuid,
+ NULL,
+ &DataSize,
+ &MemoryData
+ );
+ IndexNumber = sizeof (mDefaultMemoryTypeInformation) / sizeof (EFI_MEMORY_TYPE_INFORMATION);
+
+ //
+ // Accumulate maximum amount of memory needed
+ //
+
+ DEBUG((EFI_D_ERROR, "PEI_MIN_MEMORY_SIZE:%dKB \n", DivU64x32(*MemorySize,1024)));
+ DEBUG((EFI_D_ERROR, "IndexNumber:%d MemoryDataNumber%d \n", IndexNumber,DataSize/ sizeof (EFI_MEMORY_TYPE_INFORMATION)));
+ if (EFI_ERROR (Status)) {
+ //
+ // Start with minimum memory
+ //
+ for (Index = 0; Index < IndexNumber; Index++) {
+ DEBUG((EFI_D_ERROR, "Index[%d].Type = %d .NumberOfPages=0x%x\n", Index,mDefaultMemoryTypeInformation[Index].Type,mDefaultMemoryTypeInformation[Index].NumberOfPages));
+ *MemorySize += mDefaultMemoryTypeInformation[Index].NumberOfPages * EFI_PAGE_SIZE;
+ }
+ DEBUG((EFI_D_ERROR, "No memory type, Total platform memory:%dKB \n", DivU64x32(*MemorySize,1024)));
+ } else {
+ //
+ // Start with at least 0x200 pages of memory for the DXE Core and the DXE Stack
+ //
+ for (Index = 0; Index < IndexNumber; Index++) {
+ DEBUG((EFI_D_ERROR, "Index[%d].Type = %d .NumberOfPages=0x%x\n", Index,MemoryData[Index].Type,MemoryData[Index].NumberOfPages));
+ *MemorySize += MemoryData[Index].NumberOfPages * EFI_PAGE_SIZE;
+
+ }
+ DEBUG((EFI_D_ERROR, "has memory type, Total platform memory:%dKB \n", DivU64x32(*MemorySize,1024)));
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+
+ This function checks the memory range in PEI.
+
+ @param PeiServices Pointer to PEI Services.
+ @param This Pei memory test PPI pointer.
+ @param BeginAddress Beginning of the memory address to be checked.
+ @param MemoryLength Bytes of memory range to be checked.
+ @param Operation Type of memory check operation to be performed.
+ @param ErrorAddress Return the address of the error memory address.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_DEVICE_ERROR Memory test failed. It's not safe to use this range of memory.
+
+**/
+EFI_STATUS
+EFIAPI
+BaseMemoryTest (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_BASE_MEMORY_TEST_PPI *This,
+ IN EFI_PHYSICAL_ADDRESS BeginAddress,
+ IN UINT64 MemoryLength,
+ IN PEI_MEMORY_TEST_OP Operation,
+ OUT EFI_PHYSICAL_ADDRESS *ErrorAddress
+ )
+{
+ UINT32 TestPattern;
+ UINT32 SpanSize;
+ EFI_PHYSICAL_ADDRESS TempAddress;
+
+#define MEMORY_TEST_PATTERN 0x5A5A5A5A
+#define MEMORY_TEST_COVER_SPAN 0x40000
+
+ TestPattern = MEMORY_TEST_PATTERN;
+ SpanSize = 0;
+
+ //
+ // Make sure we don't try and test anything above the max physical address range
+ //
+ ASSERT (BeginAddress + MemoryLength < MAX_ADDRESS);
+
+ switch (Operation) {
+ case Extensive:
+ SpanSize = 0x4;
+ break;
+
+ case Sparse:
+ case Quick:
+ SpanSize = MEMORY_TEST_COVER_SPAN;
+ break;
+
+ case Ignore:
+ goto Done;
+ break;
+ }
+ //
+ // Write the test pattern into memory range
+ //
+ TempAddress = BeginAddress;
+ while (TempAddress < BeginAddress + MemoryLength) {
+ (*(UINT32 *) (UINTN) TempAddress) = TestPattern;
+ TempAddress += SpanSize;
+ }
+ //
+ // Read pattern from memory and compare it
+ //
+ TempAddress = BeginAddress;
+ while (TempAddress < BeginAddress + MemoryLength) {
+ if ((*(UINT32 *) (UINTN) TempAddress) != TestPattern) {
+ *ErrorAddress = TempAddress;
+ return EFI_DEVICE_ERROR;
+ }
+
+ TempAddress += SpanSize;
+ }
+
+Done:
+
+ return EFI_SUCCESS;
+}
+
/**
Set Cache Mtrr.
**/
@@ -160,8 +367,8 @@ SetCacheMtrr ( ///
Status = MtrrSetMemoryAttributeInMtrrSettings (
&MtrrSetting,
- (UINTN) FixedPcdGet32 (PcdFlashAreaBaseAddress),
- (UINTN) FixedPcdGet32 (PcdFlashAreaSize),
+ (UINTN) PcdGet32 (PcdFlashAreaBaseAddress),
+ (UINTN) PcdGet32 (PcdFlashAreaSize),
CacheWriteProtected
);
ASSERT_EFI_ERROR (Status);
@@ -314,7 +521,43 @@ ReportCpuHob ( }
VOID
-ReportFv (
+ReportPreMemFv (
+ VOID
+ )
+{
+ if (!PcdGetBool(PcdFspWrapperBootMode)) {
+ DEBUG ((DEBUG_INFO, "Install FlashFvFspM - 0x%x, 0x%x\n", PcdGet32 (PcdFlashFvFspMBase), PcdGet32 (PcdFlashFvFspMSize)));
+ PeiServicesInstallFvInfo2Ppi (
+ &(((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFlashFvFspMBase))->FileSystemGuid),
+ (VOID *) (UINTN) PcdGet32 (PcdFlashFvFspMBase),
+ PcdGet32 (PcdFlashFvFspMSize),
+ NULL,
+ NULL,
+ 0
+ );
+ }
+ DEBUG ((DEBUG_INFO, "Install FlashFvSecurity - 0x%x, 0x%x\n", PcdGet32 (PcdFlashFvSecurityBase), PcdGet32 (PcdFlashFvSecuritySize)));
+ PeiServicesInstallFvInfo2Ppi (
+ &(((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFlashFvSecurityBase))->FileSystemGuid),
+ (VOID *) (UINTN) PcdGet32 (PcdFlashFvSecurityBase),
+ PcdGet32 (PcdFlashFvSecuritySize),
+ NULL,
+ NULL,
+ 0
+ );
+ DEBUG ((DEBUG_INFO, "Install FlashFvAdvanced - 0x%x, 0x%x\n", PcdGet32 (PcdFlashFvAdvancedBase), PcdGet32 (PcdFlashFvAdvancedSize)));
+ PeiServicesInstallFvInfo2Ppi (
+ &(((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFlashFvAdvancedBase))->FileSystemGuid),
+ (VOID *) (UINTN) PcdGet32 (PcdFlashFvAdvancedBase),
+ PcdGet32 (PcdFlashFvAdvancedSize),
+ NULL,
+ NULL,
+ 0
+ );
+}
+
+VOID
+ReportPostMemFv (
VOID
)
{
@@ -332,27 +575,49 @@ ReportFv ( /// Prepare the recovery service
///
} else {
-
+ DEBUG ((DEBUG_INFO, "Install FlashFvPostMemory - 0x%x, 0x%x\n", PcdGet32 (PcdFlashFvPostMemoryBase), PcdGet32 (PcdFlashFvPostMemorySize)));
PeiServicesInstallFvInfo2Ppi (
- &(((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) FixedPcdGet32 (PcdFlashFvPostMemoryBase))->FileSystemGuid),
- (VOID *) (UINTN) FixedPcdGet32 (PcdFlashFvPostMemoryBase),
- FixedPcdGet32 (PcdFlashFvPostMemorySize),
+ &(((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFlashFvPostMemoryBase))->FileSystemGuid),
+ (VOID *) (UINTN) PcdGet32 (PcdFlashFvPostMemoryBase),
+ PcdGet32 (PcdFlashFvPostMemorySize),
NULL,
NULL,
0
);
+ if (!PcdGetBool(PcdFspWrapperBootMode)) {
+ DEBUG ((DEBUG_INFO, "Install FlashFvFspS - 0x%x, 0x%x\n", PcdGet32 (PcdFlashFvFspSBase), PcdGet32 (PcdFlashFvFspSSize)));
+ PeiServicesInstallFvInfo2Ppi (
+ &(((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFlashFvFspSBase))->FileSystemGuid),
+ (VOID *) (UINTN) PcdGet32 (PcdFlashFvFspSBase),
+ PcdGet32 (PcdFlashFvFspSSize),
+ NULL,
+ NULL,
+ 0
+ );
+ DEBUG ((DEBUG_INFO, "Install FlashFvFspU - 0x%x, 0x%x\n", PcdGet32 (PcdFlashFvFspUBase), PcdGet32 (PcdFlashFvFspUSize)));
+ PeiServicesInstallFvInfo2Ppi (
+ &(((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFlashFvFspUBase))->FileSystemGuid),
+ (VOID *) (UINTN) PcdGet32 (PcdFlashFvFspUBase),
+ PcdGet32 (PcdFlashFvFspUSize),
+ NULL,
+ NULL,
+ 0
+ );
+ }
+ DEBUG ((DEBUG_INFO, "Install FlashFvUefiBoot - 0x%x, 0x%x\n", PcdGet32 (PcdFlashFvUefiBootBase), PcdGet32 (PcdFlashFvUefiBootSize)));
PeiServicesInstallFvInfo2Ppi (
- &(((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) FixedPcdGet32 (PcdFlashFvUefiBootBase))->FileSystemGuid),
- (VOID *) (UINTN) FixedPcdGet32 (PcdFlashFvUefiBootBase),
- FixedPcdGet32 (PcdFlashFvUefiBootSize),
+ &(((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFlashFvUefiBootBase))->FileSystemGuid),
+ (VOID *) (UINTN) PcdGet32 (PcdFlashFvUefiBootBase),
+ PcdGet32 (PcdFlashFvUefiBootSize),
NULL,
NULL,
0
);
+ DEBUG ((DEBUG_INFO, "Install FlashFvOsBoot - 0x%x, 0x%x\n", PcdGet32 (PcdFlashFvOsBootBase), PcdGet32 (PcdFlashFvOsBootSize)));
PeiServicesInstallFvInfo2Ppi (
- &(((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) FixedPcdGet32 (PcdFlashFvOsBootBase))->FileSystemGuid),
- (VOID *) (UINTN) FixedPcdGet32 (PcdFlashFvOsBootBase),
- FixedPcdGet32 (PcdFlashFvOsBootSize),
+ &(((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFlashFvOsBootBase))->FileSystemGuid),
+ (VOID *) (UINTN) PcdGet32 (PcdFlashFvOsBootBase),
+ PcdGet32 (PcdFlashFvOsBootSize),
NULL,
NULL,
0
@@ -367,19 +632,14 @@ ReportFv ( (EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE),
- (UINTN) FixedPcdGet32 (PcdFlashAreaBaseAddress),
- (UINTN) FixedPcdGet32 (PcdFlashAreaSize)
+ (UINTN) PcdGet32 (PcdFlashAreaBaseAddress),
+ (UINTN) PcdGet32 (PcdFlashAreaSize)
);
BuildMemoryAllocationHob (
- (UINTN) FixedPcdGet32 (PcdFlashAreaBaseAddress),
- (UINTN) FixedPcdGet32 (PcdFlashAreaSize),
+ (UINTN) PcdGet32 (PcdFlashAreaBaseAddress),
+ (UINTN) PcdGet32 (PcdFlashAreaSize),
EfiMemoryMappedIO
);
-
- BuildFvHob (
- (UINTN) FixedPcdGet32 (PcdFlashAreaBaseAddress),
- (UINTN) FixedPcdGet32 (PcdFlashAreaSize)
- );
}
/**
@@ -423,7 +683,7 @@ MemoryDiscoveredPpiNotifyCallback ( return EFI_SUCCESS;
}
- ReportFv ();
+ ReportPostMemFv ();
TestPointMemoryDiscoveredFvInfoFunctional ();
@@ -488,6 +748,11 @@ PlatformInitPreMem ( BuildMemoryTypeInformation ();
+ if (!PcdGetBool(PcdFspWrapperBootMode)) {
+ Status = PeiServicesInstallPpi (mMemPpiList);
+ ASSERT_EFI_ERROR (Status);
+ }
+
Status = BoardInitBeforeMemoryInit ();
ASSERT_EFI_ERROR (Status);
@@ -513,6 +778,8 @@ PlatformInitPreMemEntryPoint ( {
EFI_STATUS Status;
+ ReportPreMemFv ();
+
///
/// Performing PlatformInitPreMem after PeiReadOnlyVariable2 PPI produced
///
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf index e67cc0ff24..996f6dd70a 100644 --- a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf +++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf @@ -41,14 +41,25 @@ UefiCpuPkg/UefiCpuPkg.dec
[Pcd]
+ gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode
gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUBase ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUSize ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit
gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit
@@ -67,6 +78,8 @@ gEfiPeiMasterBootModePpiGuid ## PRODUCES
gEfiPeiBootInRecoveryModePpiGuid ## PRODUCES
gEfiPeiReadOnlyVariable2PpiGuid
+ gPeiBaseMemoryTestPpiGuid
+ gPeiPlatformMemorySizePpiGuid
[Guids]
gEfiMemoryTypeInformationGuid
diff --git a/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/SmmCheckPaging.c b/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/SmmCheckPaging.c index 42f487d9d2..c978d2694c 100644 --- a/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/SmmCheckPaging.c +++ b/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/SmmCheckPaging.c @@ -18,6 +18,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include <Library/DebugLib.h>
#include <Library/SmmServicesTableLib.h>
#include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h>
#include <Guid/MemoryAttributesTable.h>
#include <Register/SmramSaveStateMap.h>
#include <Register/StmApi.h>
@@ -200,18 +201,69 @@ GetSmBaseOnCurrentProcessor ( SmBaseBuffer->Valid = TRUE;
}
+UINT64 *mSmBaseBuffer;
+
+VOID
+SetupSmBaseBuffer (
+ VOID
+ )
+{
+ volatile SMBASE_SHARED_BUFFER SmBaseBuffer;
+ EFI_STATUS Status;
+ UINTN Index;
+ UINTN Base = 0;
+ UINTN Delta = 0;
+
+ if (mSmBaseBuffer != NULL) {
+ return ;
+ }
+
+ mSmBaseBuffer = AllocatePool (sizeof(UINT64) * gSmst->NumberOfCpus);
+ ASSERT(mSmBaseBuffer != NULL);
+
+ for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {
+ ZeroMem ((VOID *)&SmBaseBuffer, sizeof(SmBaseBuffer));
+ if (Index == gSmst->CurrentlyExecutingCpu) {
+ GetSmBaseOnCurrentProcessor ((VOID *)&SmBaseBuffer);
+ DEBUG ((DEBUG_INFO, "SmbaseBsp(%d) - 0x%x\n", Index, SmBaseBuffer.SmBase));
+ } else {
+ Status = gSmst->SmmStartupThisAp (GetSmBaseOnCurrentProcessor, Index, (VOID *)&SmBaseBuffer);
+ if (!FeaturePcdGet (PcdCpuHotPlugSupport)) {
+ ASSERT_EFI_ERROR (Status);
+ }
+ if (EFI_ERROR(Status)) {
+ SmBaseBuffer.SmBase = Base + Delta * Index;
+ DEBUG ((DEBUG_INFO, "SmbaseAp(%d) - unknown, guess - 0x%x\n", Index, SmBaseBuffer.SmBase));
+ } else {
+ while (!SmBaseBuffer.Valid) {
+ CpuPause ();
+ }
+ DEBUG ((DEBUG_INFO, "SmbaseAp(%d) - 0x%x\n", Index, SmBaseBuffer.SmBase));
+ }
+ }
+ mSmBaseBuffer[Index] = SmBaseBuffer.SmBase;
+ if (Base == 0) {
+ Base = (UINTN)SmBaseBuffer.SmBase;
+ DEBUG ((DEBUG_INFO, "-- Base - 0x%x\n", Base));
+ } else if (Delta == 0) {
+ Delta = (UINTN)(SmBaseBuffer.SmBase - Base);
+ DEBUG ((DEBUG_INFO, "-- Delta - 0x%x\n", Delta));
+ }
+ }
+}
+
BOOLEAN
IsSmmSaveState (
IN EFI_PHYSICAL_ADDRESS BaseAddress
)
{
- volatile SMBASE_SHARED_BUFFER SmBaseBuffer;
- EFI_STATUS Status;
UINTN Index;
UINTN TileCodeSize;
UINTN TileDataSize;
UINTN TileSize;
+ SetupSmBaseBuffer ();
+
TileCodeSize = SIZE_4KB; // BUGBUG: Assume 4KB
TileCodeSize = ALIGN_VALUE(TileCodeSize, SIZE_4KB);
TileDataSize = (SMRAM_SAVE_STATE_MAP_OFFSET - TXT_SMM_PSD_OFFSET) + sizeof (SMRAM_SAVE_STATE_MAP);
@@ -220,23 +272,11 @@ IsSmmSaveState ( TileSize = 2 * GetPowerOfTwo32 ((UINT32)TileSize);
for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {
- ZeroMem ((VOID *)&SmBaseBuffer, sizeof(SmBaseBuffer));
- if (Index == gSmst->CurrentlyExecutingCpu) {
- GetSmBaseOnCurrentProcessor ((VOID *)&SmBaseBuffer);
- DEBUG ((DEBUG_INFO, "SmbaseBsp(%d) - 0x%x\n", Index, SmBaseBuffer.SmBase));
- } else {
- Status = gSmst->SmmStartupThisAp (GetSmBaseOnCurrentProcessor, Index, (VOID *)&SmBaseBuffer);
- ASSERT_EFI_ERROR (Status);
- while (!SmBaseBuffer.Valid) {
- CpuPause ();
- }
- DEBUG ((DEBUG_INFO, "SmbaseAp(%d) - 0x%x\n", Index, SmBaseBuffer.SmBase));
- }
if (Index == gSmst->NumberOfCpus - 1) {
TileSize = SIZE_32KB;
}
- if ((BaseAddress >= SmBaseBuffer.SmBase + SMM_HANDLER_OFFSET + TileCodeSize) &&
- (BaseAddress < SmBaseBuffer.SmBase + SMM_HANDLER_OFFSET + TileSize)) {
+ if ((BaseAddress >= mSmBaseBuffer[Index] + SMM_HANDLER_OFFSET + TileCodeSize) &&
+ (BaseAddress < mSmBaseBuffer[Index] + SMM_HANDLER_OFFSET + TileSize)) {
return TRUE;
}
}
diff --git a/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf b/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf index 9fc592bbf8..ac79431649 100644 --- a/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf +++ b/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf @@ -54,6 +54,8 @@ [Pcd]
gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmBlockStartupThisAp
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport
[Guids]
gEdkiiPiSmmMemoryAttributesTableGuid
diff --git a/Platform/Intel/MinPlatformPkg/Tools/AmlGenOffset/AmlGenOffset.py b/Platform/Intel/MinPlatformPkg/Tools/AmlGenOffset/AmlGenOffset.py new file mode 100644 index 0000000000..312c1abb75 --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/Tools/AmlGenOffset/AmlGenOffset.py @@ -0,0 +1,78 @@ +## @file
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+'''
+AmlGenOffset
+'''
+
+import os
+import sys
+import argparse
+import subprocess
+import uuid
+import struct
+import collections
+import binascii
+import re
+from ctypes import *
+
+#
+# Globals for help information
+#
+__prog__ = 'AmlGenOffset'
+__version__ = '%s Version %s' % (__prog__, '0.1 ')
+__copyright__ = 'Copyright (c) 2017, Intel Corporation. All rights reserved.'
+__usage__ = '%s -e|-d [options] <input_file>' % (__prog__)
+
+
+if __name__ == '__main__':
+ #
+ # Create command line argument parser object
+ #
+ parser = argparse.ArgumentParser(prog=__prog__, version=__version__, usage=__usage__, description=__copyright__, conflict_handler='resolve')
+ group = parser.add_mutually_exclusive_group(required=True)
+ group.add_argument("-e", action="store_true", dest='Encode', help='encode file')
+ group.add_argument("-d", action="store_true", dest='Decode', help='decode file')
+ parser.add_argument("-o", "--output", dest='OutputFile', type=str, metavar='filename', help="specify the output filename", required=True)
+ parser.add_argument("-v", "--verbose", dest='Verbose', action="store_true", help="increase output messages")
+ parser.add_argument("-q", "--quiet", dest='Quiet', action="store_true", help="reduce output messages")
+ parser.add_argument("--debug", dest='Debug', type=int, metavar='[0-9]', choices=range(0,10), default=0, help="set debug level")
+ parser.add_argument("--aml_filter", dest='AmlFilterStr', type=str, help="specify the AML filter.")
+ parser.add_argument(metavar="input_file", dest='InputFile', type=argparse.FileType('rb'), help="specify the input filename")
+
+ #
+ # Parse command line arguments
+ #
+ args = parser.parse_args()
+
+ if args.Encode:
+ print 'Unsupported'
+
+ if args.Decode:
+ args.OutputFileName = args.OutputFile
+ args.OutputFile = open(args.OutputFileName, 'wb')
+
+ AmlFilter = args.AmlFilterStr
+ filter_pattern = '|'.join(AmlFilter.split(' '))
+
+ lines = args.InputFile.readlines()
+ args.InputFile.close()
+ for line in lines:
+ if line.strip().startswith('{\"') == False:
+ if line.strip().startswith('* Compilation') == False and line.strip().startswith('* ASL+') == False and line.strip().startswith('* Copyright') == False:
+ args.OutputFile.write(line)
+ else:
+ match_obj = re.search(filter_pattern, line, re.M | re.I)
+ if match_obj is not None:
+ args.OutputFile.write(line)
+ args.OutputFile.close()
+
diff --git a/Platform/Intel/MinPlatformPkg/Tools/ParseVar/ParseVar.py b/Platform/Intel/MinPlatformPkg/Tools/ParseVar/ParseVar.py new file mode 100644 index 0000000000..b70b01fd14 --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/Tools/ParseVar/ParseVar.py @@ -0,0 +1,255 @@ +## @file
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+'''
+ParseVar
+'''
+
+import os
+import sys
+import argparse
+import subprocess
+import uuid
+import struct
+import collections
+import binascii
+from ctypes import *
+
+#
+# Globals for help information
+#
+__prog__ = 'ParseVar'
+__version__ = '%s Version %s' % (__prog__, '0.1 ')
+__copyright__ = 'Copyright (c) 2017, Intel Corporation. All rights reserved.'
+__usage__ = '%s -e|-d [options] <input_file>' % (__prog__)
+
+class GUID(Structure):
+ _fields_ = [
+ ('Guid1', c_uint32),
+ ('Guid2', c_uint16),
+ ('Guid3', c_uint16),
+ ('Guid4', ARRAY(c_uint8, 8)),
+ ]
+
+class TIME(Structure):
+ _fields_ = [
+ ('Year', c_uint16),
+ ('Month', c_uint8),
+ ('Day', c_uint8),
+ ('Hour', c_uint8),
+ ('Minute', c_uint8),
+ ('Second', c_uint8),
+ ('Pad1', c_uint8),
+ ('Nanosecond', c_uint32),
+ ('TimeZone', c_uint16),
+ ('Daylight', c_uint8),
+ ('Pad2', c_uint8),
+ ]
+
+EFI_VARIABLE_GUID = [0xddcf3616, 0x3275, 0x4164, 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d]
+EFI_AUTHENTICATED_VARIABLE_GUID = [0xaaf32c78, 0x947b, 0x439a, 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92]
+
+# Variable Store Header Format.
+VARIABLE_STORE_FORMATTED = 0x5a
+# Variable Store Header State.
+VARIABLE_STORE_HEALTHY = 0xfe
+
+class VARIABLE_STORE_HEADER(Structure):
+ _fields_ = [
+ ('Signature', GUID),
+ ('Size', c_uint32),
+ ('Format', c_uint8),
+ ('State', c_uint8),
+ ('Reserved', c_uint16),
+ ('Reserved1', c_uint32),
+ ]
+
+# Variable data start flag.
+VARIABLE_DATA = 0x55AA
+
+# Variable State flags.
+VAR_IN_DELETED_TRANSITION = 0xfe
+VAR_DELETED = 0xfd
+VAR_HEADER_VALID_ONLY = 0x7f
+VAR_ADDED = 0x3f
+
+class VARIABLE_HEADER(Structure):
+ _fields_ = [
+ ('StartId', c_uint16),
+ ('State', c_uint8),
+ ('Reserved', c_uint8),
+ ('Attributes', c_uint32),
+ ('NameSize', c_uint32),
+ ('DataSize', c_uint32),
+ ('VendorGuid', GUID),
+ ]
+
+class AUTHENTICATED_VARIABLE_HEADER(Structure):
+ _fields_ = [
+ ('StartId', c_uint16),
+ ('State', c_uint8),
+ ('Reserved', c_uint8),
+ ('Attributes', c_uint32),
+ ('MonotonicCount', c_uint64),
+ ('TimeStamp', TIME),
+ ('PubKeyIndex', c_uint32),
+ ('NameSize', c_uint32),
+ ('DataSize', c_uint32),
+ ('VendorGuid', GUID),
+ ]
+
+# Alignment of Variable Data Header in Variable Store region.
+HEADER_ALIGNMENT = 4
+
+class DEFAULT_INFO(Structure):
+ _fields_ = [
+ ('DefaultId', c_uint16),
+ ('BoardId', c_uint8),
+ ('Reserved', c_uint8),
+ ]
+
+class DEFAULT_DATA(Structure):
+ _fields_ = [
+ ('HeaderSize', c_uint16),
+ ('DefaultInfo', DEFAULT_INFO),
+ ]
+
+
+def DumpHexData(Data):
+ CharPerLine = 8
+ DataLen = len(Data)
+ Count = DataLen / CharPerLine
+ Rem = DataLen % CharPerLine
+ CountIndex = 0
+ for CountIndex in range (0, Count) :
+ TempData = Data[CountIndex * CharPerLine:CountIndex * CharPerLine + CharPerLine]
+ print "#// %04x: "%(CountIndex*CharPerLine) + binascii.hexlify(TempData)
+ if Rem != 0 :
+ TempData = Data[Count * CharPerLine:Count * CharPerLine + Rem]
+ print "#// %04x: "%(Count*CharPerLine) + binascii.hexlify(TempData)
+
+def DumpBin(Data):
+ DataLen = len(Data)
+ for Index in range (0, DataLen - 1) :
+ print "0x%02x,"%(Data[Index]),
+ print "0x%02x"%(Data[DataLen - 1]),
+
+def DumpName(Data):
+ DataLen = len(Data)
+ for Index in range (0, DataLen/2 - 1) :
+ print "%c"%(Data[Index * 2]),
+
+
+if __name__ == '__main__':
+ #
+ # Create command line argument parser object
+ #
+ parser = argparse.ArgumentParser(prog=__prog__, version=__version__, usage=__usage__, description=__copyright__, conflict_handler='resolve')
+ group = parser.add_mutually_exclusive_group(required=True)
+ group.add_argument("-e", action="store_true", dest='Encode', help='encode file')
+ group.add_argument("-d", action="store_true", dest='Decode', help='decode file')
+ parser.add_argument("-v", "--verbose", dest='Verbose', action="store_true", help="increase output messages")
+ parser.add_argument("-q", "--quiet", dest='Quiet', action="store_true", help="reduce output messages")
+ parser.add_argument("--debug", dest='Debug', type=int, metavar='[0-9]', choices=range(0,10), default=0, help="set debug level")
+ parser.add_argument(metavar="input_file", dest='InputFile', type=argparse.FileType('rb'), help="specify the input filename")
+
+ #
+ # Parse command line arguments
+ #
+ args = parser.parse_args()
+
+ #
+ # Read input file into a buffer and save input filename
+ #
+ args.InputFileName = args.InputFile.name
+ args.InputFileBuffer = args.InputFile.read()
+ args.InputFile.close()
+
+ if args.Encode:
+ print 'Unsupported'
+
+ if args.Decode:
+ print '#//FCE binary'
+
+ FullInputFileBuffer = bytearray(args.InputFileBuffer)
+ FullSize = len(FullInputFileBuffer)
+
+ DefaultData = DEFAULT_DATA.from_buffer (bytearray(args.InputFileBuffer), 0)
+ print "#// DEFAULT_DATA:"
+ print "#// HeaderSize - 0x%04x" % DefaultData.HeaderSize
+ print "#// DefaultId - 0x%04x" % DefaultData.DefaultInfo.DefaultId
+ print "#// BoardId - 0x%02x" % DefaultData.DefaultInfo.BoardId
+ print ""
+
+ Offset = DefaultData.HeaderSize
+ VariableStoreHeader = VARIABLE_STORE_HEADER.from_buffer (bytearray(args.InputFileBuffer), Offset)
+ print "#// VARIABLE_STORE_HEADER:"
+ print "#// Signature - %08x-%04x-%04x-%02x%02x-%02x%02x%02x%02x%02x%02x" % (VariableStoreHeader.Signature.Guid1, VariableStoreHeader.Signature.Guid2, VariableStoreHeader.Signature.Guid3, VariableStoreHeader.Signature.Guid4[0], VariableStoreHeader.Signature.Guid4[1], VariableStoreHeader.Signature.Guid4[2], VariableStoreHeader.Signature.Guid4[3], VariableStoreHeader.Signature.Guid4[4], VariableStoreHeader.Signature.Guid4[5], VariableStoreHeader.Signature.Guid4[6], VariableStoreHeader.Signature.Guid4[7])
+ print "#// Size - 0x%08x" % VariableStoreHeader.Size
+ print "#// Format - 0x%02x" % VariableStoreHeader.Format
+ print "#// State - 0x%02x" % VariableStoreHeader.State
+ print ""
+ Offset += sizeof(VARIABLE_STORE_HEADER)
+ Offset = (Offset + HEADER_ALIGNMENT - 1) & (~(HEADER_ALIGNMENT - 1))
+
+ if VariableStoreHeader.Format != VARIABLE_STORE_FORMATTED :
+ sys.exit(0)
+
+ if VariableStoreHeader.State != VARIABLE_STORE_HEALTHY :
+ sys.exit(0)
+
+ VarIndex = 1
+ while Offset < FullSize :
+ VariableHeader = VARIABLE_HEADER.from_buffer (bytearray(args.InputFileBuffer), Offset)
+ print "#// VARIABLE_HEADER:"
+ print "#// StartId - 0x%04x" % VariableHeader.StartId
+ print "#// State - 0x%02x" % VariableHeader.State
+ print "#// Attributes - 0x%08x" % VariableHeader.Attributes
+ print "#// NameSize - 0x%08x" % VariableHeader.NameSize
+ print "#// DataSize - 0x%08x" % VariableHeader.DataSize
+ print "#// VendorGuid - %08x-%04x-%04x-%02x%02x-%02x%02x%02x%02x%02x%02x" % (VariableHeader.VendorGuid.Guid1, VariableHeader.VendorGuid.Guid2, VariableHeader.VendorGuid.Guid3, VariableHeader.VendorGuid.Guid4[0], VariableHeader.VendorGuid.Guid4[1], VariableHeader.VendorGuid.Guid4[2], VariableHeader.VendorGuid.Guid4[3], VariableHeader.VendorGuid.Guid4[4], VariableHeader.VendorGuid.Guid4[5], VariableHeader.VendorGuid.Guid4[6], VariableHeader.VendorGuid.Guid4[7])
+ Offset += sizeof(VARIABLE_HEADER)
+
+ if VariableHeader.StartId != VARIABLE_DATA :
+ sys.exit(0)
+
+ Name = FullInputFileBuffer[Offset:Offset + VariableHeader.NameSize]
+ AsciiName = []
+ for Int in Name:
+ if Int == 0:
+ continue
+ AsciiName.append(chr(Int))
+ AsciiName = ''.join(AsciiName)
+ print "#// Name - L\"" + AsciiName + "\""
+ #print "#// Name - L\"",
+ #DumpName(Name)
+ #print "\""
+ Offset += VariableHeader.NameSize
+
+ print "#// Data - "
+ Data=FullInputFileBuffer[Offset:Offset + VariableHeader.DataSize]
+ DumpHexData (Data)
+ Offset += VariableHeader.DataSize
+
+ print " gOemSkuTokenSpaceGuid.Pcd" + AsciiName + "Data|{",
+ DumpBin(Data)
+ #print "}|VOID*|0x000F%04x" % VarIndex
+ print "}"
+ print ""
+
+ #OutputFile = open(AsciiName, 'wb')
+ #OutputFile.write(Data)
+ #OutputFile.close()
+
+ VarIndex = VarIndex + 1
+ Offset = (Offset + HEADER_ALIGNMENT - 1) & (~(HEADER_ALIGNMENT - 1))
+
diff --git a/Platform/Intel/MinPlatformPkg/Tools/PatchFv/PatchBfv.py b/Platform/Intel/MinPlatformPkg/Tools/PatchFv/PatchBfv.py new file mode 100644 index 0000000000..73c18c5d27 --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/Tools/PatchFv/PatchBfv.py @@ -0,0 +1,126 @@ +## @ PatchBfv.py
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License that accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+import os
+import re
+import sys
+import time
+import shutil
+import struct
+import binascii
+from ctypes import *
+
+class FileChecker:
+ def __init__(self):
+ self.fdName = ""
+ self.reportFile = ""
+ self.pcd = ["", "", ""]
+
+ def PrintPcd(self):
+ print "PCD: " + self.pcd[0] + "|" + self.pcd[1] + "(" + self.pcd[2] + ")"
+
+ def ProcessReport(self):
+ try :
+ file = open(self.reportFile)
+ except Exception:
+ print "fail to open " + self.reportFile
+ return
+ try:
+ file.seek(0)
+ print "checking - " + self.pcd[0]
+ ValuePair = self.GetPcdFromReport (file, self.pcd[0])
+ self.pcd[1] = ValuePair[0]
+ self.pcd[2] = ValuePair[1]
+ finally:
+ file.close()
+
+ self.PrintPcd()
+
+ def PatchFd(self):
+ fileName = self.fdName
+ print "patching BFV - " + fileName
+
+ try :
+ file = open(fileName, "rb")
+ except Exception:
+ print "fail to open " + fileName
+ return
+ try:
+ buffer = file.read()
+ data = bytearray(buffer)
+ file.close()
+
+ offset = -4
+
+ l = struct.pack("L", int(self.pcd[1],16))
+ print " [" + hex(offset) + "] " + binascii.hexlify(data[-4:]) + " <= " + binascii.hexlify(l)
+ data[-4:] = l
+
+ file = open(fileName, "wb")
+ file.write(data[0:])
+ finally:
+ file.close()
+
+ def GetPcdFromReport(self, file, pcd):
+ FoundPkg = False
+ pcdSplit = pcd.split(".")
+ TargetPkg = pcdSplit[0]
+ TargetPcd = pcdSplit[1]
+ while 1:
+ line = file.readline()
+ if not line:
+ break
+
+ newline = line[:-1]
+
+ if (cmp (newline, TargetPkg) == 0):
+ FoundPkg = True
+ continue
+
+ if (cmp (newline, "") == 0) or ((cmp (newline[0], " ") != 0) and (cmp (newline[0], "0") != 0)):
+ FoundPkg = False
+
+ if (FoundPkg == True) :
+ newline = newline.strip()
+ splitLine = newline.split(" ", 2)
+ if (cmp (splitLine[0], "*F") == 0) or (cmp (splitLine[0], "*P") == 0) :
+ if (cmp (splitLine[1], TargetPcd) == 0):
+ print "found - " + TargetPkg + "." + TargetPcd
+
+ splitLine = splitLine[2].strip()[1:].strip().split(" ", 1)
+ if (cmp (splitLine[0], "FIXED") == 0) or (cmp (splitLine[0], "PATCH") == 0):
+ SplitLine = splitLine[1].strip()[1:].split(")", 1)
+ Type = SplitLine[0]
+ Value = SplitLine[1].strip()[1:].strip()
+ print " Type - (" + Type + "), Value - (" + Value + ")"
+ return [Value, Type]
+ return ["", ""]
+
+def main():
+ global FileChecker
+
+ fileChecker = FileChecker()
+
+ if (len(sys.argv) != 4) :
+ print "usage: PatchBfv <FdFile> <ReportFile> <BfvPcdName>"
+ return 0
+
+ fileChecker.fdName = sys.argv[1]
+ fileChecker.reportFile = sys.argv[2]
+ fileChecker.pcd[0] = sys.argv[3]
+
+ fileChecker.ProcessReport ()
+ fileChecker.PatchFd ()
+
+if __name__ == '__main__':
+ sys.exit(main())
diff --git a/Platform/Intel/MinPlatformPkg/Tools/PatchFv/PatchBinFv.py b/Platform/Intel/MinPlatformPkg/Tools/PatchFv/PatchBinFv.py new file mode 100644 index 0000000000..f5cb4275f8 --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/Tools/PatchFv/PatchBinFv.py @@ -0,0 +1,235 @@ +## @ PatchBinFv.py
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License that accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+import os
+import re
+import sys
+import time
+import shutil
+import struct
+import binascii
+from ctypes import *
+
+class FileChecker:
+ def __init__(self):
+ self.SyncSectionList = ["PatchPcd"]
+ self.FvName = ""
+ self.target = ""
+ self.sourceRoot = ""
+ self.reportFile = ""
+ self.InfPcdList = []
+
+ def GetSectionName(self, line):
+ splitLine = line[1:-1].split(".")
+ return splitLine[0]
+
+ def IsSyncSection(self, line):
+ name = self.GetSectionName(line)
+ for sectionName in self.SyncSectionList:
+ if (cmp (sectionName, name) == 0) :
+ return True
+ return False
+
+ def PrintPcdList(self, pcdList):
+ for pcd in pcdList:
+ print "PCD: " + pcd[0] + "|" + pcd[1] + "|" + pcd[2] + " <== " + pcd[3] + "(" + pcd[4] + ")"
+
+ def GetInfFileGuid(self, fileName):
+ guid = ""
+ try :
+ file = open(fileName)
+ except Exception:
+ print "fail to open " + fileName
+ return
+ try:
+ while 1:
+ line = file.readline()
+ if not line:
+ break
+
+ newline = line[:-1]
+
+ if cmp (line[:11], " FILE_GUID") == 0:
+ splitLine = line.split("=")
+ templine = splitLine[1]
+ guid = templine[1:1+36]
+ finally:
+ file.close()
+ return guid
+
+ def ParseInfFile(self, fileName):
+ SyncToDest = False
+ try :
+ file = open(fileName)
+ except Exception:
+ print "fail to open " + fileName
+ return
+ try:
+ while 1:
+ line = file.readline()
+ if not line:
+ break
+
+ newline = line[:-1]
+
+ if cmp (line[0], "#") == 0:
+ continue
+
+
+ if cmp (line[0], "[") == 0:
+ SyncToDest = self.IsSyncSection(line)
+ PatchOffset = False
+
+ if (cmp (self.GetSectionName(line), "PatchPcd") == 0) :
+ PatchOffset = True
+ continue
+
+ if SyncToDest == True :
+ line = line.strip()
+ if (cmp (line, "") == 0) :
+ continue
+ if (cmp (line[0], "#") == 0) :
+ continue
+
+ splitLine = line.split(" ")
+ line = splitLine[0]
+
+ splitLine = line.split("|")
+
+ self.InfPcdList.append([splitLine[0], splitLine[1], splitLine[2], "", ""])
+
+ finally:
+ file.close()
+ return
+
+ def ProcessFvInf(self, fvName):
+ sourceFileName = os.path.join(self.sourceRoot,fvName+"\\"+self.target+"\\"+fvName+".inf")
+ print "\nprocessing - " + sourceFileName
+ fileGuid = self.GetInfFileGuid (sourceFileName)
+ print "FV NAME GUID - " + fileGuid
+
+ self.InfPcdList = []
+ self.ParseInfFile(sourceFileName)
+
+ self.InfPcdList.sort()
+
+ #self.PrintPcdList(self.InfPcdList)
+
+ try :
+ file = open(self.reportFile)
+ except Exception:
+ print "fail to open " + self.reportFile
+ return
+ try:
+ for pcd in self.InfPcdList:
+ file.seek(0)
+ print "checking - " + pcd[0]
+ ValuePair = self.GetPcdFromReport (file, pcd[0])
+ pcd[3] = ValuePair[0]
+ pcd[4] = ValuePair[1]
+ finally:
+ file.close()
+
+ self.PrintPcdList(self.InfPcdList)
+
+ def PatchFv(self, fvName):
+ sourceFileName = os.path.join(self.sourceRoot,fvName+"\\"+self.target+"\\"+fvName+".fv")
+ print "patching - " + sourceFileName
+
+ try :
+ file = open(sourceFileName, "rb")
+ except Exception:
+ print "fail to open " + sourceFileName
+ return
+ try:
+ buffer = file.read()
+ data = bytearray(buffer)
+ file.close()
+
+ for pcd in self.InfPcdList:
+ offset = int(pcd[2], 16)
+ if (cmp (pcd[4], "BOOLEAN") == 0) or (cmp (pcd[4], "UINT8") == 0):
+ b = struct.pack("B", int(pcd[3],16))
+ print " [" + hex(offset) + "] " + binascii.hexlify(data[offset:offset+1]) + " <= " + binascii.hexlify(b)
+ data[offset:offset+1] = b
+ elif (cmp (pcd[4], "UINT16") == 0):
+ h = struct.pack("H", int(pcd[3],16))
+ print " [" + hex(offset) + "] " + binascii.hexlify(data[offset:offset+2]) + " <= " + binascii.hexlify(h)
+ data[offset:offset+2] = h
+ elif (cmp (pcd[4], "UINT32") == 0):
+ l = struct.pack("L", int(pcd[3],16))
+ print " [" + hex(offset) + "] " + binascii.hexlify(data[offset:offset+4]) + " <= " + binascii.hexlify(l)
+ data[offset:offset+4] = l
+ elif (cmp (pcd[4], "UINT64") == 0):
+ q = struct.pack("Q", int(pcd[3],16))
+ print " [" + hex(offset) + "] " + binascii.hexlify(data[offset:offset+8]) + " <= " + binascii.hexlify(q)
+ data[offset:offset+8] = q
+ file = open(sourceFileName, "wb")
+ file.write(data)
+ finally:
+ file.close()
+
+ def GetPcdFromReport(self, file, pcd):
+ FoundPkg = False
+ pcdSplit = pcd.split(".")
+ TargetPkg = pcdSplit[0]
+ TargetPcd = pcdSplit[1]
+ while 1:
+ line = file.readline()
+ if not line:
+ break
+
+ newline = line[:-1]
+
+ if (cmp (newline, TargetPkg) == 0):
+ FoundPkg = True
+ continue
+
+ if (cmp (newline, "") == 0) or ((cmp (newline[0], " ") != 0) and (cmp (newline[0], "0") != 0)):
+ FoundPkg = False
+
+ if (FoundPkg == True) :
+ newline = newline.strip()
+ splitLine = newline.split(" ", 2)
+ if (cmp (splitLine[0], "*F") == 0) or (cmp (splitLine[0], "*P") == 0):
+ if (cmp (splitLine[1], TargetPcd) == 0):
+ print "found - " + TargetPkg + "." + TargetPcd
+
+ splitLine = splitLine[2].strip()[1:].strip().split(" ", 1)
+ if (cmp (splitLine[0], "FIXED") == 0) or (cmp (splitLine[0], "PATCH") == 0):
+ SplitLine = splitLine[1].strip()[1:].split(")", 1)
+ Type = SplitLine[0]
+ Value = SplitLine[1].strip()[1:].strip()
+ print " Type - (" + Type + "), Value - (" + Value + ")"
+ return [Value, Type]
+ return ["", ""]
+
+def main():
+ global FileChecker
+
+ fileChecker = FileChecker()
+
+ if (len(sys.argv) != 5) :
+ print "usage: PatchBinFv <Target> <SourceRoot> <ReportFile> <FvName>"
+ return 0
+
+ fileChecker.target = sys.argv[1]
+ fileChecker.sourceRoot = sys.argv[2]
+ fileChecker.reportFile = sys.argv[3]
+ fileChecker.FvName = sys.argv[4]
+
+ fileChecker.ProcessFvInf (fileChecker.FvName)
+ fileChecker.PatchFv (fileChecker.FvName)
+
+if __name__ == '__main__':
+ sys.exit(main())
diff --git a/Platform/Intel/MinPlatformPkg/Tools/PatchFv/RebaseBinFv.py b/Platform/Intel/MinPlatformPkg/Tools/PatchFv/RebaseBinFv.py new file mode 100644 index 0000000000..5463a93044 --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/Tools/PatchFv/RebaseBinFv.py @@ -0,0 +1,777 @@ +## @ PatchBinFv.py
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License that accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+import os
+import re
+import sys
+import time
+import shutil
+import struct
+import binascii
+from ctypes import *
+
+class GUID(Structure):
+ _fields_ = [
+ ('Guid1', c_uint32),
+ ('Guid2', c_uint16),
+ ('Guid3', c_uint16),
+ ('Guid4', ARRAY(c_uint8, 8)),
+ ]
+
+
+class EFI_FIRMWARE_VOLUME_HEADER(Structure):
+ _fields_ = [
+ ('ZeroVector', ARRAY(c_uint8, 16)),
+ ('FileSystemGuid', GUID),
+ ('FvLength', c_uint64),
+ ('Signature', c_uint32),
+ ('Attributes', c_uint32),
+ ('HeaderLength', c_uint16),
+ ('Checksum', c_uint16),
+ ('ExtHeaderOffset', c_uint16),
+ ('Reserved', c_uint8),
+ ('Revision', c_uint8),
+ ]
+
+class EFI_FIRMWARE_VOLUME_EXT_HEADER(Structure):
+ _fields_ = [
+ ('FvName', GUID),
+ ('ExtHeaderSize', c_uint32),
+ ]
+
+#
+# File Types Definitions
+#
+EFI_FV_FILETYPE_ALL = 0x00
+EFI_FV_FILETYPE_RAW = 0x01
+EFI_FV_FILETYPE_FREEFORM = 0x02
+EFI_FV_FILETYPE_SECURITY_CORE = 0x03
+EFI_FV_FILETYPE_PEI_CORE = 0x04
+EFI_FV_FILETYPE_DXE_CORE = 0x05
+EFI_FV_FILETYPE_PEIM = 0x06
+EFI_FV_FILETYPE_DRIVER = 0x07
+EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER = 0x08
+EFI_FV_FILETYPE_APPLICATION = 0x09
+EFI_FV_FILETYPE_SMM = 0x0A
+EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE = 0x0B
+EFI_FV_FILETYPE_COMBINED_SMM_DXE = 0x0C
+EFI_FV_FILETYPE_SMM_CORE = 0x0D
+EFI_FV_FILETYPE_OEM_MIN = 0xc0
+EFI_FV_FILETYPE_OEM_MAX = 0xdf
+EFI_FV_FILETYPE_DEBUG_MIN = 0xe0
+EFI_FV_FILETYPE_DEBUG_MAX = 0xef
+EFI_FV_FILETYPE_FFS_MIN = 0xf0
+EFI_FV_FILETYPE_FFS_MAX = 0xff
+EFI_FV_FILETYPE_FFS_PAD = 0xf0
+#
+# FFS File Attributes.
+#
+FFS_ATTRIB_LARGE_FILE = 0x01
+FFS_ATTRIB_DATA_ALIGNMENT_2 = 0x02
+FFS_ATTRIB_FIXED = 0x04
+FFS_ATTRIB_DATA_ALIGNMENT = 0x38
+FFS_ATTRIB_CHECKSUM = 0x40
+
+#
+# FFS File State Bits.
+#
+EFI_FILE_HEADER_CONSTRUCTION = 0x01
+EFI_FILE_HEADER_VALID = 0x02
+EFI_FILE_DATA_VALID = 0x04
+EFI_FILE_MARKED_FOR_UPDATE = 0x08
+EFI_FILE_DELETED = 0x10
+EFI_FILE_HEADER_INVALID = 0x20
+
+class EFI_FFS_FILE_HEADER(Structure):
+ _fields_ = [
+ ('Name', GUID),
+ ('IntegrityCheck', c_uint16),
+ ('Type', c_uint8),
+ ('Attributes', c_uint8),
+ ('Size', ARRAY(c_uint8, 3)),
+ ('State', c_uint8),
+ ]
+
+class EFI_FFS_FILE_HEADER2(Structure):
+ _fields_ = [
+ ('Name', GUID),
+ ('IntegrityCheck', c_uint16),
+ ('Type', c_uint8),
+ ('Attributes', c_uint8),
+ ('Size', ARRAY(c_uint8, 3)),
+ ('State', c_uint8),
+ ('ExtendedSize', c_uint64),
+ ]
+
+#
+# Pseudo type. It is used as a wild card when retrieving sections.
+# The section type EFI_SECTION_ALL matches all section types.
+#
+EFI_SECTION_ALL = 0x00
+
+#
+# Encapsulation section Type values.
+#
+EFI_SECTION_COMPRESSION = 0x01
+
+EFI_SECTION_GUID_DEFINED = 0x02
+
+EFI_SECTION_DISPOSABLE = 0x03
+
+#
+# Leaf section Type values.
+#
+EFI_SECTION_PE32 = 0x10
+EFI_SECTION_PIC = 0x11
+EFI_SECTION_TE = 0x12
+EFI_SECTION_DXE_DEPEX = 0x13
+EFI_SECTION_VERSION = 0x14
+EFI_SECTION_USER_INTERFACE = 0x15
+EFI_SECTION_COMPATIBILITY16 = 0x16
+EFI_SECTION_FIRMWARE_VOLUME_IMAGE = 0x17
+EFI_SECTION_FREEFORM_SUBTYPE_GUID = 0x18
+EFI_SECTION_RAW = 0x19
+EFI_SECTION_PEI_DEPEX = 0x1B
+EFI_SECTION_SMM_DEPEX = 0x1C
+
+class EFI_COMMON_SECTION_HEADER(Structure):
+ _fields_ = [
+ ('Size', ARRAY(c_uint8, 3)),
+ ('Type', c_uint8),
+ ]
+
+class EFI_COMMON_SECTION_HEADER2(Structure):
+ _fields_ = [
+ ('Size', ARRAY(c_uint8, 3)),
+ ('Type', c_uint8),
+ ('ExtendedSize', c_uint32),
+ ]
+
+
+class EFI_FV_FILETYPE:
+ ALL = 0x00
+ RAW = 0x01
+ FREEFORM = 0x02
+ SECURITY_CORE = 0x03
+ PEI_CORE = 0x04
+ DXE_CORE = 0x05
+ PEIM = 0x06
+ DRIVER = 0x07
+ COMBINED_PEIM_DRIVER = 0x08
+ APPLICATION = 0x09
+ SMM = 0x0a
+ FIRMWARE_VOLUME_IMAGE = 0x0b
+ COMBINED_SMM_DXE = 0x0c
+ SMM_CORE = 0x0d
+ OEM_MIN = 0xc0
+ OEM_MAX = 0xdf
+ DEBUG_MIN = 0xe0
+ DEBUG_MAX = 0xef
+ FFS_MIN = 0xf0
+ FFS_MAX = 0xff
+ FFS_PAD = 0xf0
+
+class EFI_SECTION_TYPE:
+ ALL = 0x00
+ COMPRESSION = 0x01
+ GUID_DEFINED = 0x02
+ DISPOSABLE = 0x03
+ PE32 = 0x10
+ PIC = 0x11
+ TE = 0x12
+ DXE_DEPEX = 0x13
+ VERSION = 0x14
+ USER_INTERFACE = 0x15
+ COMPATIBILITY16 = 0x16
+ FIRMWARE_VOLUME_IMAGE = 0x17
+ FREEFORM_SUBTYPE_GUID = 0x18
+ RAW = 0x19
+ PEI_DEPEX = 0x1b
+ SMM_DEPEX = 0x1c
+
+IMAGE_FILE_MACHINE_I386 = 0x014c
+IMAGE_FILE_MACHINE_X64 = 0x8664
+
+EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC = 5
+
+class EFI_IMAGE_DOS_HEADER(Structure):
+ _fields_ = [
+ ('e_magic', c_uint16),
+ ('e_cblp', c_uint16),
+ ('e_cp', c_uint16),
+ ('e_crlc', c_uint16),
+ ('e_cparhdr', c_uint16),
+ ('e_minalloc', c_uint16),
+ ('e_maxalloc', c_uint16),
+ ('e_ss', c_uint16),
+ ('e_sp', c_uint16),
+ ('e_csum', c_uint16),
+ ('e_ip', c_uint16),
+ ('e_cs', c_uint16),
+ ('e_lfarlc', c_uint16),
+ ('e_ovno', c_uint16),
+ ('e_res', ARRAY(c_uint16, 4)),
+ ('e_oemid', c_uint16),
+ ('e_oeminfo', c_uint16),
+ ('e_res2', ARRAY(c_uint16, 10)),
+ ('e_lfanew', c_uint16)
+ ]
+
+class EFI_IMAGE_DATA_DIRECTORY(Structure):
+ _fields_ = [
+ ('VirtualAddress', c_uint32),
+ ('Size', c_uint32)
+ ]
+
+class EFI_IMAGE_FILE_HEADER(Structure):
+ _fields_ = [
+ ('Machine', c_uint16),
+ ('NumberOfSections', c_uint16),
+ ('TimeDateStamp', c_uint32),
+ ('PointerToSymbolTable', c_uint32),
+ ('NumberOfSymbols', c_uint32),
+ ('SizeOfOptionalHeader', c_uint16),
+ ('Characteristics', c_uint16)
+ ]
+
+class EFI_IMAGE_OPTIONAL_HEADER32(Structure):
+ _fields_ = [
+ ('Magic', c_uint16),
+ ('MajorLinkerVersion', c_uint8),
+ ('MinorLinkerVersion', c_uint8),
+ ('SizeOfCode', c_uint32),
+ ('SizeOfInitializedData', c_uint32),
+ ('SizeOfUninitializedData', c_uint32),
+ ('AddressOfEntryPoint', c_uint32),
+ ('BaseOfCode', c_uint32),
+ ('BaseOfData', c_uint32),
+ ('ImageBase', c_uint32),
+ ('SectionAlignment', c_uint32),
+ ('FileAlignment', c_uint32),
+ ('MajorOperatingSystemVersion', c_uint16),
+ ('MinorOperatingSystemVersion', c_uint16),
+ ('MajorImageVersion', c_uint16),
+ ('MinorImageVersion', c_uint16),
+ ('MajorSubsystemVersion', c_uint16),
+ ('MinorSubsystemVersion', c_uint16),
+ ('Win32VersionValue', c_uint32),
+ ('SizeOfImage', c_uint32),
+ ('SizeOfHeaders', c_uint32),
+ ('CheckSum' , c_uint32),
+ ('Subsystem', c_uint16),
+ ('DllCharacteristics', c_uint16),
+ ('SizeOfStackReserve', c_uint32),
+ ('SizeOfStackCommit' , c_uint32),
+ ('SizeOfHeapReserve', c_uint32),
+ ('SizeOfHeapCommit' , c_uint32),
+ ('LoaderFlags' , c_uint32),
+ ('NumberOfRvaAndSizes', c_uint32),
+ ('DataDirectory', ARRAY(EFI_IMAGE_DATA_DIRECTORY, 16))
+ ]
+
+class EFI_IMAGE_OPTIONAL_HEADER64(Structure):
+ _fields_ = [
+ ('Magic', c_uint16),
+ ('MajorLinkerVersion', c_uint8),
+ ('MinorLinkerVersion', c_uint8),
+ ('SizeOfCode', c_uint32),
+ ('SizeOfInitializedData', c_uint32),
+ ('SizeOfUninitializedData', c_uint32),
+ ('AddressOfEntryPoint', c_uint32),
+ ('BaseOfCode', c_uint32),
+ ('ImageBase', c_uint64),
+ ('SectionAlignment', c_uint32),
+ ('FileAlignment', c_uint32),
+ ('MajorOperatingSystemVersion', c_uint16),
+ ('MinorOperatingSystemVersion', c_uint16),
+ ('MajorImageVersion', c_uint16),
+ ('MinorImageVersion', c_uint16),
+ ('MajorSubsystemVersion', c_uint16),
+ ('MinorSubsystemVersion', c_uint16),
+ ('Win32VersionValue', c_uint32),
+ ('SizeOfImage', c_uint32),
+ ('SizeOfHeaders', c_uint32),
+ ('CheckSum' , c_uint32),
+ ('Subsystem', c_uint16),
+ ('DllCharacteristics', c_uint16),
+ ('SizeOfStackReserve', c_uint64),
+ ('SizeOfStackCommit' , c_uint64),
+ ('SizeOfHeapReserve', c_uint64),
+ ('SizeOfHeapCommit' , c_uint64),
+ ('LoaderFlags' , c_uint32),
+ ('NumberOfRvaAndSizes', c_uint32),
+ ('DataDirectory', ARRAY(EFI_IMAGE_DATA_DIRECTORY, 16))
+ ]
+
+class EFI_IMAGE_NT_HEADERS32(Structure):
+ _fields_ = [
+ ('Signature', c_uint32),
+ ('FileHeader', EFI_IMAGE_FILE_HEADER),
+ ('OptionalHeader', EFI_IMAGE_OPTIONAL_HEADER32)
+ ]
+
+class EFI_IMAGE_NT_HEADERS64(Structure):
+ _fields_ = [
+ ('Signature', c_uint32),
+ ('FileHeader', EFI_IMAGE_FILE_HEADER),
+ ('OptionalHeader', EFI_IMAGE_OPTIONAL_HEADER64)
+ ]
+
+class EFI_IMAGE_SECTION_HEADER(Structure):
+ _fields_ = [
+ ('Name', ARRAY(c_uint8, 8)),
+ ('VirtualSize', c_uint32),
+ ('VirtualAddress', c_uint32),
+ ('SizeOfRawData', c_uint32),
+ ('PointerToRawData', c_uint32),
+ ('PointerToRelocations', c_uint32),
+ ('PointerToLinenumbers', c_uint32),
+ ('NumberOfRelocations', c_uint16),
+ ('NumberOfLinenumbers', c_uint16),
+ ('Characteristics', c_uint32),
+ ]
+
+class EFI_TE_IMAGE_HEADER(Structure):
+ _fields_ = [
+ ('Signature', ARRAY(c_char, 2)),
+ ('Machine', c_uint16),
+ ('NumberOfSections', c_uint8),
+ ('Subsystem', c_uint8),
+ ('StrippedSize', c_uint16),
+ ('AddressOfEntryPoint', c_uint32),
+ ('BaseOfCode', c_uint32),
+ ('ImageBase', c_uint64),
+ ('DataDirectoryBaseReloc', EFI_IMAGE_DATA_DIRECTORY),
+ ('DataDirectoryDebug', EFI_IMAGE_DATA_DIRECTORY)
+ ]
+
+class EFI_IMAGE_DIRECTORY_ENTRY:
+ EXPORT = 0
+ IMPORT = 1
+ RESOURCE = 2
+ EXCEPTION = 3
+ SECURITY = 4
+ BASERELOC = 5
+ DEBUG = 6
+ COPYRIGHT = 7
+ GLOBALPTR = 8
+ TLS = 9
+ LOAD_CONFIG = 10
+
+class PE_RELOC_BLOCK_HEADER(Structure):
+ _fields_ = [
+ ('PageRVA', c_uint32),
+ ('BlockSize', c_uint32)
+ ]
+
+def AlignPtr (offset, alignment = 8):
+ return (offset + alignment - 1) & ~(alignment - 1)
+
+def Bytes2Val (bytes):
+ return reduce(lambda x,y: (x<<8)|y, bytes[::-1] )
+
+def Val2Bytes (value, blen):
+ return [(value>>(i*8) & 0xff) for i in range(blen)]
+
+class PeTeImage:
+ def __init__(self, offset, data):
+ self.Offset = offset
+ tehdr = EFI_TE_IMAGE_HEADER.from_buffer (data, 0)
+ if tehdr.Signature == 'VZ': # TE image
+ self.TeHdr = tehdr
+ elif tehdr.Signature == 'MZ': # PE32 image
+ self.TeHdr = None
+ self.DosHdr = EFI_IMAGE_DOS_HEADER.from_buffer (data, 0)
+ self.PeHdr = EFI_IMAGE_NT_HEADERS32.from_buffer (data, self.DosHdr.e_lfanew)
+ if self.PeHdr.Signature != 0x4550:
+ raise Exception("ERROR: Invalid PE32 header !")
+ if self.PeHdr.FileHeader.SizeOfOptionalHeader < EFI_IMAGE_OPTIONAL_HEADER32.DataDirectory.offset:
+ raise Exception("ERROR: Unsupported PE32 image !")
+ if self.PeHdr.OptionalHeader.NumberOfRvaAndSizes <= EFI_IMAGE_DIRECTORY_ENTRY.BASERELOC:
+ raise Exception("ERROR: No relocation information available !")
+ self.Offset = offset
+ self.Data = data
+ self.RelocList = []
+
+ def IsTeImage(self):
+ return self.TeHdr is not None
+
+ def ParseReloc(self):
+ if self.IsTeImage():
+ rsize = self.TeHdr.DataDirectoryBaseReloc.Size
+ roffset = sizeof(self.TeHdr) - self.TeHdr.StrippedSize + self.TeHdr.DataDirectoryBaseReloc.VirtualAddress
+ else:
+ rsize = self.PeHdr.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY.BASERELOC].Size
+ roffset = self.PeHdr.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY.BASERELOC].VirtualAddress
+
+ alignment = 4
+ offset = roffset
+ while offset < roffset + rsize:
+ offset = AlignPtr(offset, 4)
+ blkhdr = PE_RELOC_BLOCK_HEADER.from_buffer(self.Data, offset)
+ offset += sizeof(blkhdr)
+ # Read relocation type,offset pairs
+ rlen = blkhdr.BlockSize - sizeof(PE_RELOC_BLOCK_HEADER)
+ rnum = rlen/sizeof(c_uint16)
+ rdata = (c_uint16 * rnum).from_buffer(self.Data, offset)
+ for each in rdata:
+ roff = each & 0xfff
+ rtype = each >> 12
+ if rtype == 0: # IMAGE_REL_BASED.ABSOLUTE:
+ continue
+ if rtype != 3: # IMAGE_REL_BASED_HIGHLOW
+ raise Exception("ERROR: Unsupported relocation type %d!" % rtype)
+ # Calculate the offset of the relocation
+ aoff = blkhdr.PageRVA + roff
+ if self.IsTeImage():
+ aoff += sizeof(self.TeHdr) - self.TeHdr.StrippedSize
+ self.RelocList.append((rtype, aoff))
+ offset += sizeof(rdata)
+
+ def Rebase(self, delta, fdbin):
+ count = 0
+ if delta == 0:
+ return count
+
+ for (rtype, roff) in self.RelocList:
+ if rtype == 0x03: # HIGHLOW
+ offset = roff + self.Offset
+ value = Bytes2Val(fdbin[offset:offset+sizeof(c_uint32)])
+ value += delta
+ fdbin[offset:offset+sizeof(c_uint32)] = Val2Bytes(value, sizeof(c_uint32))
+ count += 1
+ else:
+ raise Exception('ERROR: Unknown relocation type %d !' % rtype)
+
+ if self.IsTeImage():
+ offset = self.Offset + EFI_TE_IMAGE_HEADER.ImageBase.offset
+ size = EFI_TE_IMAGE_HEADER.ImageBase.size
+ else:
+ offset = self.Offset + self.DosHdr.e_lfanew
+ offset += EFI_IMAGE_NT_HEADERS32.OptionalHeader.offset
+ offset += EFI_IMAGE_OPTIONAL_HEADER32.ImageBase.offset
+ size = EFI_IMAGE_OPTIONAL_HEADER32.ImageBase.size
+
+ value = Bytes2Val(fdbin[offset:offset+size]) + delta
+ fdbin[offset:offset+size] = Val2Bytes(value, size)
+
+ return count
+
+
+class Section:
+ def __init__(self, offset, secdata):
+ self.SecHdr = EFI_COMMON_SECTION_HEADER.from_buffer (secdata, 0)
+ self.SecData = secdata[0:int(self.SecHdr.Size)]
+ self.Offset = offset
+
+class FirmwareFile:
+ def __init__(self, offset, filedata):
+ self.FfsHdr = EFI_FFS_FILE_HEADER.from_buffer (filedata, 0)
+ self.FfsData = filedata[0:int(self.FfsHdr.Size)]
+ self.Offset = offset
+ self.SecList = []
+
+ def ParseFfs(self):
+ ffssize = len(self.FfsData)
+ offset = sizeof(self.FfsHdr)
+ if self.FfsHdr.Name != '\xff' * 16:
+ while offset < ffssize:
+ sechdr = EFI_COMMON_SECTION_HEADER.from_buffer (self.FfsData, offset)
+ sec = Section (offset, self.FfsData[offset:offset + int(sechdr.Size)])
+ self.SecList.append(sec)
+ offset += int(sechdr.Size)
+ offset = AlignPtr(offset, 4)
+
+class FirmwareVolume:
+ def __init__(self, offset, fvdata):
+ self.FvHdr = EFI_FIRMWARE_VOLUME_HEADER.from_buffer (fvdata, 0)
+ self.FvData = fvdata[0 : self.FvHdr.FvLength]
+ self.Offset = offset
+ if self.FvHdr.ExtHeaderOffset > 0:
+ self.FvExtHdr = EFI_FIRMWARE_VOLUME_EXT_HEADER.from_buffer (self.FvData, self.FvHdr.ExtHeaderOffset)
+ else:
+ self.FvExtHdr = None
+ self.FfsList = []
+
+ def ParseFv(self):
+ fvsize = len(self.FvData)
+ if self.FvExtHdr:
+ offset = self.FvHdr.ExtHeaderOffset + self.FvExtHdr.ExtHeaderSize
+ else:
+ offset = self.FvHdr.HeaderLength
+ offset = AlignPtr(offset)
+ while offset < fvsize:
+ ffshdr = EFI_FFS_FILE_HEADER.from_buffer (self.FvData, offset)
+ if (ffshdr.Name == '\xff' * 16) and (int(ffshdr.Size) == 0xFFFFFF):
+ offset = fvsize
+ else:
+ ffs = FirmwareFile (offset, self.FvData[offset:offset + int(ffshdr.Size)])
+ ffs.ParseFfs()
+ self.FfsList.append(ffs)
+ offset += int(ffshdr.Size)
+ offset = AlignPtr(offset)
+
+
+class FileChecker:
+ def __init__(self):
+ # sourceRoot == WORKSPACE
+ # sourceRoot != PACKAGES_PATH
+ self.RebasePcd = ["", "", "", ""]
+ self.FvName = ""
+ self.target = ""
+ self.sourceRoot = ""
+ self.reportFile = ""
+
+ def GetSectionName(self, line):
+ splitLine = line[1:-1].split(".")
+ return splitLine[0]
+
+ def IsSyncSection(self, line):
+ name = self.GetSectionName(line)
+ for sectionName in self.SyncSectionList:
+ if (cmp (sectionName, name) == 0) :
+ return True
+ return False
+
+ def PrintRebasePcd(self, pcd):
+ print "PCD: " + pcd[0] + "|" + pcd[3] + " <== " + pcd[1] + "(" + pcd[2] + ")"
+
+ def RebaseFv(self, fvName, rebasePcd):
+ sourceFileName = os.path.join(self.sourceRoot,fvName+"\\"+self.target+"\\"+fvName+".fv")
+ print "rebasing(FV) - " + sourceFileName
+
+ try :
+ file = open(sourceFileName, "rb")
+ except Exception:
+ print "fail to open " + sourceFileName
+ return
+ try:
+ buffer = file.read()
+ data = bytearray(buffer)
+ file.close()
+
+ FvHeader = EFI_FIRMWARE_VOLUME_HEADER.from_buffer (data, 0)
+ print "HeaderLength - " + hex(FvHeader.HeaderLength)
+ print "ExtHeaderOffset - " + hex(FvHeader.ExtHeaderOffset)
+
+ if (FvHeader.ExtHeaderOffset == 0):
+ Offset = FvHeader.HeaderLength
+ else:
+ FvExHeader = EFI_FIRMWARE_VOLUME_EXT_HEADER.from_buffer(data, FvHeader.ExtHeaderOffset)
+ print " FvName - %08x-%04x-%04x-%02x%02x-%02x%02x%02x%02x%02x%02x" % (FvExHeader.FvName.Guid1, FvExHeader.FvName.Guid2, FvExHeader.FvName.Guid3, FvExHeader.FvName.Guid4[0], FvExHeader.FvName.Guid4[1], FvExHeader.FvName.Guid4[2], FvExHeader.FvName.Guid4[3], FvExHeader.FvName.Guid4[4], FvExHeader.FvName.Guid4[5], FvExHeader.FvName.Guid4[6], FvExHeader.FvName.Guid4[7])
+ print " ExtHeaderSize - " + hex(FvExHeader.ExtHeaderSize)
+ Offset = FvHeader.ExtHeaderOffset + FvExHeader.ExtHeaderSize
+ Offset = (Offset + 0x7) & ~0x7
+
+ while (Offset < FvHeader.FvLength) :
+ FfsHeader = EFI_FFS_FILE_HEADER.from_buffer (data, Offset)
+ FfsOffset = Offset
+ FfsSize = FfsHeader.Size[0] + (FfsHeader.Size[1] << 8) + (FfsHeader.Size[2] << 16)
+ if (FfsSize == 0xFFFFFF) :
+ break
+ #print "Ffs - " + hex(FfsOffset)
+ if (FfsHeader.Type == 0xFF) or (FfsHeader.Type == EFI_FV_FILETYPE_FFS_PAD) :
+ Offset = (FfsOffset + FfsSize + 7) & ~0x7
+ continue
+ print "Ffs - %08x-%04x-%04x-%02x%02x-%02x%02x%02x%02x%02x%02x" % (FfsHeader.Name.Guid1, FfsHeader.Name.Guid2, FfsHeader.Name.Guid3, FfsHeader.Name.Guid4[0], FfsHeader.Name.Guid4[1], FfsHeader.Name.Guid4[2], FfsHeader.Name.Guid4[3], FfsHeader.Name.Guid4[4], FfsHeader.Name.Guid4[5], FfsHeader.Name.Guid4[6], FfsHeader.Name.Guid4[7])
+ Offset = Offset + sizeof(EFI_FFS_FILE_HEADER)
+ while (Offset < FfsOffset + FfsSize) :
+ SectionHeader = EFI_COMMON_SECTION_HEADER.from_buffer (data, Offset)
+ #print " Section - " + hex(Offset)
+ if (SectionHeader.Type == EFI_SECTION_PE32) or (SectionHeader.Type == EFI_SECTION_TE) :
+ PeOffset = Offset + sizeof(EFI_COMMON_SECTION_HEADER)
+ print " PE - " + hex(PeOffset) + "(" + binascii.hexlify(data[PeOffset:PeOffset+2]) + ")"
+
+ newbase = int(rebasePcd[1],16)
+ oldbase = int(rebasePcd[3],16)
+
+ delta = newbase - oldbase
+ print " delta - " + hex(delta) + "(" + hex(oldbase) + " <== " + hex(newbase) + ")"
+
+ PeLength = FfsSize-sizeof(EFI_FFS_FILE_HEADER);
+
+ img = PeTeImage(PeOffset, data[PeOffset:PeOffset + PeLength])
+ img.ParseReloc()
+ img.Rebase(delta, data)
+
+ SectionSize = SectionHeader.Size[0] + (SectionHeader.Size[1] << 8) + (SectionHeader.Size[2] << 16)
+ Offset = (Offset + SectionSize + 3) & ~0x3
+ Offset = (FfsOffset + FfsSize + 7) & ~0x7
+
+ file = open(sourceFileName, "wb")
+ file.write(data)
+ finally:
+ file.close()
+
+ def GetPcdFromReport(self, file, pcd):
+ FoundPkg = False
+ pcdSplit = pcd.split(".")
+ TargetPkg = pcdSplit[0]
+ TargetPcd = pcdSplit[1]
+ while 1:
+ line = file.readline()
+ if not line:
+ break
+
+ newline = line[:-1]
+
+ if (cmp (newline, TargetPkg) == 0):
+ FoundPkg = True
+ continue
+
+ if (cmp (newline, "") == 0) or ((cmp (newline[0], " ") != 0) and (cmp (newline[0], "0") != 0)):
+ FoundPkg = False
+
+ if (FoundPkg == True) :
+ newline = newline.strip()
+ splitLine = newline.split(" ", 2)
+ if (cmp (splitLine[0], "*F") == 0) or (cmp (splitLine[0], "*P") == 0):
+ if (cmp (splitLine[1], TargetPcd) == 0):
+ print "found - " + TargetPkg + "." + TargetPcd
+
+ splitLine = splitLine[2].strip()[1:].strip().split(" ", 1)
+ if (cmp (splitLine[0], "FIXED") == 0) or (cmp (splitLine[0], "PATCH") == 0):
+ SplitLine = splitLine[1].strip()[1:].split(")", 1)
+ Type = SplitLine[0]
+ Value = SplitLine[1].strip()[1:].strip()
+ print " Type - (" + Type + "), Value - (" + Value + ")"
+ return [Value, Type]
+ return ["", ""]
+
+ def GetOldFvBase (self, fvName, PcdName):
+ ParseBase = False
+ Value = ""
+ fileName = os.path.join(self.sourceRoot,fvName+"\\"+self.target+"\\"+fvName+".inf")
+ try :
+ file = open(fileName)
+ except Exception:
+ print "fail to open " + fileName
+ return
+ try:
+ while 1:
+ line = file.readline()
+ if not line:
+ break
+
+ newline = line[:-1]
+
+ if cmp (newline, "") == 0:
+ continue
+
+ if cmp (newline, "#![Pcd]") == 0:
+ ParseBase = True
+ continue
+
+ if ParseBase == True :
+ if (cmp (line[0:2], "#!") != 0) :
+ ParseBase = False
+ continue
+ newline = newline[2:].strip()
+
+ splitLine = newline.split("|")
+ if cmp (PcdName, splitLine[0]) == 0:
+ Value = splitLine[1]
+ finally:
+ file.close()
+
+ return Value
+
+ def SetNewFvBase (self, fvName, PcdName, OldFvBase, NewFvBase):
+ fileName = os.path.join(self.sourceRoot,fvName+"\\"+self.target+"\\"+fvName+".inf")
+ print "update - " + fileName
+ try :
+ file = open(fileName, "r")
+ except Exception:
+ print "fail to open " + fileName
+ return
+ try:
+ lines = file.readlines()
+ file.close()
+
+ ParseBase = False
+ for index in range(len(lines)):
+ line = lines[index]
+ if not line:
+ break
+
+ newline = line[:-1]
+
+ if cmp (newline, "") == 0:
+ continue
+
+ if cmp (newline, "#![Pcd]") == 0:
+ ParseBase = True
+ continue
+
+ if ParseBase == True :
+ if (cmp (line[0:2], "#!") != 0) :
+ ParseBase = False
+ continue
+ newline = newline[2:].strip()
+
+ splitLine = newline.split("|")
+ if cmp (PcdName, splitLine[0]) == 0:
+ if cmp (OldFvBase, splitLine[1]) != 0:
+ print "ERROR: OldFvBase mismatch!"
+ else:
+ lines[index] = "#! " + PcdName + "|" + NewFvBase + "\n"
+ break
+
+ file = open(fileName, "w")
+ file.writelines(lines)
+ finally:
+ file.close()
+
+
+ def GetRebaseAddressFromReport(self):
+ try :
+ file = open(self.reportFile)
+ except Exception:
+ print "fail to open " + self.reportFile
+ return
+ try:
+ file.seek(0)
+ print "checking - " + self.RebasePcd[0]
+ ValuePair = self.GetPcdFromReport (file, self.RebasePcd[0])
+ self.RebasePcd[1] = ValuePair[0]
+ self.RebasePcd[2] = ValuePair[1]
+ finally:
+ file.close()
+
+def main():
+ global FileChecker
+
+ fileChecker = FileChecker()
+
+ if (len(sys.argv) != 6) :
+ print "usage: RebaseBinFv <Target> <SourceRoot> <ReportFile> <FvName> <RebasePcdName>"
+ return 0
+
+ fileChecker.target = sys.argv[1]
+ fileChecker.sourceRoot = sys.argv[2]
+ fileChecker.reportFile = sys.argv[3]
+ fileChecker.FvName = sys.argv[4]
+ fileChecker.RebasePcd[0] = sys.argv[5]
+
+ fileChecker.GetRebaseAddressFromReport()
+
+ fileChecker.RebasePcd[3] = fileChecker.GetOldFvBase (fileChecker.FvName, fileChecker.RebasePcd[0])
+
+ fileChecker.PrintRebasePcd(fileChecker.RebasePcd)
+
+ fileChecker.RebaseFv (fileChecker.FvName, fileChecker.RebasePcd)
+
+ fileChecker.SetNewFvBase (fileChecker.FvName, fileChecker.RebasePcd[0], fileChecker.RebasePcd[3], fileChecker.RebasePcd[1])
+
+if __name__ == '__main__':
+ sys.exit(main())
diff --git a/Platform/Intel/MinPlatformPkg/Tools/PatchFv/SyncBinFvInf.py b/Platform/Intel/MinPlatformPkg/Tools/PatchFv/SyncBinFvInf.py new file mode 100644 index 0000000000..57b6724089 --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/Tools/PatchFv/SyncBinFvInf.py @@ -0,0 +1,487 @@ +## @ SyncBinFvInf.py
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License that accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+import os
+import re
+import sys
+import time
+import shutil
+from ctypes import *
+
+class GUID(Structure):
+ _fields_ = [
+ ('Guid1', c_uint32),
+ ('Guid2', c_uint16),
+ ('Guid3', c_uint16),
+ ('Guid4', ARRAY(c_uint8, 8)),
+ ]
+
+
+class EFI_FIRMWARE_VOLUME_HEADER(Structure):
+ _fields_ = [
+ ('ZeroVector', ARRAY(c_uint8, 16)),
+ ('FileSystemGuid', GUID),
+ ('FvLength', c_uint64),
+ ('Signature', c_uint32),
+ ('Attributes', c_uint32),
+ ('HeaderLength', c_uint16),
+ ('Checksum', c_uint16),
+ ('ExtHeaderOffset', c_uint16),
+ ('Reserved', c_uint8),
+ ('Revision', c_uint8),
+ ]
+
+#
+# File Types Definitions
+#
+EFI_FV_FILETYPE_ALL = 0x00
+EFI_FV_FILETYPE_RAW = 0x01
+EFI_FV_FILETYPE_FREEFORM = 0x02
+EFI_FV_FILETYPE_SECURITY_CORE = 0x03
+EFI_FV_FILETYPE_PEI_CORE = 0x04
+EFI_FV_FILETYPE_DXE_CORE = 0x05
+EFI_FV_FILETYPE_PEIM = 0x06
+EFI_FV_FILETYPE_DRIVER = 0x07
+EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER = 0x08
+EFI_FV_FILETYPE_APPLICATION = 0x09
+EFI_FV_FILETYPE_SMM = 0x0A
+EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE = 0x0B
+EFI_FV_FILETYPE_COMBINED_SMM_DXE = 0x0C
+EFI_FV_FILETYPE_SMM_CORE = 0x0D
+EFI_FV_FILETYPE_OEM_MIN = 0xc0
+EFI_FV_FILETYPE_OEM_MAX = 0xdf
+EFI_FV_FILETYPE_DEBUG_MIN = 0xe0
+EFI_FV_FILETYPE_DEBUG_MAX = 0xef
+EFI_FV_FILETYPE_FFS_MIN = 0xf0
+EFI_FV_FILETYPE_FFS_MAX = 0xff
+EFI_FV_FILETYPE_FFS_PAD = 0xf0
+#
+# FFS File Attributes.
+#
+FFS_ATTRIB_LARGE_FILE = 0x01
+FFS_ATTRIB_DATA_ALIGNMENT_2 = 0x02
+FFS_ATTRIB_FIXED = 0x04
+FFS_ATTRIB_DATA_ALIGNMENT = 0x38
+FFS_ATTRIB_CHECKSUM = 0x40
+
+#
+# FFS File State Bits.
+#
+EFI_FILE_HEADER_CONSTRUCTION = 0x01
+EFI_FILE_HEADER_VALID = 0x02
+EFI_FILE_DATA_VALID = 0x04
+EFI_FILE_MARKED_FOR_UPDATE = 0x08
+EFI_FILE_DELETED = 0x10
+EFI_FILE_HEADER_INVALID = 0x20
+
+class EFI_FFS_FILE_HEADER(Structure):
+ _fields_ = [
+ ('Name', GUID),
+ ('IntegrityCheck', c_uint16),
+ ('Type', c_uint8),
+ ('Attributes', c_uint8),
+ ('Size', ARRAY(c_uint8, 3)),
+ ('State', c_uint8),
+ ]
+
+class EFI_FFS_FILE_HEADER2(Structure):
+ _fields_ = [
+ ('Name', GUID),
+ ('IntegrityCheck', c_uint16),
+ ('Type', c_uint8),
+ ('Attributes', c_uint8),
+ ('Size', ARRAY(c_uint8, 3)),
+ ('State', c_uint8),
+ ('ExtendedSize', c_uint64),
+ ]
+
+#
+# Pseudo type. It is used as a wild card when retrieving sections.
+# The section type EFI_SECTION_ALL matches all section types.
+#
+EFI_SECTION_ALL = 0x00
+
+#
+# Encapsulation section Type values.
+#
+EFI_SECTION_COMPRESSION = 0x01
+
+EFI_SECTION_GUID_DEFINED = 0x02
+
+EFI_SECTION_DISPOSABLE = 0x03
+
+#
+# Leaf section Type values.
+#
+EFI_SECTION_PE32 = 0x10
+EFI_SECTION_PIC = 0x11
+EFI_SECTION_TE = 0x12
+EFI_SECTION_DXE_DEPEX = 0x13
+EFI_SECTION_VERSION = 0x14
+EFI_SECTION_USER_INTERFACE = 0x15
+EFI_SECTION_COMPATIBILITY16 = 0x16
+EFI_SECTION_FIRMWARE_VOLUME_IMAGE = 0x17
+EFI_SECTION_FREEFORM_SUBTYPE_GUID = 0x18
+EFI_SECTION_RAW = 0x19
+EFI_SECTION_PEI_DEPEX = 0x1B
+EFI_SECTION_SMM_DEPEX = 0x1C
+
+class EFI_COMMON_SECTION_HEADER(Structure):
+ _fields_ = [
+ ('Size', ARRAY(c_uint8, 3)),
+ ('Type', c_uint8),
+ ]
+
+class EFI_COMMON_SECTION_HEADER2(Structure):
+ _fields_ = [
+ ('Size', ARRAY(c_uint8, 3)),
+ ('Type', c_uint8),
+ ('ExtendedSize', c_uint32),
+ ]
+
+class FileChecker:
+ def __init__(self):
+ self.SyncSectionList = ["Packages", "PatchPcd", "PcdEx"]
+ self.RebasePcd = ["", "", ""]
+ self.FvName = ""
+ self.FfsGuidList = []
+ self.FfsInfList = []
+ self.FfsOffsetList = []
+ self.PeOffsetList = []
+ self.target = ""
+ self.sourceRoot = ""
+ self.sourceInfList = []
+ self.destRoot = ""
+ self.reportFile = ""
+
+ def GetSectionName(self, line):
+ splitLine = line[1:-1].split(".")
+ return splitLine[0]
+
+ def IsSyncSection(self, line):
+ name = self.GetSectionName(line)
+ for sectionName in self.SyncSectionList:
+ if (cmp (sectionName, name) == 0) :
+ return True
+ return False
+
+ def PrintRebasePcd(self, pcd):
+ if cmp (pcd[0], "") != 0:
+ print "PCD: " + pcd[0] + "|" + pcd[1] + "(" + pcd[2] + ")"
+
+ def PrintList(self, fileList):
+ for file in fileList:
+ print file
+
+ def GetFileList(self, dir, fileList, checkFunc):
+ if os.path.isdir(dir):
+ for sub in os.listdir(dir):
+ if sub[0] == "." :
+ continue
+ newDir = os.path.join(dir,sub)
+ if (os.path.isdir(newDir) == True):
+ self.GetFileList(newDir, fileList, checkFunc)
+ else :
+ AppendName = checkFunc (newDir)
+ if cmp (AppendName, "") != 0:
+ #print "AppendName = " + AppendName
+ if AppendName not in fileList:
+ fileList.append(AppendName)
+
+ def GetInfFileGuid(self, fileName):
+ guid = ""
+ try :
+ file = open(fileName)
+ except Exception:
+ print "fail to open " + fileName
+ return
+ try:
+ while 1:
+ line = file.readline()
+ if not line:
+ break
+
+ newline = line[:-1]
+
+ if cmp (line[:11], " FILE_GUID") == 0:
+ splitLine = line.split("=")
+ templine = splitLine[1]
+ guid = templine[1:1+36]
+ finally:
+ file.close()
+ return guid
+
+ def GetInfNameFromGuid(self, fileList, guid):
+ for file in fileList:
+ fileGuid = self.GetInfFileGuid (file)
+ if (cmp (fileGuid.upper(), guid.upper()) == 0) :
+ return file
+ return ""
+
+ def CheckSourceInf(self, file):
+ if (cmp (file[-4:], ".inf") == 0) and (file.find("BinPkg") != -1) and (file.find(self.target) != -1) and (file.find("FVFSP") == -1):
+ return file
+ return ""
+
+ def ParseInfFile(self, fileName, destFile, Offset):
+ SyncToDest = False
+ PatchOffset = False
+ try :
+ file = open(fileName)
+ except Exception:
+ print "fail to open " + fileName
+ return
+ try:
+ while 1:
+ line = file.readline()
+ if not line:
+ break
+
+ newline = line[:-1]
+
+ if cmp (line[0], "[") == 0:
+ SyncToDest = self.IsSyncSection(line)
+ PatchOffset = False
+
+ if SyncToDest == True :
+ if (cmp (self.GetSectionName(line), "PatchPcd") == 0) :
+ PatchOffset = True
+
+ if (PatchOffset == True) and ('|' in line) :
+ splitLine = line.split("|")
+
+ destFile.writelines(splitLine[0] + "|" + splitLine[1] + "|")
+
+ DataOffset = int(splitLine[2], 16)
+ DataOffset = DataOffset + int(Offset, 16)
+ destFile.writelines(hex(DataOffset))
+
+ destFile.writelines(" # " + splitLine[2][:-1] + "+" + Offset + "\n")
+ else :
+ destFile.writelines(line)
+ else :
+ destFile.write("# ")
+ destFile.writelines(line)
+
+ finally:
+ file.close()
+ return
+
+ def ParseInfFiles(self, fileList, FfsOffsetList, destFileName, RebasePcd):
+ try :
+ destFile = open(destFileName, "a")
+ except Exception:
+ print "fail to open " + destFileName
+ return
+ try:
+ if cmp (RebasePcd[0], "") != 0 :
+ destFile.write("\n#![Pcd]\n")
+ destFile.write("#! ")
+ destFile.write(RebasePcd[0])
+ destFile.write("|")
+ destFile.write(RebasePcd[1])
+ destFile.write("\n\n")
+
+ index = 0
+ for file in fileList:
+ if (cmp (file, "") == 0) :
+ index = index + 1
+ continue
+ print "handling - (" + str(index) + ") :" + file
+ self.ParseInfFile (file, destFile, FfsOffsetList[index])
+ index = index + 1
+ finally:
+ destFile.close()
+ return
+
+ def GetGuildFfsGuidList(self, fileName):
+ self.FfsGuidList = []
+ self.FfsOffsetList = []
+ try :
+ file = open(fileName)
+ except Exception:
+ print "fail to open " + fileName
+ return
+ try:
+ while 1:
+ line = file.readline()
+ if not line:
+ break
+
+ #0x000D4868 A8499E65-A6F6-48B0-96DB-45C266030D83
+ MatchString = "(0x[0-9a-fA-F]{8}) ([0-9a-fA-F]{8}-[0-9a-fA-F]{4}-[0-9a-fA-F]{4}-[0-9a-fA-F]{4}-[0-9a-fA-F]{12})"
+ match = re.match(MatchString, line)
+ if match is not None:
+ offset = match.group(1)
+ self.FfsOffsetList.append(offset)
+ ffsGuid = match.group(2)
+ self.FfsGuidList.append(ffsGuid)
+ finally:
+ file.close()
+ return
+
+ def GetPeOffsetList(self, fileName):
+ self.PeOffsetList = []
+ try :
+ file = open(fileName, "rb")
+ except Exception:
+ print "fail to open " + fileName
+ return
+ try:
+ FvBuffer = file.read()
+ FvData = bytearray(FvBuffer)
+
+ for FfsOffset in self.FfsOffsetList:
+ PeOffsetFound = False
+ PeOffset = int(FfsOffset, 16)
+ FfsHeader = EFI_FFS_FILE_HEADER.from_buffer (FvData, PeOffset)
+ FfsSize = FfsHeader.Size[0] + (FfsHeader.Size[1] << 8) + (FfsHeader.Size[2] << 16)
+ PeOffset = PeOffset + sizeof(EFI_FFS_FILE_HEADER)
+ while (PeOffset < int(FfsOffset, 16) + FfsSize) :
+ SectionHeader = EFI_COMMON_SECTION_HEADER.from_buffer (FvData, PeOffset)
+ if (SectionHeader.Type == EFI_SECTION_PE32) or (SectionHeader.Type == EFI_SECTION_TE) :
+ PeOffset = PeOffset + sizeof(EFI_COMMON_SECTION_HEADER)
+ self.PeOffsetList.append(hex(PeOffset))
+ PeOffsetFound = True
+ break
+ else:
+ SectionSize = SectionHeader.Size[0] + (SectionHeader.Size[1] << 8) + (SectionHeader.Size[2] << 16)
+ PeOffset = (PeOffset + SectionSize + 3) & ~0x3
+ if (PeOffsetFound == False):
+ self.PeOffsetList.append(0)
+
+ finally:
+ file.close()
+ return
+
+ def ProcessFvInf(self, fvName, RebasePcd):
+ destFile = os.path.join(self.destRoot,fvName+"\\"+self.target+"\\"+fvName+".Fv.txt")
+ print "\nprocessing - " + destFile
+ self.GetGuildFfsGuidList (destFile)
+
+ #print "FfsGuidList"
+ #self.PrintList(self.FfsGuidList)
+ #print "FfsOffsetList"
+ #self.PrintList(self.FfsOffsetList)
+
+ destFile = os.path.join(self.destRoot,fvName+"\\"+self.target+"\\"+fvName+".Fv")
+ self.GetPeOffsetList (destFile)
+
+ #print "PeOffsetList"
+ #self.PrintList(self.PeOffsetList)
+
+ self.FfsInfList = []
+ for guid in self.FfsGuidList:
+ fileName = self.GetInfNameFromGuid(self.sourceInfList, guid)
+ print " adding - " + guid + " : " + fileName
+ self.FfsInfList.append(fileName)
+
+ #print "FfsInfList"
+ #self.PrintList(self.FfsInfList)
+
+ shutil.copy(os.path.join(self.destRoot,fvName+"\\"+self.target+"\\"+fvName+".Base.inf"),os.path.join(self.destRoot,fvName+"\\"+self.target+"\\"+fvName+".inf"))
+
+ self.ParseInfFiles (self.FfsInfList, self.PeOffsetList, os.path.join(self.destRoot,fvName+"\\"+self.target+"\\"+fvName+".inf"), RebasePcd)
+
+ def GetPcdFromReport(self, file, pcd):
+ FoundPkg = False
+ pcdSplit = pcd.split(".")
+ TargetPkg = pcdSplit[0]
+ TargetPcd = pcdSplit[1]
+ while 1:
+ line = file.readline()
+ if not line:
+ break
+
+ newline = line[:-1]
+
+ if (cmp (newline, TargetPkg) == 0):
+ FoundPkg = True
+ continue
+
+ if (cmp (newline, "") == 0) or ((cmp (newline[0], " ") != 0) and (cmp (newline[0], "0") != 0)):
+ FoundPkg = False
+
+ if (FoundPkg == True) :
+ newline = newline.strip()
+ splitLine = newline.split(" ", 2)
+ if (cmp (splitLine[0], "*F") == 0) or (cmp (splitLine[0], "*P") == 0):
+ if (cmp (splitLine[1], TargetPcd) == 0):
+ print "found - " + TargetPkg + "." + TargetPcd
+
+ splitLine = splitLine[2].strip()[1:].strip().split(" ", 1)
+ if (cmp (splitLine[0], "FIXED") == 0) or (cmp (splitLine[0], "PATCH") == 0):
+ SplitLine = splitLine[1].strip()[1:].split(")", 1)
+ Type = SplitLine[0]
+ Value = SplitLine[1].strip()[1:].strip()
+ print " Type - (" + Type + "), Value - (" + Value + ")"
+ return [Value, Type]
+ return ["", ""]
+
+ def GetRebaseAddressFromReport(self):
+ try :
+ file = open(self.reportFile)
+ except Exception:
+ print "fail to open " + self.reportFile
+ return
+ try:
+ file.seek(0)
+ if (cmp(self.RebasePcd[0], "") != 0):
+ print "checking - " + self.RebasePcd[0]
+ ValuePair = self.GetPcdFromReport (file, self.RebasePcd[0])
+ self.RebasePcd[1] = ValuePair[0]
+ self.RebasePcd[2] = ValuePair[1]
+ finally:
+ file.close()
+
+ def DumpFileList(self, dir):
+ #print "DumpFileList - " + dir
+ if os.path.exists(dir) == False:
+ return
+ if os.path.isdir(dir):
+ for sub in os.listdir(dir):
+ #print "Get sub - " + sub
+ if sub[0] == "." :
+ continue
+ newDir = os.path.join(dir,sub)
+ if (os.path.isdir(newDir) == True):
+ self.DumpFileList(newDir)
+ else :
+ print "file - " + newDir
+
+def main():
+ global FileChecker
+
+ fileChecker = FileChecker()
+
+ if (len(sys.argv) != 6) and (len(sys.argv) != 7):
+ print "usage: SyncBinFvInf <Target> <SourceRoot> <DestRoot> <ReportFile> <FspFvName> [<RebasePcdName>]"
+ return 0
+
+ fileChecker.target = sys.argv[1]
+ fileChecker.sourceRoot = sys.argv[2]
+ fileChecker.destRoot = sys.argv[3]
+ fileChecker.reportFile = sys.argv[4]
+ fileChecker.FvName = sys.argv[5]
+ if (len(sys.argv) == 7):
+ fileChecker.RebasePcd[0] = sys.argv[6]
+
+ fileChecker.GetRebaseAddressFromReport()
+ fileChecker.PrintRebasePcd (fileChecker.RebasePcd)
+
+ fileChecker.GetFileList (fileChecker.sourceRoot, fileChecker.sourceInfList, fileChecker.CheckSourceInf)
+
+ fileChecker.ProcessFvInf (fileChecker.FvName, fileChecker.RebasePcd)
+
+if __name__ == '__main__':
+ sys.exit(main())
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