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authorJiewen Yao <jiewen.yao@intel.com>2017-09-18 15:23:45 +0800
committerJiewen Yao <jiewen.yao@intel.com>2017-09-28 09:10:22 +0800
commit9cdbbd296281e19788b5bb654979fec396f98294 (patch)
tree752cd67e9c7790167901e57c611112ffde55df77
parent77de40682f93e1aba15477f260ff7bd382180a67 (diff)
downloadedk2-platforms-9cdbbd296281e19788b5bb654979fec396f98294.tar.xz
MinPlatform: Reorg FV
Cc: Michael A Kubacki <michael.a.kubacki@intel.com> Cc: Amy Chan <amy.chan@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Brett Wang <brett.wang@intel.com> Cc: Daocheng Bu <daocheng.bu@intel.com> Cc: Isaac W Oram <isaac.w.oram@intel.com> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Michael A Kubacki <michael.a.kubacki@intel.com> Reviewed-by: Amy Chan <amy.chan@intel.com> Reviewed-by: Isaac W Oram <isaac.w.oram@intel.com>
-rw-r--r--Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/PlatformBootOption.c2
-rw-r--r--Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/Common/SpiFvbServiceCommon.c8
-rw-r--r--Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf6
-rw-r--r--Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c2
-rw-r--r--Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/FspWrapperPlatformSecLib.c20
-rw-r--r--Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf8
-rw-r--r--Platform/Intel/MinPlatformPkg/Include/Fdf/CoreOsBootInclude.fdf38
-rw-r--r--Platform/Intel/MinPlatformPkg/Include/Fdf/CorePostMemoryInclude.fdf (renamed from Platform/Intel/MinPlatformPkg/Include/Fdf/CorePeiPostMemInclude.fdf)0
-rw-r--r--Platform/Intel/MinPlatformPkg/Include/Fdf/CorePreMemoryInclude.fdf (renamed from Platform/Intel/MinPlatformPkg/Include/Fdf/CorePeiPreMemInclude.fdf)10
-rw-r--r--Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityLateInclude.fdf25
-rw-r--r--Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityPostMemoryInclude.fdf (renamed from Platform/Intel/MinPlatformPkg/Include/Fdf/CorePeiBfvInclude.fdf)4
-rw-r--r--Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityPreMemoryInclude.fdf20
-rw-r--r--Platform/Intel/MinPlatformPkg/Include/Fdf/CoreUefiBootInclude.fdf (renamed from Platform/Intel/MinPlatformPkg/Include/Fdf/CoreDxeInclude.fdf)33
-rw-r--r--Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec70
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c22
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf8
-rw-r--r--Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py4
17 files changed, 173 insertions, 107 deletions
diff --git a/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/PlatformBootOption.c b/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/PlatformBootOption.c
index c909aca365..a0418a75b9 100644
--- a/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/PlatformBootOption.c
+++ b/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/PlatformBootOption.c
@@ -57,7 +57,7 @@ Returns:
DevicePath = NULL;
Status = EFI_SUCCESS;
- DEBUG ((DEBUG_INFO, "[FVMAIN2] BdsCreateShellDevicePath\n"));
+ DEBUG ((DEBUG_INFO, "BdsCreateShellDevicePath\n"));
gBS->LocateHandleBuffer (
ByProtocol,
&gEfiFirmwareVolume2ProtocolGuid,
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/Common/SpiFvbServiceCommon.c b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/Common/SpiFvbServiceCommon.c
index f4f1746291..24420a4368 100644
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/Common/SpiFvbServiceCommon.c
+++ b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/Common/SpiFvbServiceCommon.c
@@ -22,20 +22,18 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
FVB_GLOBAL mFvbModuleGlobal;
//
-// This platform driver knows there are 5 FVs on
-// FD, which are Test Menu, FvRecovery, FvMain and FvNvStorage.
+// This platform driver knows there are multiple FVs on FD.
// Now we only provide FVs on Variable region and MicorCode region for performance issue.
//
FV_INFO mPlatformFvBaseAddress[] = {
{FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(PcdFlashNvStorageVariableSize)},
- {FixedPcdGet32(PcdFlashMicrocodeFvBase), FixedPcdGet32(PcdFlashMicrocodeFvSize)},
+ {FixedPcdGet32(PcdFlashFvMicrocodeBase), FixedPcdGet32(PcdFlashFvMicrocodeSize)},
{0, 0}
};
FV_INFO mPlatformDefaultBaseAddress[] = {
{FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(PcdFlashNvStorageVariableSize)},
- {FixedPcdGet32(PcdFlashMicrocodeFvBase), FixedPcdGet32(PcdFlashMicrocodeFvSize)},
- {FixedPcdGet32(PcdFlashFvMain2Base), FixedPcdGet32(PcdFlashFvMain2Size)},
+ {FixedPcdGet32(PcdFlashFvMicrocodeBase), FixedPcdGet32(PcdFlashFvMicrocodeSize)},
{0, 0}
};
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
index 98f21933c4..3a5f788f45 100644
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+++ b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
@@ -50,10 +50,8 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONSUMES
- gPlatformModuleTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
- gPlatformModuleTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
- gPlatformModuleTokenSpaceGuid.PcdFlashFvMain2Base ## CONSUMES
- gPlatformModuleTokenSpaceGuid.PcdFlashFvMain2Size ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeBase ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeSize ## CONSUMES
[Sources]
Common/SpiFvbServiceCommon.c
diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c
index 8fe1572065..634769bd3e 100644
--- a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c
+++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c
@@ -253,7 +253,7 @@ PostFspmHobProcess (
}
//
- // @todo: It is a W/A for SetMemorySpaceAttribute issue in PchSpi and PchReset drivers in FVMAIN of SSPT.
+ // @todo: It is a W/A for SetMemorySpaceAttribute issue in PchSpi and PchReset drivers.
// We need to modify it instead of hard code here. Due to InstallEfiMemory is using hard code to
// describe memory resource, we have to hard code in here. Once InstallEfiMemory is merged, we should
// be able to remove this.
diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/FspWrapperPlatformSecLib.c b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/FspWrapperPlatformSecLib.c
index cc7e043c96..2cd15ce442 100644
--- a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/FspWrapperPlatformSecLib.c
+++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/FspWrapperPlatformSecLib.c
@@ -71,20 +71,20 @@ PEI_SEC_PERFORMANCE_PPI mSecPerformancePpi = {
SecGetPerformance
};
-EFI_PEI_FIRMWARE_VOLUME_INFO_PPI mRecovery2FirmwareVolumeInfoPpi = {
+EFI_PEI_FIRMWARE_VOLUME_INFO_PPI mFvSecurityInfoPpi = {
EFI_FIRMWARE_FILE_SYSTEM2_GUID,
- (VOID *)(UINTN) FixedPcdGet32 (PcdFlashFvRecovery2Base),
- FixedPcdGet32 (PcdFlashFvRecovery2Size),
+ (VOID *)(UINTN) FixedPcdGet32 (PcdFlashFvSecurityBase),
+ FixedPcdGet32 (PcdFlashFvSecuritySize),
+ NULL,
NULL,
- NULL
};
-EFI_PEI_FIRMWARE_VOLUME_INFO_PPI mRecovery3FirmwareVolumeInfoPpi = {
+EFI_PEI_FIRMWARE_VOLUME_INFO_PPI mFvAdvancedInfoPpi = {
EFI_FIRMWARE_FILE_SYSTEM2_GUID,
- (VOID *)(UINTN) FixedPcdGet32 (PcdFlashFvRecovery3Base),
- FixedPcdGet32 (PcdFlashFvRecovery3Size),
- NULL,
+ (VOID *)(UINTN) FixedPcdGet32 (PcdFlashFvAdvancedBase),
+ FixedPcdGet32 (PcdFlashFvAdvancedSize),
NULL,
+ NULL
};
EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformPpi[] = {
@@ -96,12 +96,12 @@ EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformPpi[] = {
{
EFI_PEI_PPI_DESCRIPTOR_PPI,
&gEfiPeiFirmwareVolumeInfoPpiGuid,
- &mRecovery2FirmwareVolumeInfoPpi
+ &mFvSecurityInfoPpi
},
{
EFI_PEI_PPI_DESCRIPTOR_PPI,
&gEfiPeiFirmwareVolumeInfoPpiGuid,
- &mRecovery3FirmwareVolumeInfoPpi
+ &mFvAdvancedInfoPpi
},
{
EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf
index 84bfef1016..68abcf4d0a 100644
--- a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf
+++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf
@@ -97,7 +97,7 @@
gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset ## CONSUMES
gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress ## CONSUMES
gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize ## CONSUMES
- gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base
- gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
- gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery3Base
- gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery3Size
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvSecurityBase ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvSecuritySize ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedBase ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedSize ## CONSUMES
diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreOsBootInclude.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreOsBootInclude.fdf
new file mode 100644
index 0000000000..399b607458
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreOsBootInclude.fdf
@@ -0,0 +1,38 @@
+## @file
+# FDF file of Platform.
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+!if gPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE
+INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
+INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
+INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
+!endif
+
+!if gPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE
+INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
+INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
+INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
+INF MdeModulePkg/Universal/StatusCodeHandler/Smm/StatusCodeHandlerSmm.inf
+INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
+INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
+INF MdeModulePkg/Universal/SmmCommunicationBufferDxe/SmmCommunicationBufferDxe.inf
+!endif
+
+!if gPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE
+INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
+INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
+INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
+INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
+!endif
+
diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePeiPostMemInclude.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePostMemoryInclude.fdf
index 013c10146b..013c10146b 100644
--- a/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePeiPostMemInclude.fdf
+++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePostMemoryInclude.fdf
diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePeiPreMemInclude.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePreMemoryInclude.fdf
index 3acdcc5269..a11a59be20 100644
--- a/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePeiPreMemInclude.fdf
+++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePreMemoryInclude.fdf
@@ -13,7 +13,10 @@
#
##
-INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
+INF UefiCpuPkg/SecCore/SecCore.inf
+INF MdeModulePkg/Core/Pei/PeiMain.inf
+
+INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf
@@ -25,8 +28,3 @@ INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
-!if gPlatformModuleTokenSpaceGuid.PcdTpm2Enable == TRUE
-INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
-INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf
-!endif
-
diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityLateInclude.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityLateInclude.fdf
new file mode 100644
index 0000000000..79bea1bb2a
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityLateInclude.fdf
@@ -0,0 +1,25 @@
+## @file
+# FDF file of Platform.
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+!if gPlatformModuleTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE
+INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
+!endif
+
+!if gPlatformModuleTokenSpaceGuid.PcdTpm2Enable == TRUE
+INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
+INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf
+INF SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf
+INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDxe.inf
+!endif
diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePeiBfvInclude.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityPostMemoryInclude.fdf
index ef9463228a..013c10146b 100644
--- a/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePeiBfvInclude.fdf
+++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityPostMemoryInclude.fdf
@@ -12,7 +12,3 @@
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
-
-INF UefiCpuPkg/SecCore/SecCore.inf
-INF MdeModulePkg/Core/Pei/PeiMain.inf
-
diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityPreMemoryInclude.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityPreMemoryInclude.fdf
new file mode 100644
index 0000000000..3e8d86f593
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityPreMemoryInclude.fdf
@@ -0,0 +1,20 @@
+## @file
+# FDF file of Platform.
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+!if gPlatformModuleTokenSpaceGuid.PcdTpm2Enable == TRUE
+INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
+INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf
+!endif
+
diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreDxeInclude.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreUefiBootInclude.fdf
index 7aab06f7ad..f0950a5017 100644
--- a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreDxeInclude.fdf
+++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreUefiBootInclude.fdf
@@ -26,11 +26,7 @@ INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
-!if gPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE
-INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
-INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
-INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
-!else
+!if gPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == TRUE
INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
!endif
@@ -82,30 +78,3 @@ INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
INF RuleOverride = UI MdeModulePkg/Application/UiApp/UiApp.inf
INF MdeModulePkg/Application/BootManagerMenuApp/BootManagerMenuApp.inf
-!if gPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE
-INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
-INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
-INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
-INF MdeModulePkg/Universal/StatusCodeHandler/Smm/StatusCodeHandlerSmm.inf
-INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
-INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
-INF MdeModulePkg/Universal/SmmCommunicationBufferDxe/SmmCommunicationBufferDxe.inf
-!endif
-
-!if gPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE
-INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
-INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
-INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
-INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
-!endif
-
-!if gPlatformModuleTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE
-INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
-!endif
-
-!if gPlatformModuleTokenSpaceGuid.PcdTpm2Enable == TRUE
-INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
-INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf
-INF SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf
-INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDxe.inf
-!endif
diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
index e1d52b7a62..9418ee1f8f 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
@@ -77,39 +77,43 @@ TestPointCheckLib|Include/Library/TestPointCheckLib.h
##
gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x10000001
gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002
-gPlatformModuleTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE60000|UINT32|0x30000004
-gPlatformModuleTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A0000|UINT32|0x30000005
-gPlatformModuleTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x00660000|UINT32|0x30000006
-
-gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|0x00000000|UINT32|0x20000001
-gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize|0x00000000|UINT32|0x20000002
-gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryOffset|0x00000000|UINT32|0x20000003
-gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|0x00000000|UINT32|0x20000004
-gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size|0x00000000|UINT32|0x20000005
-gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Offset|0x00000000|UINT32|0x20000006
-gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery3Base|0x00000000|UINT32|0x20000007
-gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery3Size|0x00000000|UINT32|0x20000008
-gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery3Offset|0x00000000|UINT32|0x20000009
-gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|0x00000000|UINT32|0x2000000A
-gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize|0x00000000|UINT32|0x2000000B
-gPlatformModuleTokenSpaceGuid.PcdFlashFvMainOffset|0x00000000|UINT32|0x2000000C
-gPlatformModuleTokenSpaceGuid.PcdFlashFvMain2Base|0x00000000|UINT32|0x2000000D
-gPlatformModuleTokenSpaceGuid.PcdFlashFvMain2Size|0x00000000|UINT32|0x2000000E
-gPlatformModuleTokenSpaceGuid.PcdFlashFvMain2Offset|0x00000000|UINT32|0x2000000F
-gPlatformModuleTokenSpaceGuid.PcdFlashFvFspWrapperBase|0x00000000|UINT32|0x20000013
-gPlatformModuleTokenSpaceGuid.PcdFlashFvFspWrapperSize|0x00000000|UINT32|0x20000014
-gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UINT32|0x20000015
-gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT32|0x20000016
-gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UINT32|0x20000017
-gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x00000000|UINT32|0x20000018
-gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x00000000|UINT32|0x20000019
-gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x00000000|UINT32|0x2000001A
-gPlatformModuleTokenSpaceGuid.PcdFlashFvFspmtBase|0x00000000|UINT32|0x20000021
-gPlatformModuleTokenSpaceGuid.PcdFlashFvFspmtSize|0x00000000|UINT32|0x20000022
-gPlatformModuleTokenSpaceGuid.PcdFlashFvFspmtOffset|0x00000000|UINT32|0x20000023
-gPlatformModuleTokenSpaceGuid.PcdFlashFvFspsBase|0x00000000|UINT32|0x20000024
-gPlatformModuleTokenSpaceGuid.PcdFlashFvFspsSize|0x00000000|UINT32|0x20000025
-gPlatformModuleTokenSpaceGuid.PcdFlashFvFspsOffset|0x00000000|UINT32|0x20000026
+
+gPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT32|0x30000004
+gPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT32|0x30000005
+gPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UINT32|0x30000006
+
+gPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UINT32|0x20000004
+gPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UINT32|0x20000005
+gPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UINT32|0x20000006
+gPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000|UINT32|0x20000007
+gPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000|UINT32|0x20000008
+gPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x00000000|UINT32|0x20000009
+gPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UINT32|0x2000000A
+gPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UINT32|0x2000000B
+gPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|UINT32|0x2000000C
+gPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT32|0x2000000D
+gPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT32|0x2000000E
+gPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UINT32|0x2000000F
+gPlatformModuleTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UINT32|0x20000010
+gPlatformModuleTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT32|0x20000011
+gPlatformModuleTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UINT32|0x20000012
+gPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UINT32|0x20000013
+gPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UINT32|0x20000014
+gPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000|UINT32|0x20000015
+
+gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UINT32|0x20000016
+gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT32|0x20000017
+gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UINT32|0x20000018
+gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x00000000|UINT32|0x20000019
+gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x00000000|UINT32|0x2000001A
+gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x00000000|UINT32|0x2000001B
+
+gPlatformModuleTokenSpaceGuid.PcdFlashFvFspMTBase|0x00000000|UINT32|0x20000021
+gPlatformModuleTokenSpaceGuid.PcdFlashFvFspMTSize|0x00000000|UINT32|0x20000022
+gPlatformModuleTokenSpaceGuid.PcdFlashFvFspMTOffset|0x00000000|UINT32|0x20000023
+gPlatformModuleTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32|0x20000024
+gPlatformModuleTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32|0x20000025
+gPlatformModuleTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT32|0x20000026
gPlatformModuleTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32|0x80000000
gPlatformModuleTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x00000040|UINT32|0x80000001
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c
index 10561513fe..d76020d220 100644
--- a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c
@@ -334,9 +334,25 @@ ReportFv (
} else {
PeiServicesInstallFvInfo2Ppi (
- &(((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) FixedPcdGet32 (PcdFlashFvMainBase))->FileSystemGuid),
- (VOID *) (UINTN) FixedPcdGet32 (PcdFlashFvMainBase),
- FixedPcdGet32 (PcdFlashFvMainSize),
+ &(((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) FixedPcdGet32 (PcdFlashFvPostMemoryBase))->FileSystemGuid),
+ (VOID *) (UINTN) FixedPcdGet32 (PcdFlashFvPostMemoryBase),
+ FixedPcdGet32 (PcdFlashFvPostMemorySize),
+ NULL,
+ NULL,
+ 0
+ );
+ PeiServicesInstallFvInfo2Ppi (
+ &(((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) FixedPcdGet32 (PcdFlashFvUefiBootBase))->FileSystemGuid),
+ (VOID *) (UINTN) FixedPcdGet32 (PcdFlashFvUefiBootBase),
+ FixedPcdGet32 (PcdFlashFvUefiBootSize),
+ NULL,
+ NULL,
+ 0
+ );
+ PeiServicesInstallFvInfo2Ppi (
+ &(((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) FixedPcdGet32 (PcdFlashFvOsBootBase))->FileSystemGuid),
+ (VOID *) (UINTN) FixedPcdGet32 (PcdFlashFvOsBootBase),
+ FixedPcdGet32 (PcdFlashFvOsBootSize),
NULL,
NULL,
0
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
index 82c503814b..e8115668b7 100644
--- a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
@@ -43,8 +43,12 @@
[Pcd]
gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSUMES
gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES
- gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase ## CONSUMES
- gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemoryBase ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemorySize ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootBase ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootSize ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootBase ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootSize ## CONSUMES
gPlatformModuleTokenSpaceGuid.PcdStopAfterDebugInit
gPlatformModuleTokenSpaceGuid.PcdStopAfterMemInit
diff --git a/Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py b/Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py
index b9d627a1d2..1558ad9bc3 100644
--- a/Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py
+++ b/Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py
@@ -59,9 +59,9 @@ flashmap = data
# Get FSP-S & FSP-M-T offset & calculate the base
for line in flashmap.split("\n"):
- if "PcdFlashFvFspsOffset" in line:
+ if "PcdFlashFvFspSOffset" in line:
fspSBaseOffset = long(line.split("=")[1].split()[0], 16)
- if "PcdFlashFvFspmtOffset" in line:
+ if "PcdFlashFvFspMTOffset" in line:
fspMBaseOffset = long(line.split("=")[1].split()[0], 16)
file.close()