diff options
| author | li-elvin <li-elvin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-11-20 00:59:17 +0000 |
|---|---|---|
| committer | li-elvin <li-elvin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-11-20 00:59:17 +0000 |
| commit | 6d55565d681dcf5e1b5034adabf9700468760e81 (patch) | |
| tree | 2b080e6ae7215c3b57668c849cbf625d545346a3 | |
| parent | 091249f49723fa773d17c910d2dbbc2de211466e (diff) | |
| download | edk2-platforms-6d55565d681dcf5e1b5034adabf9700468760e81.tar.xz | |
If IDE controller is not in IDE mode, we should not clear IO bar.
Signed-off-by: Li Elvin <elvin.li@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13953 6f19259b-4bc3-4df7-8a09-765794883524
| -rw-r--r-- | IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h | 4 | ||||
| -rw-r--r-- | IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyIde.c | 47 |
2 files changed, 36 insertions, 15 deletions
diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h index 7e1a6063ef..6ea3a1c894 100644 --- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h +++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h @@ -18,6 +18,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include <FrameworkDxe.h>
+#include <IndustryStandard\Pci.h>
#include <Guid/SmBios.h>
#include <Guid/Acpi.h>
@@ -134,6 +135,9 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #define BDA_VIDEO_MODE 0x49
+#define IDE_PI_REGISTER_PNE BIT0
+#define IDE_PI_REGISTER_SNE BIT2
+
typedef struct {
UINTN PciSegment;
UINTN PciBus;
diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyIde.c b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyIde.c index 4e52fe9c03..255baf08c6 100644 --- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyIde.c +++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyIde.c @@ -268,9 +268,9 @@ InitLegacyIdeController ( )
{
EFI_PCI_IO_PROTOCOL *PciIo;
- UINT8 Pi;
UINT32 IOBarClear;
EFI_STATUS Status;
+ PCI_TYPE00 PciData;
//
// If the IDE channel is in compatibility (legacy) mode, remove all
@@ -279,21 +279,38 @@ InitLegacyIdeController ( // and has PCI I/O resources allocated
//
Status = gBS->HandleProtocol (
- IdeController,
- &gEfiPciIoProtocolGuid,
- (VOID **) &PciIo
+ IdeController,
+ &gEfiPciIoProtocolGuid,
+ &PciIo
);
- if (!EFI_ERROR (Status)) {
- IOBarClear = 0x00;
- PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, 0x09, 1, &Pi);
- if ((Pi & 0x01) == 0) {
- PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x10, 1, &IOBarClear);
- PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x14, 1, &IOBarClear);
- }
- if ((Pi & 0x04) == 0) {
- PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x18, 1, &IOBarClear);
- PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x1C, 1, &IOBarClear);
- }
+ if (EFI_ERROR (Status)) {
+ return ;
+ }
+
+ Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, 0, sizeof (PciData), &PciData);
+ if (EFI_ERROR (Status)) {
+ return ;
+ }
+
+ //
+ // Check whether this is IDE
+ //
+ if ((PciData.Hdr.ClassCode[2] != PCI_CLASS_MASS_STORAGE) ||
+ (PciData.Hdr.ClassCode[1] != PCI_CLASS_MASS_STORAGE_IDE)) {
+ return ;
+ }
+
+ //
+ // Clear bar for legacy IDE
+ //
+ IOBarClear = 0x00;
+ if ((PciData.Hdr.ClassCode[0] & IDE_PI_REGISTER_PNE) == 0) {
+ PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x10, 1, &IOBarClear);
+ PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x14, 1, &IOBarClear);
+ }
+ if ((PciData.Hdr.ClassCode[0] & IDE_PI_REGISTER_SNE) == 0) {
+ PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x18, 1, &IOBarClear);
+ PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x1C, 1, &IOBarClear);
}
return ;
|