UefiCpuPkg/PiSmmCpuDxeSmm: Allocate buffer for MSRs semaphores

Allocate MSRs semaphores in allocated aligned semaphores buffer.
And add it into semaphores structure.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
(cherry picked from commit 695e62d1419cf3a8ab65a96c86c9cf58d4206d61)

3 files changed, 20 insertions, 3 deletions

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index bbff6e18b4..22c133202c 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -1,7 +1,7 @@
 /** @file

 Code for Processor S3 restoration

 

-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>

 This program and the accompanying materials

 are licensed and made available under the terms and conditions of the BSD License

 which accompanies this distribution.  The full text of the license may be found at

@@ -48,7 +48,6 @@ AsmGetAddressMap (
 

 #define LEGACY_REGION_SIZE    (2 * 0x1000)

 #define LEGACY_REGION_BASE    (0xA0000 - LEGACY_REGION_SIZE)

-#define MSR_SPIN_LOCK_INIT_NUM 15

 

 ACPI_CPU_DATA                mAcpiCpuData;

 UINT32                       mNumberToFinish;

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 59cecc3fe8..3ea4b6b91d 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -1205,6 +1205,7 @@ InitializeSmmCpuSemaphores (
   UINTN                      TotalSize;

   UINTN                      GlobalSemaphoresSize;

   UINTN                      CpuSemaphoresSize;

+  UINTN                      MsrSemahporeSize;

   UINTN                      SemaphoreSize;

   UINTN                      Pages;

   UINTN                      *SemaphoreBlock;

@@ -1214,7 +1215,8 @@ InitializeSmmCpuSemaphores (
   ProcessorCount = gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;

   GlobalSemaphoresSize = (sizeof (SMM_CPU_SEMAPHORE_GLOBAL) / sizeof (VOID *)) * SemaphoreSize;

   CpuSemaphoresSize    = (sizeof (SMM_CPU_SEMAPHORE_CPU) / sizeof (VOID *)) * ProcessorCount * SemaphoreSize;

-  TotalSize = GlobalSemaphoresSize + CpuSemaphoresSize;

+  MsrSemahporeSize     = MSR_SPIN_LOCK_INIT_NUM * SemaphoreSize;

+  TotalSize = GlobalSemaphoresSize + CpuSemaphoresSize + MsrSemahporeSize;

   DEBUG((EFI_D_INFO, "One Semaphore Size    = 0x%x\n", SemaphoreSize));

   DEBUG((EFI_D_INFO, "Total Semaphores Size = 0x%x\n", TotalSize));

   Pages = EFI_SIZE_TO_PAGES (TotalSize);

@@ -1241,6 +1243,12 @@ InitializeSmmCpuSemaphores (
   SemaphoreAddr += ProcessorCount * SemaphoreSize;

   mSmmCpuSemaphores.SemaphoreCpu.Present = (BOOLEAN *)SemaphoreAddr;

 

+  SemaphoreAddr = (UINTN)SemaphoreBlock + GlobalSemaphoresSize + CpuSemaphoresSize;

+  mSmmCpuSemaphores.SemaphoreMsr.Msr              = (SPIN_LOCK *)SemaphoreAddr;

+  mSmmCpuSemaphores.SemaphoreMsr.AvailableCounter =

+        ((UINTN)SemaphoreBlock + Pages * SIZE_4KB - SemaphoreAddr) / SemaphoreSize;

+  ASSERT (mSmmCpuSemaphores.SemaphoreMsr.AvailableCounter >= MSR_SPIN_LOCK_INIT_NUM);

+

   mSmmMpSyncData->Counter       = mSmmCpuSemaphores.SemaphoreGlobal.Counter;

   mSmmMpSyncData->InsideSmm     = mSmmCpuSemaphores.SemaphoreGlobal.InsideSmm;

   mSmmMpSyncData->AllCpusInSync = mSmmCpuSemaphores.SemaphoreGlobal.AllCpusInSync;

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
index fd441ad3a1..c344886c08 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
@@ -322,6 +322,8 @@ typedef struct {
   volatile BOOLEAN              *CandidateBsp;

 } SMM_DISPATCHER_MP_SYNC_DATA;

 

+#define MSR_SPIN_LOCK_INIT_NUM 15

+

 typedef struct {

   SPIN_LOCK    SpinLock;

   UINT32       MsrIndex;

@@ -374,6 +376,13 @@ typedef struct {
   volatile BOOLEAN                  *Present;

 } SMM_CPU_SEMAPHORE_CPU;

 

+///

+/// All MSRs semaphores' pointer and counter

+///

+typedef struct {

+  SPIN_LOCK            *Msr;

+  UINTN                AvailableCounter;

+} SMM_CPU_SEMAPHORE_MSR;

 

 ///

 /// All semaphores' information

@@ -381,6 +390,7 @@ typedef struct {
 typedef struct {

   SMM_CPU_SEMAPHORE_GLOBAL          SemaphoreGlobal;

   SMM_CPU_SEMAPHORE_CPU             SemaphoreCpu;

+  SMM_CPU_SEMAPHORE_MSR             SemaphoreMsr;

 } SMM_CPU_SEMAPHORES;

 

 extern IA32_DESCRIPTOR                     gcSmiGdtr;