diff options
author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-07-04 20:06:23 +0000 |
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committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-07-04 20:06:23 +0000 |
commit | 2575b72620a9d90af26d9863b4a0675079c1c019 (patch) | |
tree | b2ac044a0615949db79868cc193b885ca3fef001 | |
parent | 9736c2972157e9c1c4f3cd4bac83f2256a2c9688 (diff) | |
download | edk2-platforms-2575b72620a9d90af26d9863b4a0675079c1c019.tar.xz |
ArmPkg: Fixed RVCT compiler warnings
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13490 6f19259b-4bc3-4df7-8a09-765794883524
13 files changed, 29 insertions, 17 deletions
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index 8eb1ebda52..23beb24274 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -95,12 +95,12 @@ typedef enum { // // ARM Cpu IDs // -#define ARM_CPU_IMPLEMENTER_MASK (0xFF << 24) -#define ARM_CPU_IMPLEMENTER_ARMLTD (0x41 << 24) -#define ARM_CPU_IMPLEMENTER_DEC (0x44 << 24) -#define ARM_CPU_IMPLEMENTER_MOT (0x4D << 24) -#define ARM_CPU_IMPLEMENTER_QUALCOMM (0x51 << 24) -#define ARM_CPU_IMPLEMENTER_MARVELL (0x56 << 24) +#define ARM_CPU_IMPLEMENTER_MASK (0xFFU << 24) +#define ARM_CPU_IMPLEMENTER_ARMLTD (0x41U << 24) +#define ARM_CPU_IMPLEMENTER_DEC (0x44U << 24) +#define ARM_CPU_IMPLEMENTER_MOT (0x4DU << 24) +#define ARM_CPU_IMPLEMENTER_QUALCOMM (0x51U << 24) +#define ARM_CPU_IMPLEMENTER_MARVELL (0x56U << 24) #define ARM_CPU_PRIMARY_PART_MASK (0xFFF << 4) #define ARM_CPU_PRIMARY_PART_CORTEXA5 (0xC05 << 4) diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.asm b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.asm index 39d6c85937..a5ff6b2610 100644 --- a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.asm +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.asm @@ -97,4 +97,4 @@ ReadCLIDR mrc p15,1,r0,c0,c0,1 ; Read CP15 Cache Level ID Register
bx lr
-END
+ END
diff --git a/ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.asm b/ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.asm index 7222cf9b7f..7926d55369 100755 --- a/ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.asm +++ b/ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.asm @@ -80,4 +80,3 @@ L43 ldmfd sp!, {r4-r11, pc}
END
-
\ No newline at end of file diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memset.asm b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memset.asm index 2d901c3a6b..d567cd54e7 100755 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memset.asm +++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memset.asm @@ -55,3 +55,5 @@ __aeabi_memclr4 mov r2, r1 mov r1, #0 b __aeabi_memset + + END diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h b/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h index 122cf2b033..291d676d30 100644 --- a/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h @@ -104,9 +104,9 @@ // L2x0 Cache Controller Base Address
//#define ARM_EB_L2x0_CTLR_BASE 0x1E00A000*/
-#define ARM_EB_SYS_PROC_ID_MASK (0xFF << 24)
-#define ARM_EB_SYS_PROC_ID_CORTEX_A8 (0x0E << 24)
-#define ARM_EB_SYS_PROC_ID_CORTEX_A9 (0x0C << 24)
+#define ARM_EB_SYS_PROC_ID_MASK (UINT32)(0xFFU << 24)
+#define ARM_EB_SYS_PROC_ID_CORTEX_A8 (UINT32)(0x0EU << 24)
+#define ARM_EB_SYS_PROC_ID_CORTEX_A9 (UINT32)(0x0CU << 24)
/*******************************************
// System Configuration Control
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbBoot.asm b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbBoot.asm index 1765dd13aa..e8bc0cd0b4 100644 --- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbBoot.asm +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbBoot.asm @@ -54,3 +54,5 @@ ArmPlatformSecBootAction ArmPlatformSecBootMemoryInit
// The SMC does not need to be initialized for RTSM
bx lr
+
+ END
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Include/VExpressMotherBoard.h b/ArmPlatformPkg/ArmVExpressPkg/Include/VExpressMotherBoard.h index 63b4005e96..3555f3635a 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Include/VExpressMotherBoard.h +++ b/ArmPlatformPkg/ArmVExpressPkg/Include/VExpressMotherBoard.h @@ -48,11 +48,11 @@ // VRAM offset for the PL111 Colour LCD Controller on the motherboard
#define VRAM_MOTHERBOARD_BASE (ARM_VE_SMB_PERIPH_BASE + 0x00000)
-#define ARM_VE_SYS_PROC_ID_MASK (0xFF << 24)
-#define ARM_VE_SYS_PROC_ID_UNSUPPORTED (0xFF << 24)
-#define ARM_VE_SYS_PROC_ID_CORTEX_A9 (0x0C << 24)
-#define ARM_VE_SYS_PROC_ID_CORTEX_A5 (0x12 << 24)
-#define ARM_VE_SYS_PROC_ID_CORTEX_A15 (0x14 << 24)
+#define ARM_VE_SYS_PROC_ID_MASK (UINT32)(0xFFU << 24)
+#define ARM_VE_SYS_PROC_ID_UNSUPPORTED (UINT32)(0xFFU << 24)
+#define ARM_VE_SYS_PROC_ID_CORTEX_A9 (UINT32)(0x0CU << 24)
+#define ARM_VE_SYS_PROC_ID_CORTEX_A5 (UINT32)(0x12U << 24)
+#define ARM_VE_SYS_PROC_ID_CORTEX_A15 (UINT32)(0x14U << 24)
//
// Sites where the peripheral is fitted
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm index ebcee9a0d9..16fab1605b 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm @@ -123,3 +123,5 @@ ArmPlatformSecBootMemoryInit ldr r0, [r2, #0]
bx r5
+
+ END
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMBoot.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMBoot.asm index f62a1998ed..2d0b94679f 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMBoot.asm +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMBoot.asm @@ -50,3 +50,5 @@ ArmPlatformSecBootAction ArmPlatformSecBootMemoryInit
// The SMC does not need to be initialized for RTSM
bx lr
+
+ END
diff --git a/ArmPlatformPkg/Drivers/PL35xSmc/InitializeSMC.asm b/ArmPlatformPkg/Drivers/PL35xSmc/InitializeSMC.asm index 297b2d77ab..fd6f6e6a13 100755 --- a/ArmPlatformPkg/Drivers/PL35xSmc/InitializeSMC.asm +++ b/ArmPlatformPkg/Drivers/PL35xSmc/InitializeSMC.asm @@ -58,3 +58,5 @@ PL35xSmcSetRefresh str r2, [r1, #PL350_SMC_REFRESH_0_OFFSET]
str r3, [r1, #PL350_SMC_REFRESH_1_OFFSET]
blx lr
+
+ END
diff --git a/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullBoot.asm b/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullBoot.asm index 0cd5e37c70..ead0868740 100644 --- a/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullBoot.asm +++ b/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullBoot.asm @@ -45,3 +45,5 @@ ArmPlatformSecBootAction ArmPlatformSecBootMemoryInit
// The SMC does not need to be initialized for RTSM
bx lr
+
+ END
diff --git a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c index 2497da1092..9e78d7eadf 100755 --- a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c +++ b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c @@ -16,6 +16,7 @@ #include <Library/ArmLib.h>
#include <Library/ArmGicLib.h>
+#include <Library/ArmPlatformSecLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
#include <Library/PrintLib.h>
diff --git a/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm b/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm index 1e1938c8f3..e0b622103f 100644 --- a/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm +++ b/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm @@ -36,7 +36,7 @@ _ModuleEntryPoint _SetSVCMode
// Enter SVC mode, Disable FIQ and IRQ
- mov r1, #0x13|0x80|0x40
+ mov r1, #0x13 :OR: 0x80 :OR: 0x40
msr CPSR_c, r1
// Check if we can install the stack at the top of the System Memory or if we need
|