Update override code to UDK2015.

git-svn-id: https://ssvn.intel.com:80/ssg/csd/tiano/tianoad/Research/Developer/mangguo/MinnowBoardMaxUDK2015Platform@103529 f973567a-9dae-4ef8-9d9d-80fbec5b6bbd

13 files changed, 359 insertions, 124 deletions

diff --git a/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsBoot.c b/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsBoot.c
index 6ada8623f4..92681126ee 100644
--- a/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsBoot.c
+++ b/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsBoot.c
@@ -2235,23 +2235,14 @@ BdsLibBootViaBootOption (
   EFI_DEVICE_PATH_PROTOCOL  *FilePath;

   EFI_LOADED_IMAGE_PROTOCOL *ImageInfo;

   EFI_DEVICE_PATH_PROTOCOL  *WorkingDevicePath;

-  EFI_ACPI_S3_SAVE_PROTOCOL *AcpiS3Save;

   LIST_ENTRY                TempBootLists;

   EFI_BOOT_LOGO_PROTOCOL    *BootLogo;

 

+  Status        = EFI_SUCCESS;

   *ExitDataSize = 0;

   *ExitData     = NULL;

 

   //

-  // Notes: this code can be remove after the s3 script table

-  // hook on the event EVT_SIGNAL_READY_TO_BOOT or

-  // EVT_SIGNAL_LEGACY_BOOT

-  //

-  Status = gBS->LocateProtocol (&gEfiAcpiS3SaveProtocolGuid, NULL, (VOID **) &AcpiS3Save);

-  if (!EFI_ERROR (Status)) {

-    AcpiS3Save->S3Save (AcpiS3Save, NULL);

-  }

-  //

   // If it's Device Path that starts with a hard drive path, append it with the front part to compose a

   // full device path

   //

@@ -2285,14 +2276,14 @@ BdsLibBootViaBootOption (
   }

 

   //

-  // Report Status Code to indicate ReadyToBoot event will be signalled

+  // Signal the EVT_SIGNAL_READY_TO_BOOT event

   //

-  REPORT_STATUS_CODE (EFI_PROGRESS_CODE, (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_READY_TO_BOOT_EVENT));

+  EfiSignalEventReadyToBoot();

 

   //

-  // Signal the EVT_SIGNAL_READY_TO_BOOT event

+  // Report Status Code to indicate ReadyToBoot event was signalled

   //

-  EfiSignalEventReadyToBoot();

+  REPORT_STATUS_CODE (EFI_PROGRESS_CODE, (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_READY_TO_BOOT_EVENT));

 

   //

   // Expand USB Class or USB WWID device path node to be full device path of a USB

diff --git a/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsMisc.c b/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsMisc.c
index dbb132226f..24c1998a14 100644
--- a/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsMisc.c
+++ b/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsMisc.c
@@ -1,7 +1,7 @@
 /** @file

   Misc BDS library function

 

-Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR>

 This program and the accompanying materials

 are licensed and made available under the terms and conditions of the BSD License

 which accompanies this distribution.  The full text of the license may be found at

@@ -1131,8 +1131,16 @@ SetupResetReminder (
       ASSERT (StringBuffer1 != NULL);

       StringBuffer2 = AllocateZeroPool (MAX_STRING_LEN * sizeof (CHAR16));

       ASSERT (StringBuffer2 != NULL);

-      StrCpy (StringBuffer1, L"Configuration changed. Reset to apply it Now.");

-      StrCpy (StringBuffer2, L"Press ENTER to reset");

+      StrCpyS (

+        StringBuffer1,

+        MAX_STRING_LEN,

+        L"Configuration changed. Reset to apply it Now."

+        );

+      StrCpyS (

+        StringBuffer2,

+        MAX_STRING_LEN,

+        L"Press ENTER to reset"

+        );

       //

       // Popup a menu to notice user

       //

diff --git a/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf b/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
index 33ca29835d..e9240f4383 100644
--- a/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
+++ b/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
@@ -120,7 +120,6 @@
   gEfiLegacyBiosProtocolGuid                    ## SOMETIMES_CONSUMES

   gEfiCpuArchProtocolGuid                       ## CONSUMES

   gEfiDevicePathProtocolGuid                    ## CONSUMES

-  gEfiAcpiS3SaveProtocolGuid                    ## SOMETIMES_CONSUMES

   gEfiGraphicsOutputProtocolGuid                ## SOMETIMES_CONSUMES

   gEfiUgaDrawProtocolGuid |gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport ## SOMETIMES_CONSUMES

   gEfiOEMBadgingProtocolGuid                    ## SOMETIMES_CONSUMES

diff --git a/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsStrings.uni b/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsStrings.uni
index 1b345b0d8a..7c3b4f9690 100644
--- a/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsStrings.uni
+++ b/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsStrings.uni
diff --git a/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/InternalBdsLib.h b/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/InternalBdsLib.h
index c32579bfc5..7201d8a335 100644
--- a/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/InternalBdsLib.h
+++ b/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/InternalBdsLib.h
@@ -33,7 +33,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #include <Protocol/SimpleNetwork.h>

 #include <Protocol/FirmwareVolume2.h>

 #include <Protocol/PciIo.h>

-#include <Protocol/AcpiS3Save.h>

 #include <Protocol/OEMBadging.h>

 #include <Protocol/GraphicsOutput.h>

 #include <Protocol/UgaDraw.h>

diff --git a/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/Performance.c b/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/Performance.c
index 047d2a7dbc..78039e79a5 100644
--- a/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/Performance.c
+++ b/Vlv2TbltDevicePkg/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/Performance.c
@@ -3,7 +3,7 @@
   performance, all the function will only include if the performance

   switch is set.

 

-Copyright (c) 2004 - 2013, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR>

 This program and the accompanying materials

 are licensed and made available under the terms and conditions of the BSD License

 which accompanies this distribution.  The full text of the license may be found at

@@ -40,7 +40,7 @@ GetShortPdbFileName (
   UINTN EndIndex;

 

   if (PdbFileName == NULL) {

-    AsciiStrCpy (GaugeString, " ");

+    AsciiStrCpyS (GaugeString, PERF_TOKEN_SIZE, " ");

   } else {

     StartIndex = 0;

     for (EndIndex = 0; PdbFileName[EndIndex] != 0; EndIndex++)

@@ -60,7 +60,7 @@ GetShortPdbFileName (
     for (Index = StartIndex; Index < EndIndex; Index++) {

       GaugeString[Index1] = PdbFileName[Index];

       Index1++;

-      if (Index1 == PERF_TOKEN_LENGTH - 1) {

+      if (Index1 == PERF_TOKEN_LENGTH) {

         break;

       }

     }

@@ -91,7 +91,7 @@ GetNameFromHandle (
   CHAR8                       *PdbFileName;

   EFI_DRIVER_BINDING_PROTOCOL *DriverBinding;

 

-  AsciiStrCpy (GaugeString, " ");

+  AsciiStrCpyS (GaugeString, PERF_TOKEN_SIZE, " ");

 

   //

   // Get handle name from image protocol

@@ -153,7 +153,7 @@ WriteBootToOsPerformanceData (
   UINT32                    LimitCount;

   EFI_HANDLE                *Handles;

   UINTN                     NoHandles;

-  CHAR8                     GaugeString[PERF_TOKEN_LENGTH];

+  CHAR8                     GaugeString[PERF_TOKEN_SIZE];

   UINT8                     *Ptr;

   UINT32                    Index;

   UINT64                    Ticker;

@@ -287,7 +287,7 @@ WriteBootToOsPerformanceData (
 

       GetNameFromHandle (Handles[Index], GaugeString);

 

-      AsciiStrCpy (mPerfData.Token, GaugeString);

+      AsciiStrCpyS (mPerfData.Token, PERF_TOKEN_SIZE, GaugeString);

       mPerfData.Duration = Duration;

 

       CopyMem (Ptr, &mPerfData, sizeof (PERF_DATA));

@@ -316,7 +316,7 @@ WriteBootToOsPerformanceData (
 

       ZeroMem (&mPerfData, sizeof (PERF_DATA));

 

-      AsciiStrnCpy (mPerfData.Token, Token, PERF_TOKEN_LENGTH);

+      AsciiStrnCpyS (mPerfData.Token, PERF_TOKEN_SIZE, Token, PERF_TOKEN_LENGTH);

       if (StartTicker == 1) {

         StartTicker = StartValue;

       }

diff --git a/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c b/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c
index f07136f36a..54c69d78ed 100644
--- a/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c
+++ b/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c
@@ -2,7 +2,7 @@
 

   Routine procedures for memory allocate/free.

 

-Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>

 This program and the accompanying materials

 are licensed and made available under the terms and conditions of the BSD License

 which accompanies this distribution.  The full text of the license may be found at

@@ -649,7 +649,7 @@ UsbHcAllocateAlignedPages (
   }

   if (Alignment > EFI_PAGE_SIZE) {

     //

-    // Caculate the total number of pages since alignment is larger than page size.

+    // Calculate the total number of pages since alignment is larger than page size.

     //

     AlignmentMask  = Alignment - 1;

     RealPages      = Pages + EFI_SIZE_TO_PAGES (Alignment);

diff --git a/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
index 02f3ee94c5..36d2c5b21c 100644
--- a/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
+++ b/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
@@ -1,7 +1,7 @@
 /** @file

   The XHCI controller driver.

 

-Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>

 This program and the accompanying materials

 are licensed and made available under the terms and conditions of the BSD License

 which accompanies this distribution.  The full text of the license may be found at

@@ -905,17 +905,28 @@ XhcControlTransfer (
   *TransferResult = Urb->Result;

   *DataLength     = Urb->Completed;

 

-  if (*TransferResult == EFI_USB_NOERROR) {

-    Status = EFI_SUCCESS;

-  } else if ((*TransferResult == EFI_USB_ERR_STALL) || (*TransferResult == EFI_USB_ERR_BABBLE)) {

-    RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);

-    if (EFI_ERROR (RecoveryStatus)) {

-      DEBUG ((EFI_D_ERROR, "XhcControlTransfer: XhcRecoverHaltedEndpoint failed\n"));

+  if (Status == EFI_TIMEOUT) {

+    //

+    // The transfer timed out. Abort the transfer by dequeueing of the TD.

+    //

+    RecoveryStatus = XhcDequeueTrbFromEndpoint(Xhc, Urb);

+    if (EFI_ERROR(RecoveryStatus)) {

+      DEBUG((EFI_D_ERROR, "XhcControlTransfer: XhcDequeueTrbFromEndpoint failed\n"));

     }

-    Status = EFI_DEVICE_ERROR;

     goto FREE_URB;

   } else {

-    goto FREE_URB;

+    if (*TransferResult == EFI_USB_NOERROR) {

+      Status = EFI_SUCCESS;

+    } else if ((*TransferResult == EFI_USB_ERR_STALL) || (*TransferResult == EFI_USB_ERR_BABBLE)) {

+      RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);

+      if (EFI_ERROR (RecoveryStatus)) {

+        DEBUG ((EFI_D_ERROR, "XhcControlTransfer: XhcRecoverHaltedEndpoint failed\n"));

+      }

+      Status = EFI_DEVICE_ERROR;

+      goto FREE_URB;

+    } else {

+      goto FREE_URB;

+    }

   }

 

   Xhc->PciIo->Flush (Xhc->PciIo);

@@ -1241,14 +1252,24 @@ XhcBulkTransfer (
   *TransferResult = Urb->Result;

   *DataLength     = Urb->Completed;

 

-  if (*TransferResult == EFI_USB_NOERROR) {

-    Status = EFI_SUCCESS;

-  } else if (*TransferResult == EFI_USB_ERR_STALL) {

-    RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);

-    if (EFI_ERROR (RecoveryStatus)) {

-      DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: XhcRecoverHaltedEndpoint failed\n"));

+  if (Status == EFI_TIMEOUT) {

+    //

+    // The transfer timed out. Abort the transfer by dequeueing of the TD.

+    //

+    RecoveryStatus = XhcDequeueTrbFromEndpoint(Xhc, Urb);

+    if (EFI_ERROR(RecoveryStatus)) {

+      DEBUG((EFI_D_ERROR, "XhcBulkTransfer: XhcDequeueTrbFromEndpoint failed\n"));

+    }

+  } else {

+    if (*TransferResult == EFI_USB_NOERROR) {

+      Status = EFI_SUCCESS;

+    } else if (*TransferResult == EFI_USB_ERR_STALL) {

+      RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);

+      if (EFI_ERROR (RecoveryStatus)) {

+        DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: XhcRecoverHaltedEndpoint failed\n"));

+      }

+      Status = EFI_DEVICE_ERROR;

     }

-    Status = EFI_DEVICE_ERROR;

   }

 

   Xhc->PciIo->Flush (Xhc->PciIo);

@@ -1483,10 +1504,6 @@ XhcSyncInterruptTransfer (
     return EFI_INVALID_PARAMETER;

   }

 

-  if (!XHCI_IS_DATAIN (EndPointAddress)) {

-    return EFI_INVALID_PARAMETER;

-  }

-

   if ((*DataToggle != 1) && (*DataToggle != 0)) {

     return EFI_INVALID_PARAMETER;

   }

@@ -1542,14 +1559,24 @@ XhcSyncInterruptTransfer (
   *TransferResult = Urb->Result;

   *DataLength     = Urb->Completed;

 

-  if (*TransferResult == EFI_USB_NOERROR) {

-    Status = EFI_SUCCESS;

-  } else if (*TransferResult == EFI_USB_ERR_STALL) {

-    RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);

-    if (EFI_ERROR (RecoveryStatus)) {

-      DEBUG ((EFI_D_ERROR, "XhcSyncInterruptTransfer: XhcRecoverHaltedEndpoint failed\n"));

+  if (Status == EFI_TIMEOUT) {

+    //

+    // The transfer timed out. Abort the transfer by dequeueing of the TD.

+    //

+    RecoveryStatus = XhcDequeueTrbFromEndpoint(Xhc, Urb);

+    if (EFI_ERROR(RecoveryStatus)) {

+      DEBUG((EFI_D_ERROR, "XhcSyncInterruptTransfer: XhcDequeueTrbFromEndpoint failed\n"));

+    }

+  } else {

+    if (*TransferResult == EFI_USB_NOERROR) {

+      Status = EFI_SUCCESS;

+    } else if (*TransferResult == EFI_USB_ERR_STALL) {

+      RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);

+      if (EFI_ERROR (RecoveryStatus)) {

+        DEBUG ((EFI_D_ERROR, "XhcSyncInterruptTransfer: XhcRecoverHaltedEndpoint failed\n"));

+      }

+      Status = EFI_DEVICE_ERROR;

     }

-    Status = EFI_DEVICE_ERROR;

   }

 

   Xhc->PciIo->Flush (Xhc->PciIo);

@@ -1826,7 +1853,7 @@ XhcCreateUsbHc (
   //

   Status = gBS->CreateEvent (

                   EVT_TIMER | EVT_NOTIFY_SIGNAL,

-                  TPL_CALLBACK,

+                  TPL_NOTIFY,

                   XhcMonitorAsyncRequests,

                   Xhc,

                   &Xhc->PollTimer

diff --git a/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h b/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
index 729a8c0dd5..7999151b3f 100644
--- a/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
+++ b/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
@@ -2,7 +2,7 @@
 

   Provides some data structure definitions used by the XHCI host controller driver.

 

-Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>

 This program and the accompanying materials

 are licensed and made available under the terms and conditions of the BSD License

 which accompanies this distribution.  The full text of the license may be found at

@@ -47,29 +47,24 @@ typedef struct _USB_DEV_CONTEXT      USB_DEV_CONTEXT;
 //

 #define XHC_1_MICROSECOND            (1)

 //

-// Convert millisecond to microsecond.

+// The unit is microsecond, setting it as 1ms.

 //

 #define XHC_1_MILLISECOND            (1000)

 //

 // XHC generic timeout experience values.

-// The unit is microsecond, setting it as 10ms.

+// The unit is millisecond, setting it as 10s.

 //

 #define XHC_GENERIC_TIMEOUT          (10 * 1000)

 //

 // XHC reset timeout experience values.

-// The unit is microsecond, setting it as 1s.

+// The unit is millisecond, setting it as 1s.

 //

-#define XHC_RESET_TIMEOUT            (1000 * 1000)

-//

-// XHC delay experience value for polling operation.

-// The unit is microsecond, set it as 1ms.

-//

-#define XHC_POLL_DELAY               (1000)

+#define XHC_RESET_TIMEOUT            (1000)

 //

 // XHC async transfer timer interval, set by experience.

-// The unit is 100us, takes 50ms as interval.

+// The unit is 100us, takes 1ms as interval.

 //

-#define XHC_ASYNC_TIMER_INTERVAL     EFI_TIMER_PERIOD_MILLISECONDS(50)

+#define XHC_ASYNC_TIMER_INTERVAL     EFI_TIMER_PERIOD_MILLISECONDS(1)

 

 //

 // XHC raises TPL to TPL_NOTIFY to serialize all its operations

diff --git a/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf b/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
index 5ec8d60c96..614938ac89 100644
--- a/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
+++ b/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
@@ -29,7 +29,7 @@
 #

 # The following information is for reference only and not required by the build tools.

 #

-#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC

+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC ARM AARCH64

 #

 #  DRIVER_BINDING                =  gXhciDriverBinding

 #  COMPONENT_NAME                =  gXhciComponentName

diff --git a/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c b/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
index a513dd9581..d0f22050ad 100644
--- a/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
+++ b/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
@@ -2,7 +2,7 @@
 

   The XHCI register operation routines.

 

-Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>

 This program and the accompanying materials

 are licensed and made available under the terms and conditions of the BSD License

 which accompanies this distribution.  The full text of the license may be found at

@@ -499,7 +499,7 @@ XhcClearOpRegBit (
   @param  Offset       The offset of the operation register.

   @param  Bit          The bit of the register to wait for.

   @param  WaitToSet    Wait the bit to set or clear.

-  @param  Timeout      The time to wait before abort (in microsecond, us).

+  @param  Timeout      The time to wait before abort (in millisecond, ms).

 

   @retval EFI_SUCCESS  The bit successfully changed by host controller.

   @retval EFI_TIMEOUT  The time out occurred.

@@ -515,16 +515,16 @@ XhcWaitOpRegBit (
   )

 {

   UINT32                  Index;

-  UINTN                   Loop;

+  UINT64                  Loop;

 

-  Loop   = (Timeout / XHC_POLL_DELAY) + 1;

+  Loop   = Timeout * XHC_1_MILLISECOND;

 

   for (Index = 0; Index < Loop; Index++) {

     if (XHC_REG_BIT_IS_SET (Xhc, Offset, Bit) == WaitToSet) {

       return EFI_SUCCESS;

     }

 

-    gBS->Stall (XHC_POLL_DELAY);

+    gBS->Stall (XHC_1_MICROSECOND);

   }

 

   return EFI_TIMEOUT;

@@ -656,7 +656,7 @@ XhcIsSysError (
   Reset the XHCI host controller.

 

   @param  Xhc          The XHCI Instance.

-  @param  Timeout      Time to wait before abort (in microsecond, us).

+  @param  Timeout      Time to wait before abort (in millisecond, ms).

 

   @retval EFI_SUCCESS  The XHCI host controller is reset.

   @return Others       Failed to reset the XHCI before Timeout.

@@ -698,7 +698,7 @@ XhcResetHC (
   Halt the XHCI host controller.

 

   @param  Xhc          The XHCI Instance.

-  @param  Timeout      Time to wait before abort (in microsecond, us).

+  @param  Timeout      Time to wait before abort (in millisecond, ms).

 

   @return EFI_SUCCESS  The XHCI host controller is halt.

   @return EFI_TIMEOUT  Failed to halt the XHCI before Timeout.

@@ -722,7 +722,7 @@ XhcHaltHC (
   Set the XHCI host controller to run.

 

   @param  Xhc          The XHCI Instance.

-  @param  Timeout      Time to wait before abort (in microsecond, us).

+  @param  Timeout      Time to wait before abort (in millisecond, ms).

 

   @return EFI_SUCCESS  The XHCI host controller is running.

   @return EFI_TIMEOUT  Failed to set the XHCI to run before Timeout.

diff --git a/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c b/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
index 657020f0da..c25342dc1f 100644
--- a/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
+++ b/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
@@ -2,7 +2,7 @@
 

   XHCI transfer scheduling routines.

 

-Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>

 This program and the accompanying materials

 are licensed and made available under the terms and conditions of the BSD License

 which accompanies this distribution.  The full text of the license may be found at

@@ -295,7 +295,7 @@ XhcCreateTransferTrb (
       TrbStart->TrbCtrSetup.wValue        = Urb->Request->Value;

       TrbStart->TrbCtrSetup.wIndex        = Urb->Request->Index;

       TrbStart->TrbCtrSetup.wLength       = Urb->Request->Length;

-      TrbStart->TrbCtrSetup.Lenth         = 8;

+      TrbStart->TrbCtrSetup.Length        = 8;

       TrbStart->TrbCtrSetup.IntTarget     = 0;

       TrbStart->TrbCtrSetup.IOC           = 1;

       TrbStart->TrbCtrSetup.IDT           = 1;

@@ -321,7 +321,7 @@ XhcCreateTransferTrb (
         TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;

         TrbStart->TrbCtrData.TRBPtrLo  = XHC_LOW_32BIT(Urb->DataPhy);

         TrbStart->TrbCtrData.TRBPtrHi  = XHC_HIGH_32BIT(Urb->DataPhy);

-        TrbStart->TrbCtrData.Lenth     = (UINT32) Urb->DataLen;

+        TrbStart->TrbCtrData.Length    = (UINT32) Urb->DataLen;

         TrbStart->TrbCtrData.TDSize    = 0;

         TrbStart->TrbCtrData.IntTarget = 0;

         TrbStart->TrbCtrData.ISP       = 1;

@@ -387,7 +387,7 @@ XhcCreateTransferTrb (
         TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;

         TrbStart->TrbNormal.TRBPtrLo  = XHC_LOW_32BIT((UINT8 *) Urb->DataPhy + TotalLen);

         TrbStart->TrbNormal.TRBPtrHi  = XHC_HIGH_32BIT((UINT8 *) Urb->DataPhy + TotalLen);

-        TrbStart->TrbNormal.Lenth     = (UINT32) Len;

+        TrbStart->TrbNormal.Length    = (UINT32) Len;

         TrbStart->TrbNormal.TDSize    = 0;

         TrbStart->TrbNormal.IntTarget = 0;

         TrbStart->TrbNormal.ISP       = 1;

@@ -422,7 +422,7 @@ XhcCreateTransferTrb (
         TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;

         TrbStart->TrbNormal.TRBPtrLo  = XHC_LOW_32BIT((UINT8 *) Urb->DataPhy + TotalLen);

         TrbStart->TrbNormal.TRBPtrHi  = XHC_HIGH_32BIT((UINT8 *) Urb->DataPhy + TotalLen);

-        TrbStart->TrbNormal.Lenth     = (UINT32) Len;

+        TrbStart->TrbNormal.Length    = (UINT32) Len;

         TrbStart->TrbNormal.TDSize    = 0;

         TrbStart->TrbNormal.IntTarget = 0;

         TrbStart->TrbNormal.ISP       = 1;

@@ -645,12 +645,8 @@ XhcRecoverHaltedEndpoint (
   )

 {

   EFI_STATUS                  Status;

-  EVT_TRB_COMMAND_COMPLETION  *EvtTrb;

-  CMD_TRB_RESET_ENDPOINT      CmdTrbResetED;

-  CMD_SET_TR_DEQ_POINTER      CmdSetTRDeq;

   UINT8                       Dci;

   UINT8                       SlotId;

-  EFI_PHYSICAL_ADDRESS        PhyAddr;

 

   Status = EFI_SUCCESS;

   SlotId = XhcBusDevAddrToSlotId (Xhc, Urb->Ep.BusAddr);

@@ -665,17 +661,7 @@ XhcRecoverHaltedEndpoint (
   //

   // 1) Send Reset endpoint command to transit from halt to stop state

   //

-  ZeroMem (&CmdTrbResetED, sizeof (CmdTrbResetED));

-  CmdTrbResetED.CycleBit = 1;

-  CmdTrbResetED.Type     = TRB_TYPE_RESET_ENDPOINT;

-  CmdTrbResetED.EDID     = Dci;

-  CmdTrbResetED.SlotId   = SlotId;

-  Status = XhcCmdTransfer (

-             Xhc,

-             (TRB_TEMPLATE *) (UINTN) &CmdTrbResetED,

-             XHC_GENERIC_TIMEOUT,

-             (TRB_TEMPLATE **) (UINTN) &EvtTrb

-             );

+  Status = XhcResetEndpoint(Xhc, SlotId, Dci);

   if (EFI_ERROR(Status)) {

     DEBUG ((EFI_D_ERROR, "XhcRecoverHaltedEndpoint: Reset Endpoint Failed, Status = %r\n", Status));

     goto Done;

@@ -684,22 +670,70 @@ XhcRecoverHaltedEndpoint (
   //

   // 2)Set dequeue pointer

   //

-  ZeroMem (&CmdSetTRDeq, sizeof (CmdSetTRDeq));

-  PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Urb->Ring->RingEnqueue, sizeof (CMD_SET_TR_DEQ_POINTER));

-  CmdSetTRDeq.PtrLo    = XHC_LOW_32BIT (PhyAddr) | Urb->Ring->RingPCS;

-  CmdSetTRDeq.PtrHi    = XHC_HIGH_32BIT (PhyAddr);

-  CmdSetTRDeq.CycleBit = 1;

-  CmdSetTRDeq.Type     = TRB_TYPE_SET_TR_DEQUE;

-  CmdSetTRDeq.Endpoint = Dci;

-  CmdSetTRDeq.SlotId   = SlotId;

-  Status = XhcCmdTransfer (

-             Xhc,

-             (TRB_TEMPLATE *) (UINTN) &CmdSetTRDeq,

-             XHC_GENERIC_TIMEOUT,

-             (TRB_TEMPLATE **) (UINTN) &EvtTrb

-             );

+  Status = XhcSetTrDequeuePointer(Xhc, SlotId, Dci, Urb);

   if (EFI_ERROR(Status)) {

-    DEBUG ((EFI_D_ERROR, "XhcRecoverHaltedEndpoint: Set Dequeue Pointer Failed, Status = %r\n", Status));

+    DEBUG ((EFI_D_ERROR, "XhcRecoverHaltedEndpoint: Set Transfer Ring Dequeue Pointer Failed, Status = %r\n", Status));

+    goto Done;

+  }

+

+  //

+  // 3)Ring the doorbell to transit from stop to active

+  //

+  XhcRingDoorBell (Xhc, SlotId, Dci);

+

+Done:

+  return Status;

+}

+

+/**

+  System software shall use a Stop Endpoint Command (section 4.6.9) and the Set TR Dequeue Pointer

+  Command (section 4.6.10) to remove the timed-out TDs from the xHC transfer ring. The next write to

+  the Doorbell of the Endpoint will transition the Endpoint Context from the Stopped to the Running

+  state.

+

+  @param  Xhc                   The XHCI Instance.

+  @param  Urb                   The urb which doesn't get completed in a specified timeout range.

+

+  @retval EFI_SUCCESS           The dequeuing of the TDs is successful.

+  @retval Others                Failed to stop the endpoint and dequeue the TDs.

+

+**/

+EFI_STATUS

+EFIAPI

+XhcDequeueTrbFromEndpoint (

+  IN  USB_XHCI_INSTANCE   *Xhc,

+  IN  URB                 *Urb

+  )

+{

+  EFI_STATUS                  Status;

+  UINT8                       Dci;

+  UINT8                       SlotId;

+

+  Status = EFI_SUCCESS;

+  SlotId = XhcBusDevAddrToSlotId (Xhc, Urb->Ep.BusAddr);

+  if (SlotId == 0) {

+    return EFI_DEVICE_ERROR;

+  }

+  Dci = XhcEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));

+  ASSERT (Dci < 32);

+  

+  DEBUG ((EFI_D_INFO, "Stop Slot = %x,Dci = %x\n", SlotId, Dci));

+

+  //

+  // 1) Send Stop endpoint command to stop xHC from executing of the TDs on the endpoint

+  //

+  Status = XhcStopEndpoint(Xhc, SlotId, Dci);

+  if (EFI_ERROR(Status)) {

+    DEBUG ((EFI_D_ERROR, "XhcDequeueTrbFromEndpoint: Stop Endpoint Failed, Status = %r\n", Status));

+    goto Done;

+  }

+

+  //

+  // 2)Set dequeue pointer

+  //

+  Status = XhcSetTrDequeuePointer(Xhc, SlotId, Dci, Urb);

+  if (EFI_ERROR(Status)) {

+    DEBUG ((EFI_D_ERROR, "XhcDequeueTrbFromEndpoint: Set Transfer Ring Dequeue Pointer Failed, Status = %r\n", Status));

     goto Done;

   }

 

@@ -1027,7 +1061,7 @@ IsTransferRingTrb (
   @return Whether the result of URB transfer is finialized.

 

 **/

-EFI_STATUS

+BOOLEAN

 XhcCheckUrbResult (

   IN  USB_XHCI_INSTANCE   *Xhc,

   IN  URB                 *Urb

@@ -1058,7 +1092,6 @@ XhcCheckUrbResult (
 

   if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {

     Urb->Result |= EFI_USB_ERR_SYSTEM;

-    Status       = EFI_DEVICE_ERROR;

     goto EXIT;

   }

 

@@ -1137,7 +1170,7 @@ XhcCheckUrbResult (
         if ((TRBType == TRB_TYPE_DATA_STAGE) ||

             (TRBType == TRB_TYPE_NORMAL) ||

             (TRBType == TRB_TYPE_ISOCH)) {

-          CheckedUrb->Completed += (CheckedUrb->DataLen - EvtTrb->Lenth);

+          CheckedUrb->Completed += (((TRANSFER_TRB_NORMAL*)TRBPtr)->Length - EvtTrb->Length);

         }

 

         break;

@@ -1189,7 +1222,7 @@ EXIT:
     XhcWriteRuntimeReg (Xhc, XHC_ERDP_OFFSET + 4, XHC_HIGH_32BIT (PhyAddr));

   }

 

-  return Status;

+  return Urb->Finished;

 }

 

 

@@ -1216,9 +1249,10 @@ XhcExecTransfer (
 {

   EFI_STATUS              Status;

   UINTN                   Index;

-  UINTN                   Loop;

+  UINT64                  Loop;

   UINT8                   SlotId;

   UINT8                   Dci;

+  BOOLEAN                 Finished;

 

   if (CmdTransfer) {

     SlotId = 0;

@@ -1241,8 +1275,8 @@ XhcExecTransfer (
   XhcRingDoorBell (Xhc, SlotId, Dci);

 

   for (Index = 0; Index < Loop; Index++) {

-    Status = XhcCheckUrbResult (Xhc, Urb);

-    if (Urb->Finished) {

+    Finished = XhcCheckUrbResult (Xhc, Urb);

+    if (Finished) {

       break;

     }

     gBS->Stall (XHC_1_MICROSECOND);

@@ -1250,6 +1284,9 @@ XhcExecTransfer (
 

   if (Index == Loop) {

     Urb->Result = EFI_USB_ERR_TIMEOUT;

+    Status      = EFI_TIMEOUT;

+  } else if (Urb->Result != EFI_USB_NOERROR) {

+    Status      = EFI_DEVICE_ERROR;

   }

 

   return Status;

@@ -3059,6 +3096,105 @@ XhcStopEndpoint (
 }

 

 /**

+  Reset endpoint through XHCI's Reset_Endpoint cmd.

+

+  @param  Xhc                   The XHCI Instance.

+  @param  SlotId                The slot id to be configured.

+  @param  Dci                   The device context index of endpoint.

+

+  @retval EFI_SUCCESS           Reset endpoint successfully.

+  @retval Others                Failed to reset endpoint.

+

+**/

+EFI_STATUS

+EFIAPI

+XhcResetEndpoint (

+  IN USB_XHCI_INSTANCE      *Xhc,

+  IN UINT8                  SlotId,

+  IN UINT8                  Dci

+  )

+{

+  EFI_STATUS                  Status;

+  EVT_TRB_COMMAND_COMPLETION  *EvtTrb;

+  CMD_TRB_RESET_ENDPOINT      CmdTrbResetED;

+

+  DEBUG ((EFI_D_INFO, "XhcResetEndpoint: Slot = 0x%x, Dci = 0x%x\n", SlotId, Dci));

+

+  //

+  // Send stop endpoint command to transit Endpoint from running to stop state

+  //

+  ZeroMem (&CmdTrbResetED, sizeof (CmdTrbResetED));

+  CmdTrbResetED.CycleBit = 1;

+  CmdTrbResetED.Type     = TRB_TYPE_RESET_ENDPOINT;

+  CmdTrbResetED.EDID     = Dci;

+  CmdTrbResetED.SlotId   = SlotId;

+  Status = XhcCmdTransfer (

+             Xhc,

+             (TRB_TEMPLATE *) (UINTN) &CmdTrbResetED,

+             XHC_GENERIC_TIMEOUT,

+             (TRB_TEMPLATE **) (UINTN) &EvtTrb

+             );

+  if (EFI_ERROR(Status)) {

+    DEBUG ((EFI_D_ERROR, "XhcResetEndpoint: Reset Endpoint Failed, Status = %r\n", Status));

+  }

+

+  return Status;

+}

+

+/**

+  Set transfer ring dequeue pointer through XHCI's Set_Tr_Dequeue_Pointer cmd.

+

+  @param  Xhc                   The XHCI Instance.

+  @param  SlotId                The slot id to be configured.

+  @param  Dci                   The device context index of endpoint.

+  @param  Urb                   The dequeue pointer of the transfer ring specified

+                                by the urb to be updated.

+

+  @retval EFI_SUCCESS           Set transfer ring dequeue pointer succeeds.

+  @retval Others                Failed to set transfer ring dequeue pointer.

+

+**/

+EFI_STATUS

+EFIAPI

+XhcSetTrDequeuePointer (

+  IN USB_XHCI_INSTANCE      *Xhc,

+  IN UINT8                  SlotId,

+  IN UINT8                  Dci,

+  IN URB                    *Urb

+  )

+{

+  EFI_STATUS                  Status;

+  EVT_TRB_COMMAND_COMPLETION  *EvtTrb;

+  CMD_SET_TR_DEQ_POINTER      CmdSetTRDeq;

+  EFI_PHYSICAL_ADDRESS        PhyAddr;

+

+  DEBUG ((EFI_D_INFO, "XhcSetTrDequeuePointer: Slot = 0x%x, Dci = 0x%x, Urb = 0x%x\n", SlotId, Dci, Urb));

+

+  //

+  // Send stop endpoint command to transit Endpoint from running to stop state

+  //

+  ZeroMem (&CmdSetTRDeq, sizeof (CmdSetTRDeq));

+  PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Urb->Ring->RingEnqueue, sizeof (CMD_SET_TR_DEQ_POINTER));

+  CmdSetTRDeq.PtrLo    = XHC_LOW_32BIT (PhyAddr) | Urb->Ring->RingPCS;

+  CmdSetTRDeq.PtrHi    = XHC_HIGH_32BIT (PhyAddr);

+  CmdSetTRDeq.CycleBit = 1;

+  CmdSetTRDeq.Type     = TRB_TYPE_SET_TR_DEQUE;

+  CmdSetTRDeq.Endpoint = Dci;

+  CmdSetTRDeq.SlotId   = SlotId;

+  Status = XhcCmdTransfer (

+             Xhc,

+             (TRB_TEMPLATE *) (UINTN) &CmdSetTRDeq,

+             XHC_GENERIC_TIMEOUT,

+             (TRB_TEMPLATE **) (UINTN) &EvtTrb

+             );

+  if (EFI_ERROR(Status)) {

+    DEBUG ((EFI_D_ERROR, "XhcSetTrDequeuePointer: Set TR Dequeue Pointer Failed, Status = %r\n", Status));

+  }

+

+  return Status;

+}

+

+/**

   Set interface through XHCI's Configure_Endpoint cmd.

 

   @param  Xhc           The XHCI Instance.

diff --git a/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h b/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
index 023c1089f2..931c7efa0c 100644
--- a/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
+++ b/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
@@ -2,7 +2,7 @@
 

   This file contains the definition for XHCI host controller schedule routines.

 

-Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>

 This program and the accompanying materials

 are licensed and made available under the terms and conditions of the BSD License

 which accompanies this distribution.  The full text of the license may be found at

@@ -224,7 +224,7 @@ typedef struct _TRANSFER_TRB_NORMAL {
 

   UINT32                  TRBPtrHi;

 

-  UINT32                  Lenth:17;

+  UINT32                  Length:17;

   UINT32                  TDSize:5;

   UINT32                  IntTarget:10;

 

@@ -253,7 +253,7 @@ typedef struct _TRANSFER_TRB_CONTROL_SETUP {
   UINT32                  wIndex:16;

   UINT32                  wLength:16;

 

-  UINT32                  Lenth:17;

+  UINT32                  Length:17;

   UINT32                  RsvdZ1:5;

   UINT32                  IntTarget:10;

 

@@ -276,7 +276,7 @@ typedef struct _TRANSFER_TRB_CONTROL_DATA {
 

   UINT32                  TRBPtrHi;

 

-  UINT32                  Lenth:17;

+  UINT32                  Length:17;

   UINT32                  TDSize:5;

   UINT32                  IntTarget:10;

 

@@ -325,7 +325,7 @@ typedef struct _EVT_TRB_TRANSFER {
 

   UINT32                  TRBPtrHi;

 

-  UINT32                  Lenth:24;

+  UINT32                  Length:24;

   UINT32                  Completecode:8;

 

   UINT32                  CycleBit:1;

@@ -1318,6 +1318,86 @@ XhcRecoverHaltedEndpoint (
   );

 

 /**

+  System software shall use a Stop Endpoint Command (section 4.6.9) and the Set TR Dequeue Pointer

+  Command (section 4.6.10) to remove the timed-out TDs from the xHC transfer ring. The next write to

+  the Doorbell of the Endpoint will transition the Endpoint Context from the Stopped to the Running

+  state.

+

+  @param  Xhc                   The XHCI Instance.

+  @param  Urb                   The urb which doesn't get completed in a specified timeout range.

+

+  @retval EFI_SUCCESS           The dequeuing of the TDs is successful.

+  @retval Others                Failed to stop the endpoint and dequeue the TDs.

+

+**/

+EFI_STATUS

+EFIAPI

+XhcDequeueTrbFromEndpoint (

+  IN  USB_XHCI_INSTANCE   *Xhc,

+  IN  URB                 *Urb

+  );

+

+/**

+  Stop endpoint through XHCI's Stop_Endpoint cmd.

+

+  @param  Xhc                   The XHCI Instance.

+  @param  SlotId                The slot id to be configured.

+  @param  Dci                   The device context index of endpoint.

+

+  @retval EFI_SUCCESS           Stop endpoint successfully.

+  @retval Others                Failed to stop endpoint.

+

+**/

+EFI_STATUS

+EFIAPI

+XhcStopEndpoint (

+  IN USB_XHCI_INSTANCE      *Xhc,

+  IN UINT8                  SlotId,

+  IN UINT8                  Dci

+  );

+

+/**

+  Reset endpoint through XHCI's Reset_Endpoint cmd.

+

+  @param  Xhc                   The XHCI Instance.

+  @param  SlotId                The slot id to be configured.

+  @param  Dci                   The device context index of endpoint.

+

+  @retval EFI_SUCCESS           Reset endpoint successfully.

+  @retval Others                Failed to reset endpoint.

+

+**/

+EFI_STATUS

+EFIAPI

+XhcResetEndpoint (

+  IN USB_XHCI_INSTANCE      *Xhc,

+  IN UINT8                  SlotId,

+  IN UINT8                  Dci

+  );

+

+/**

+  Set transfer ring dequeue pointer through XHCI's Set_Tr_Dequeue_Pointer cmd.

+

+  @param  Xhc                   The XHCI Instance.

+  @param  SlotId                The slot id to be configured.

+  @param  Dci                   The device context index of endpoint.

+  @param  Urb                   The dequeue pointer of the transfer ring specified

+                                by the urb to be updated.

+

+  @retval EFI_SUCCESS           Set transfer ring dequeue pointer succeeds.

+  @retval Others                Failed to set transfer ring dequeue pointer.

+

+**/

+EFI_STATUS

+EFIAPI

+XhcSetTrDequeuePointer (

+  IN USB_XHCI_INSTANCE      *Xhc,

+  IN UINT8                  SlotId,

+  IN UINT8                  Dci,

+  IN URB                    *Urb

+  );

+

+/**

   Create a new URB for a new transaction.

 

   @param  Xhc       The XHCI Instance