roll back the changes as NT32 could not use PciLib

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@5517 6f19259b-4bc3-4df7-8a09-765794883524

2 files changed, 75 insertions, 8 deletions

diff --git a/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/FtwLite.inf b/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/FtwLite.inf
index 399febb39a..3ec4321071 100644
--- a/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/FtwLite.inf
+++ b/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/FtwLite.inf
@@ -2,7 +2,7 @@
 # Component description file for FtwLite module.

 #

 # This driver provides fault tolerant write capability for block devices.

-# Copyright (c) 2006 - 2008, Intel Corporation

+# Copyright (c) 2006 - 2007, Intel Corporation

 #

 #  All rights reserved. This program and the accompanying materials

 #  are licensed and made available under the terms and conditions of the BSD License

@@ -49,10 +49,13 @@
 [Sources.EBC]

   Ia32/Ia32FtwMisc.c

 

+

 [Packages]

   MdePkg/MdePkg.dec

   MdeModulePkg/MdeModulePkg.dec

 

+

+

 [LibraryClasses]

   UefiBootServicesTableLib

   MemoryAllocationLib

@@ -69,6 +72,13 @@
   gEfiFirmwareVolumeBlockProtocolGuid           # PROTOCOL ALWAYS_CONSUMED

   gEfiFaultTolerantWriteLiteProtocolGuid        # PROTOCOL ALWAYS_PRODUCED

 

+[Protocols.IA32]

+  gEfiPciRootBridgeIoProtocolGuid               # PROTOCOL ALWAYS_CONSUMED

+

+[Protocols.EBC]

+  gEfiPciRootBridgeIoProtocolGuid               # PROTOCOL ALWAYS_CONSUMED

+

+

 [Pcd.common]

   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize

   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase

diff --git a/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/Ia32/Ia32FtwMisc.c b/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/Ia32/Ia32FtwMisc.c
index 3893a6c857..2c359b231c 100644
--- a/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/Ia32/Ia32FtwMisc.c
+++ b/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/Ia32/Ia32FtwMisc.c
@@ -35,7 +35,51 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 

 /**

 

-  Get swap state.

+  Read PCI register value.

+  This is a internal function.

+

+

+  @param Offset          Offset of the register

+

+  @return The pci register value.

+

+**/

+UINT32

+ReadPciRegister (

+  IN UINT32                 Offset

+  )

+{

+  EFI_STATUS                      Status;

+  UINT32                          Value;

+  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;

+

+  Value   = 0;

+  Status  = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, (VOID **) &PciRootBridgeIo);

+  if (EFI_ERROR (Status)) {

+    DEBUG ((EFI_D_ERROR, "FtwLite: Locate PCI root bridge io protocol - %r", Status));

+    return 0;

+  }

+

+  Status = PciRootBridgeIo->Pci.Read (

+                                  PciRootBridgeIo,

+                                  EfiPciWidthUint32,

+                                  EFI_PCI_ADDRESS (

+                                    LPC_BUS_NUMBER,

+                                    LPC_DEVICE_NUMBER,

+                                    LPC_IF,

+                                    Offset

+                                    ),

+                                  1,

+                                  &Value

+                                  );

+  ASSERT_EFI_ERROR (Status);

+

+  return Value;

+}

+

+/**

+

+  Get swap state

 

   This is a internal function.

 

@@ -51,13 +95,10 @@ GetSwapState (
   OUT BOOLEAN               *SwapState

   )

 {

-  UINT32 Value;

-  Value = PciRead32(EFI_PCI_ADDRESS (LPC_BUS_NUMBER, LPC_DEVICE_NUMBER, LPC_IF, GEN_STATUS))

-

   //

   // Top swap status is 13 bit

   //

-  *SwapState = (BOOLEAN) ((Value & TOP_SWAP_BIT) != 0);

+  *SwapState = (BOOLEAN) ((ReadPciRegister (GEN_STATUS) & TOP_SWAP_BIT) != 0);

 

   return EFI_SUCCESS;

 }

@@ -90,7 +131,7 @@ SetSwapState (
   //

   // Top-Swap bit (bit 13, D31: F0, Offset D4h)

   //

-  GenStatus = PciRead32(EFI_PCI_ADDRESS (LPC_BUS_NUMBER, LPC_DEVICE_NUMBER, LPC_IF, GEN_STATUS));

+  GenStatus = ReadPciRegister (GEN_STATUS);

 

   //

   // Set 13 bit, according to input NewSwapState

@@ -101,10 +142,26 @@ SetSwapState (
     GenStatus &= ~TOP_SWAP_BIT;

   }

 

+  Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, (VOID **) &PciRootBridgeIo);

+  if (EFI_ERROR (Status)) {

+    DEBUG ((EFI_D_ERROR, "FtwLite: Locate PCI root bridge io protocol - %r", Status));

+    return Status;

+  }

   //

   // Write back the GenStatus register

   //

-  PciWrite32(EFI_PCI_ADDRESS (LPC_BUS_NUMBER, LPC_DEVICE_NUMBER, LPC_IF, GEN_STATUS), GenStatus);

+  Status = PciRootBridgeIo->Pci.Write (

+                                  PciRootBridgeIo,

+                                  EfiPciWidthUint32,

+                                  EFI_PCI_ADDRESS (

+                                    LPC_BUS_NUMBER,

+                                    LPC_DEVICE_NUMBER,

+                                    LPC_IF,

+                                    GEN_STATUS

+                                    ),

+                                  1,

+                                  &GenStatus

+                                  );

 

   DEBUG_CODE_BEGIN ();

     if (TopSwap) {