Introduce one PCD PcdCpuInitIpiDelayInMicroSeconds to specify the delay value after sending out INIT IPI instead of hard code 10 MicroSeconds.

Its default value is 10 millisecond per IA32 manual.
Platform could customize this PCD value for performance requirement.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Kinney, Michael <michael.d.kinney@intel.com>
 

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15650 6f19259b-4bc3-4df7-8a09-765794883524

5 files changed, 15 insertions, 8 deletions

diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
index bd97fae9c2..6bf9c43dc9 100644
--- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
@@ -3,7 +3,7 @@
 

   This local APIC library instance supports xAPIC mode only.

 

-  Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -438,7 +438,7 @@ SendInitSipiSipi (
   ASSERT ((StartupRoutine & 0xfff) == 0);

 

   SendInitIpi (ApicId);

-  MicroSecondDelay (10);

+  MicroSecondDelay (PcdGet32(PcdCpuInitIpiDelayInMicroSeconds));

   IcrLow.Uint32 = 0;

   IcrLow.Bits.Vector = (StartupRoutine >> 12);

   IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;

@@ -471,7 +471,7 @@ SendInitSipiSipiAllExcludingSelf (
   ASSERT ((StartupRoutine & 0xfff) == 0);

 

   SendInitIpiAllExcludingSelf ();

-  MicroSecondDelay (10);

+  MicroSecondDelay (PcdGet32(PcdCpuInitIpiDelayInMicroSeconds));

   IcrLow.Uint32 = 0;

   IcrLow.Bits.Vector = (StartupRoutine >> 12);

   IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;

diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf
index 5f0f0be1bb..4257b157e7 100644
--- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf
+++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf
@@ -3,7 +3,7 @@
 #

 #  This library instance supports xAPIC mode only.

 #

-#  Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>

+#  Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>

 #  This program and the accompanying materials

 #  are licensed and made available under the terms and conditions of the BSD License

 #  which accompanies this distribution.  The full text of the license may be found at

@@ -41,3 +41,5 @@
   TimerLib

   IoLib

 

+[Pcd]

+  gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds

diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
index 23dc7910ae..ec54d01eb6 100644
--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
@@ -4,7 +4,7 @@
   This local APIC library instance supports x2APIC capable processors

   which have xAPIC and x2APIC modes.

 

-  Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -517,7 +517,7 @@ SendInitSipiSipi (
   ASSERT ((StartupRoutine & 0xfff) == 0);

 

   SendInitIpi (ApicId);

-  MicroSecondDelay (10);

+  MicroSecondDelay (PcdGet32(PcdCpuInitIpiDelayInMicroSeconds));

   IcrLow.Uint32 = 0;

   IcrLow.Bits.Vector = (StartupRoutine >> 12);

   IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;

@@ -550,7 +550,7 @@ SendInitSipiSipiAllExcludingSelf (
   ASSERT ((StartupRoutine & 0xfff) == 0);

 

   SendInitIpiAllExcludingSelf ();

-  MicroSecondDelay (10);

+  MicroSecondDelay (PcdGet32(PcdCpuInitIpiDelayInMicroSeconds));

   IcrLow.Uint32 = 0;

   IcrLow.Bits.Vector = (StartupRoutine >> 12);

   IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;

diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
index baece39a43..bc6182d80d 100644
--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
+++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
@@ -4,7 +4,7 @@
 #  This library instance supports x2APIC capable processors

 #  which have xAPIC and x2APIC modes.

 #

-#  Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>

+#  Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>

 #  This program and the accompanying materials

 #  are licensed and made available under the terms and conditions of the BSD License

 #  which accompanies this distribution.  The full text of the license may be found at

@@ -42,3 +42,6 @@
   TimerLib

   IoLib

 

+[Pcd]

+  gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds

+

diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 1e115408a1..53f1726664 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -43,4 +43,6 @@
 

 [PcdsFixedAtBuild, PcdsPatchableInModule]

   gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001

+  ## Specifies delay value in microseconds after sending out an INIT IPI

+  gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10000|UINT32|0x30000002