Silicon/SynQuacer: add stage 2 override translation tables for PCIe

The Designware PCIe IP in the SynQuacer SoC needs a little help to
appear sane to the OS. Not only does it lack a true root port, and
therefore does not perform any filtering whatsoever of type 0 config
TLPs that are not intended for the link peer, it also has trouble
issuing 64-bit wide MMIO accesses, which are often used on MMIO BARs
with memory semantics (e.g., frame buffers).

So let's create a stage 2 mapping covering the entire physical address
space, and remap some ECAM regions and demote write combine attributes
to device/strongly ordered. This is not a water tight fix, but it does
work around the issues in the majority of cases.

(Note that the ECAM remapping can also be addressed in the SMMU mapping
of the PCIe IP exposed to the CPU, but this is currently under
development, and it does not hurt to have it in two places)

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

5 files changed, 146 insertions, 1 deletions

diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
index 190f8aa999..337d1524c6 100644
--- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
+++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
@@ -578,6 +578,7 @@
   MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf

   MdeModulePkg/Universal/EbcDxe/EbcDxe.inf

   MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf

+  Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf

 

   #

   # eMMC support

diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.fdf b/Platform/Socionext/DeveloperBox/DeveloperBox.fdf
index 130572009f..bd1238a39e 100644
--- a/Platform/Socionext/DeveloperBox/DeveloperBox.fdf
+++ b/Platform/Socionext/DeveloperBox/DeveloperBox.fdf
@@ -50,9 +50,12 @@ NumBlocks     = 0x28
 #

 ################################################################################

 

-0x00000000|0x00080000

+0x00000000|0x00078000

 FILE = Platform/Socionext/DeveloperBox/fip_all_arm_tf.bin

 

+0x00078000|0x00008000

+FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(ARCH)/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables/OUTPUT/Stage2Tables.bin

+

 0x00080000|0x00200000

 gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize

 FV = FVMAIN_COMPACT

diff --git a/Silicon/Socionext/SynQuacer/Stage2Tables/GNUmakefile b/Silicon/Socionext/SynQuacer/Stage2Tables/GNUmakefile
new file mode 100644
index 0000000000..45ba4b4d8d
--- /dev/null
+++ b/Silicon/Socionext/SynQuacer/Stage2Tables/GNUmakefile
@@ -0,0 +1,22 @@
+## @file
+#
+#  Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+.PHONY: all
+all: $(OUTPUT_DIR)/Stage2Tables.bin
+
+$(OUTPUT_DIR)/Stage2Tables.bin: $(OUTPUT_DIR)/Stage2Tables.elf
+	$(OBJCOPY) $(OBJCOPY_FLAGS) $(^) $(@)
+
+$(OUTPUT_DIR)/Stage2Tables.elf: $(MODULE_DIR)/Stage2Tables.S
+	$(ASM) $(ASM_FLAGS) -o $(@) $(^)
diff --git a/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S
new file mode 100644
index 0000000000..313ef3c56a
--- /dev/null
+++ b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S
@@ -0,0 +1,88 @@
+/** @file

+  Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>

+

+  This program and the accompanying materials are licensed and made available

+  under the terms and conditions of the BSD License which accompanies this

+  distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+**/

+

+/*

+ * This file contains the assembler code to instantiate a set of stage 2

+ * translation tables that make the ECAM space of the Synopsys DesignWare

+ * PCIe root complexes appear sane to the OS.

+ * - ECAM 'shadows' caused by non TLP filtering root ports are eliminated

+ * - MMIO region are mapped with device attributes that supersede write combine

+ *   attributes that the OS may attempt to use, and which is not supported by

+ *   the SoC.

+ */

+

+#define TT_S2_CONT_SHIFT          52

+#define TT_S2_AF                  (0x1 << 10)

+#define TT_S2_SH_NON_SHAREABLE    (0x0 << 8)

+#define TT_S2_AP_RW               (0x3 << 6)

+#define TT_S2_MEMATTR_DEVICE_nGRE (0x2 << 2)

+#define TT_S2_MEMATTR_MEMORY_WB   (0xf << 2)

+#define TT_S2_TABLE               (0x3 << 0)

+#define TT_S2_L3_PAGE             (0x1 << 1)

+#define TT_S2_VALID               (0x1 << 0)

+

+  .altmacro

+  .macro    for, start, count, do, arg2, arg3, arg4

+  .if       \count == 1

+  \do       \start, \arg2, \arg3, \arg4

+  .elseif   \count > 1

+  for       \start, %(\count / 2), \do, \arg2, \arg3, \arg4

+  for       %(\start + \count / 2), %((\count + 1) / 2), \do, \arg2, \arg3, \arg4

+  .endif

+  .endm

+

+  .macro    s2_dev_entry, base, shift=30, offset=0, cont=0

+  .quad     ((\base << \shift) + \offset) | TT_S2_AF | TT_S2_AP_RW | \

+            TT_S2_SH_NON_SHAREABLE | TT_S2_MEMATTR_DEVICE_nGRE | \

+            TT_S2_VALID | (\cont << TT_S2_CONT_SHIFT)

+  .endm

+

+  .macro    s2_mem_entry, base, shift=30, offset=0, cont=0

+  .quad     ((\base << \shift) + \offset) | TT_S2_AF | TT_S2_AP_RW | \

+            TT_S2_SH_NON_SHAREABLE | TT_S2_MEMATTR_MEMORY_WB | \

+            TT_S2_VALID | (\cont << TT_S2_CONT_SHIFT)

+  .endm

+

+  .macro    s2_l3_entry, base, offset=0, cont=0

+  .quad     ((\base << 12) + \offset) | TT_S2_AF | TT_S2_AP_RW | \

+            TT_S2_SH_NON_SHAREABLE | TT_S2_MEMATTR_MEMORY_WB | \

+            TT_S2_L3_PAGE | TT_S2_VALID | (\cont << TT_S2_CONT_SHIFT)

+  .endm

+

+  .section  ".rodata", "a", %progbits

+  /* level 1 */

+  s2_mem_entry  0      /* 0x0000_0000 - 0x3fff_ffff */

+  .quad   1f + TT_S2_TABLE /* 0x4000_0000 - 0x7fff_ffff */

+  for       2, 246, s2_mem_entry  /* 0x8000_0000 - 0x3d_ffff_ffff */

+  for     248,   8, s2_dev_entry  /* PCIe MMIO64 */

+  for     256, 768, s2_mem_entry  /* 0x40_0000_0000 - 0xff_ffff_ffff */

+

+  /* level 2 */

+1:for     0, 256, s2_mem_entry, 21, 0x40000000, 1

+

+  .quad   2f + TT_S2_TABLE /* 0x6000_0000 -> RC #0 bus 0 */

+  for     1, 15, s2_mem_entry, 21, 0x60000000

+  for     0, 48, s2_mem_entry, 21, 0x62000000, 1

+  for     0, 64, s2_dev_entry, 21, 0x68000000, 1 /* PCIe MMIO32 */

+

+  .quad   3f + TT_S2_TABLE /* 0x7000_0000 -> RC #1 bus 0 */

+  for     1, 15, s2_mem_entry, 21, 0x70000000

+  for     0, 48, s2_mem_entry, 21, 0x72000000, 1

+  for     0, 64, s2_dev_entry, 21, 0x78000000, 1 /* PCIe MMIO32 */

+

+  /* level 3 */

+2:for     0,   8, s2_l3_entry, 0x60000000

+  for     0,   8, s2_l3_entry, 0x60010000  /* hide device #1 */

+  for     0, 496, s2_l3_entry, 0x60010000, 1

+3:for     0,   8, s2_l3_entry, 0x70000000

+  for     0,   8, s2_l3_entry, 0x70010000  /* hide device #1 */

+  for     0, 496, s2_l3_entry, 0x70010000, 1

diff --git a/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf
new file mode 100644
index 0000000000..28442c6e3f
--- /dev/null
+++ b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf
@@ -0,0 +1,31 @@
+## @file

+#

+#  Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>

+#

+#  This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution.  The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+##

+

+[Defines]

+  INF_VERSION                    = 0x0001001A

+  BASE_NAME                      = Stage2Tables

+  FILE_GUID                      = e11cbca5-8f82-41a7-8441-02b48acc13a7

+  MODULE_TYPE                    = USER_DEFINED

+  VERSION_STRING                 = 1.0

+  CUSTOM_MAKEFILE                = GCC|GNUmakefile

+

+[Sources]

+  Stage2Tables.S

+

+[BuildOptions]

+  *_*_*_OBJCOPY_PATH == objcopy

+  *_*_*_OBJCOPY_FLAGS == -I elf64-little -O binary -j .rodata

+  *_*_*_ASM_FLAGS == -nostdlib -Wl,-e,0x81f8000,--section-start=.rodata=0x81f8000

+  *_CLANG35_*_ASM_FLAGS = -no-integrated-as

+  *_CLANG38_*_ASM_FLAGS = -no-integrated-as