diff options
| author | Joe Zhou <shjzhou@marvell.com> | 2017-02-21 14:34:37 -0800 |
|---|---|---|
| committer | Leif Lindholm <leif@developerbox> | 2017-10-29 16:47:23 +0000 |
| commit | c02ce90f0956780c34270f8126588b69f8a96cd3 (patch) | |
| tree | b35d22ceaa0d082482db18dd19ff425c6f0b6a28 | |
| parent | 80ae9e875df0e72f21ce351fb540ea8d5ca71124 (diff) | |
| download | edk2-platforms-c02ce90f0956780c34270f8126588b69f8a96cd3.tar.xz | |
Marvell/Library: MppLib: Prevent overwriting PCD values
After enabling dynamic PCDs, it is possible to reconfigure
MPP during platform initialization. It occurred that due to
a faulty way of passing temporary values, information obtained
from PCDs was overwritten. This patch fixes the issue, which
on the occasion simplifies PcdToMppRegs function.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Joe Zhou <shjzhou@marvell.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
| -rw-r--r-- | Platform/Marvell/Library/MppLib/MppLib.c | 21 |
1 files changed, 8 insertions, 13 deletions
diff --git a/Platform/Marvell/Library/MppLib/MppLib.c b/Platform/Marvell/Library/MppLib/MppLib.c index c09acf95fe..383c8204cc 100644 --- a/Platform/Marvell/Library/MppLib/MppLib.c +++ b/Platform/Marvell/Library/MppLib/MppLib.c @@ -74,7 +74,7 @@ STATIC VOID
SetRegisterValue (
UINT8 RegCount,
- UINT8 **MppRegPcd,
+ UINT8 MppRegPcd[][MPP_PINS_PER_REG],
UINTN BaseAddr,
BOOLEAN ReverseFlag
)
@@ -99,10 +99,10 @@ STATIC UINT8
PcdToMppRegs (
UINTN PinCount,
- UINT8 **MppRegPcd
+ UINT8 **MppRegPcd,
+ UINT8 MppRegPcdTmp[][MPP_PINS_PER_REG]
)
{
- UINT8 MppRegPcdTmp[MPP_MAX_REGS][MPP_PINS_PER_REG];
UINT8 PcdGroupCount, MppRegCount;
UINTN i, j, k, l;
@@ -125,14 +125,7 @@ PcdToMppRegs ( for (j = 0; j < PCD_PINS_PER_GROUP; j++) {
k = (PCD_PINS_PER_GROUP * i + j) / MPP_PINS_PER_REG;
l = (PCD_PINS_PER_GROUP * i + j) % MPP_PINS_PER_REG;
- MppRegPcdTmp[k][l] = MppRegPcd[i][j];
- }
- }
-
- /* Update input table */
- for (i = 0; i < MppRegCount; i++) {
- for (j = 0; j < MPP_PINS_PER_REG; j++) {
- MppRegPcd[i][j] = MppRegPcdTmp[i][j];
+ MppRegPcdTmp[k][l] = (UINT8)MppRegPcd[i][j];
}
}
@@ -191,6 +184,7 @@ MppInitialize ( BOOLEAN ReverseFlag[MAX_CHIPS];
UINT8 *MppRegPcd[MAX_CHIPS][MPP_MAX_REGS];
UINT32 i, ChipCount;
+ UINT8 TmpMppValue[MPP_MAX_REGS][MPP_PINS_PER_REG];
ChipCount = PcdGet32 (PcdMppChipCount);
@@ -203,8 +197,9 @@ MppInitialize ( for (i = 0; i < MAX_CHIPS; i++) {
if (i == ChipCount)
break;
- RegCount = PcdToMppRegs (PinCount[i], MppRegPcd[i]);
- SetRegisterValue (RegCount, MppRegPcd[i], BaseAddr[i], ReverseFlag[i]);
+
+ RegCount = PcdToMppRegs (PinCount[i], MppRegPcd[i], TmpMppValue);
+ SetRegisterValue (RegCount, TmpMppValue, BaseAddr[i], ReverseFlag[i]);
/*
* eMMC PHY IP has its own MPP configuration.
|