diff options
| author | Guo Mang <mang.guo@intel.com> | 2016-08-03 10:31:16 +0800 |
|---|---|---|
| committer | Guo Mang <mang.guo@intel.com> | 2016-08-04 10:31:24 +0800 |
| commit | 31dacecfd185d25f0577f57cea5b64fff4cfdda2 (patch) | |
| tree | ccde6f83c57513625342fe898d66c2a2e463c05d | |
| parent | baa0b78e96b18ca463ca660eeefc9806fed8a164 (diff) | |
| download | edk2-platforms-31dacecfd185d25f0577f57cea5b64fff4cfdda2.tar.xz | |
BraswellPlatformPkg: Restructure code in Common/Override directory
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
29 files changed, 8 insertions, 3097 deletions
diff --git a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsBoot.c b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsBoot.c index 8edd9718d3..bfb10ab9a7 100644 --- a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsBoot.c +++ b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsBoot.c @@ -4495,3 +4495,4 @@ BdsLibUpdateFvFileDevicePath ( }
return EFI_NOT_FOUND;
}
+
diff --git a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsConnect.c b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsConnect.c index 1970c84aee..ace1bae730 100644 --- a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsConnect.c +++ b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsConnect.c @@ -433,3 +433,4 @@ BdsLibConnectUsbDevByShortFormDP( return EFI_NOT_FOUND;
}
+
diff --git a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/DevicePath.c b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/DevicePath.c index 2f22e7df7f..f04504e0e0 100644 --- a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/DevicePath.c +++ b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/DevicePath.c @@ -31,3 +31,4 @@ DevicePathToStr ( {
return ConvertDevicePathToText (DevPath, TRUE, TRUE);
}
+
diff --git a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf index a4c1165e30..d195f679d3 100644 --- a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf +++ b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf @@ -20,6 +20,7 @@ [Defines]
INF_VERSION = 0x00010018
BASE_NAME = GenericBdsLib
+ MODULE_UNI_FILE = GenericBdsLib.uni
FILE_GUID = e405ec31-ccaa-4dd4-83e8-0aec01703f7e
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
diff --git a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.uni b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.uni Binary files differnew file mode 100644 index 0000000000..ea4ccbca05 --- /dev/null +++ b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.uni diff --git a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsStrings.uni b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsStrings.uni Binary files differindex 568774b59a..adee1fe89d 100644 --- a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsStrings.uni +++ b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsStrings.uni diff --git a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/InternalBdsLib.h b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/InternalBdsLib.h index 4f2817a284..c34459331d 100644 --- a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/InternalBdsLib.h +++ b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/InternalBdsLib.h @@ -192,3 +192,4 @@ SetVariableAndReportStatusCodeOnError ( );
#endif // _BDS_LIB_H_
+
diff --git a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/Performance.c b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/Performance.c index 9786fc7e24..db89236cac 100644 --- a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/Performance.c +++ b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/Performance.c @@ -356,3 +356,4 @@ Done: return ;
}
+
diff --git a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/String.c b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/String.c index 762871605d..b8b656fdfe 100644 --- a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/String.c +++ b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/String.c @@ -30,3 +30,4 @@ BdsLibGetStringById ( {
return HiiGetString (gBdsLibStringPackHandle, Id, NULL);
}
+
diff --git a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/String.h b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/String.h index 13b745de87..cec53d255f 100644 --- a/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/String.h +++ b/BraswellPlatformPkg/Common/Override/IntelFrameworkModulePkg/Library/GenericBdsLib/String.h @@ -46,3 +46,4 @@ BdsLibGetStringById ( );
#endif // _STRING_H_
+
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/FspPlatformSecLibSample.c b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/FspPlatformSecLibSample.c deleted file mode 100644 index 373cea2a23..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/FspPlatformSecLibSample.c +++ /dev/null @@ -1,149 +0,0 @@ -/** @file
- Sample to provide FSP wrapper platform sec related function.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-#include <Ppi/SecPlatformInformation.h>
-#include <Ppi/SecPerformance.h>
-#include <Ppi/TemporaryRamSupport.h>
-#include <Library/LocalApicLib.h>
-
-/**
- This interface conveys state information out of the Security (SEC) phase into PEI.
-
- @param[in] PeiServices Pointer to the PEI Services Table.
- @param[in,out] StructureSize Pointer to the variable describing size of the input buffer.
- @param[out] PlatformInformationRecord Pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
-
- @retval EFI_SUCCESS The data was successfully returned.
- @retval EFI_BUFFER_TOO_SMALL The buffer was too small.
-
-**/
-EFI_STATUS
-EFIAPI
-SecPlatformInformation (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN OUT UINT64 *StructureSize,
- OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
- );
-
-/**
- This interface conveys performance information out of the Security (SEC) phase into PEI.
-
- This service is published by the SEC phase. The SEC phase handoff has an optional
- EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the
- PEI Foundation. As such, if the platform supports collecting performance data in SEC,
- this information is encapsulated into the data structure abstracted by this service.
- This information is collected for the boot-strap processor (BSP) on IA-32.
-
- @param[in] PeiServices The pointer to the PEI Services Table.
- @param[in] This The pointer to this instance of the PEI_SEC_PERFORMANCE_PPI.
- @param[out] Performance The pointer to performance data collected in SEC phase.
-
- @retval EFI_SUCCESS The data was successfully returned.
-
-**/
-EFI_STATUS
-EFIAPI
-SecGetPerformance (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN PEI_SEC_PERFORMANCE_PPI *This,
- OUT FIRMWARE_SEC_PERFORMANCE *Performance
- );
-
-/**
- This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into
- permanent memory.
-
- @param[in] PeiServices Pointer to the PEI Services Table.
- @param[in] TemporaryMemoryBase Source Address in temporary memory from which the SEC or PEIM will copy the
- Temporary RAM contents.
- @param[in] PermanentMemoryBase Destination Address in permanent memory into which the SEC or PEIM will copy the
- Temporary RAM contents.
- @param[in] CopySize Amount of memory to migrate from temporary to permanent memory.
-
- @retval EFI_SUCCESS The data was successfully returned.
- @retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when
- TemporaryMemoryBase > PermanentMemoryBase.
-
-**/
-EFI_STATUS
-EFIAPI
-SecTemporaryRamSupport (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
- IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
- IN UINTN CopySize
- );
-
-EFI_SEC_PLATFORM_INFORMATION_PPI mSecPlatformInformationPpi = {
- SecPlatformInformation
-};
-
-PEI_SEC_PERFORMANCE_PPI mSecPerformancePpi = {
- SecGetPerformance
-};
-
-EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI gSecTemporaryRamSupportPpi = {
- SecTemporaryRamSupport
-};
-
-EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformPpi[] = {
- {
- EFI_PEI_PPI_DESCRIPTOR_PPI,
- &gEfiSecPlatformInformationPpiGuid,
- &mSecPlatformInformationPpi
- },
- {
- EFI_PEI_PPI_DESCRIPTOR_PPI,
- &gPeiSecPerformancePpiGuid,
- &mSecPerformancePpi
- },
- {
- EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
- &gEfiTemporaryRamSupportPpiGuid,
- &gSecTemporaryRamSupportPpi
- },
-};
-
-/**
- A developer supplied function to perform platform specific operations.
-
- It's a developer supplied function to perform any operations appropriate to a
- given platform. It's invoked just before passing control to PEI core by SEC
- core. Platform developer may modify the SecCoreData passed to PEI Core.
- It returns a platform specific PPI list that platform wishes to pass to PEI core.
- The Generic SEC core module will merge this list to join the final list passed to
- PEI core.
-
- @param[in,out] SecCoreData The same parameter as passing to PEI core. It
- could be overridden by this function.
-
- @return The platform specific PPI list to be passed to PEI core or
- NULL if there is no need of such platform specific PPI list.
-
-**/
-EFI_PEI_PPI_DESCRIPTOR *
-EFIAPI
-SecPlatformMain (
- IN OUT EFI_SEC_PEI_HAND_OFF *SecCoreData
- )
-{
- EFI_PEI_PPI_DESCRIPTOR *PpiList;
-
- InitializeApicTimer (0, (UINT32) -1, TRUE, 5);
- PpiList = &mPeiSecPlatformPpi[0];
-
- return PpiList;
-}
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/AsmSaveSecContext.S b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/AsmSaveSecContext.S deleted file mode 100644 index 2f1cf6b5d0..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/AsmSaveSecContext.S +++ /dev/null @@ -1,37 +0,0 @@ -## @file
-# Save Sec Conext before call FspInit API
-#
-# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED
-#
-##
-
-#----------------------------------------------------------------------------
-# MMX Usage:
-# MM0 = BIST State
-# MM5 = Save time-stamp counter value high32bit
-# MM6 = Save time-stamp counter value low32bit.
-#
-# It should be same as SecEntry.asm and PeiCoreEntry.asm.
-#----------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(AsmSaveBistValue)
-ASM_PFX(AsmSaveBistValue):
- movl 4(%esp), %eax
- movd %eax, %mm0
- ret
-
-ASM_GLOBAL ASM_PFX(AsmSaveTickerValue)
-ASM_PFX(AsmSaveTickerValue):
- movl 4(%esp), %eax
- movd %eax, %mm6
- movl 8(%esp), %eax
- movd %eax, %mm5
- ret
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/AsmSaveSecContext.asm b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/AsmSaveSecContext.asm deleted file mode 100644 index 2f767a8264..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/AsmSaveSecContext.asm +++ /dev/null @@ -1,44 +0,0 @@ -;; @file
-; Save Sec Conext before call FspInit API
-;
-; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-;
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;;
-
-.686p
-.xmm
-.model flat,c
-.code
-
-;----------------------------------------------------------------------------
-; MMX Usage:
-; MM0 = BIST State
-; MM5 = Save time-stamp counter value high32bit
-; MM6 = Save time-stamp counter value low32bit.
-;
-; It should be same as SecEntry.asm and PeiCoreEntry.asm.
-;----------------------------------------------------------------------------
-
-AsmSaveBistValue PROC PUBLIC
- mov eax, [esp+4]
- movd mm0, eax
- ret
-AsmSaveBistValue ENDP
-
-AsmSaveTickerValue PROC PUBLIC
- mov eax, [esp+4]
- movd mm6, eax
- mov eax, [esp+8]
- movd mm5, eax
- ret
-AsmSaveTickerValue ENDP
-
-END
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Fsp.h b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Fsp.h deleted file mode 100644 index 606c14548f..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Fsp.h +++ /dev/null @@ -1,49 +0,0 @@ -/** @file
- Fsp related definitions
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __FSP_H__
-#define __FSP_H__
-
-//
-// Fv Header
-//
-#define FVH_SIGINATURE_OFFSET 0x28
-#define FVH_SIGINATURE_VALID_VALUE 0x4856465F // valid signature:_FVH
-#define FVH_HEADER_LENGTH_OFFSET 0x30
-#define FVH_EXTHEADER_OFFSET_OFFSET 0x34
-#define FVH_EXTHEADER_SIZE_OFFSET 0x10
-
-//
-// Ffs Header
-//
-#define FSP_HEADER_GUID_DWORD1 0x912740BE
-#define FSP_HEADER_GUID_DWORD2 0x47342284
-#define FSP_HEADER_GUID_DWORD3 0xB08471B9
-#define FSP_HEADER_GUID_DWORD4 0x0C3F3527
-#define FFS_HEADER_SIZE_VALUE 0x18
-
-//
-// Section Header
-//
-#define SECTION_HEADER_TYPE_OFFSET 0x03
-#define RAW_SECTION_HEADER_SIZE_VALUE 0x04
-
-//
-// Fsp Header
-//
-#define FSP_HEADER_IMAGEBASE_OFFSET 0x1C
-#define FSP_HEADER_TEMPRAMINIT_OFFSET 0x30
-
-#endif
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/PeiCoreEntry.S b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/PeiCoreEntry.S deleted file mode 100644 index da851d18f0..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/PeiCoreEntry.S +++ /dev/null @@ -1,124 +0,0 @@ -## @file
-# Find and call SecStartup
-#
-# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED
-#
-##
-
-ASM_GLOBAL ASM_PFX(CallPeiCoreEntryPoint)
-ASM_PFX(CallPeiCoreEntryPoint):
- #
- # Obtain the hob list pointer
- #
- movl 0x4(%esp), %eax
- #
- # Obtain the stack information
- # ECX: start of range
- # EDX: end of range
- #
- movl 0x8(%esp), %ecx
- movl 0xC(%esp), %edx
-
- #
- # Platform init
- #
- pushal
- pushl %edx
- pushl %ecx
- pushl %eax
- call ASM_PFX(PlatformInit)
- popl %eax
- popl %eax
- popl %eax
- popal
-
- #
- # Set stack top pointer
- #
- movl %edx, %esp
-
- #
- # Push the hob list pointer
- #
- pushl %eax
-
- #
- # Save the value
- # ECX: start of range
- # EDX: end of range
- #
- movl %esp, %ebp
- pushl %ecx
- pushl %edx
-
- #
- # Push processor count to stack first, then BIST status (AP then BSP)
- #
- movl $1, %eax
- cpuid
- shr $16, %ebx
- andl $0x000000FF, %ebx
- cmp $1, %bl
- jae PushProcessorCount
-
- #
- # Some processors report 0 logical processors. Effectively 0 = 1.
- # So we fix up the processor count
- #
- inc %ebx
-
-PushProcessorCount:
- pushl %ebx
-
- #
- # We need to implement a long-term solution for BIST capture. For now, we just copy BSP BIST
- # for all processor threads
- #
- xorl %ecx, %ecx
- movb %bl, %cl
-PushBist:
- movd %mm0, %eax
- pushl %eax
- loop PushBist
-
- # Save Time-Stamp Counter
- movd %mm5, %eax
- pushl %eax
-
- movd %mm6, %eax
- pushl %eax
-
- #
- # Pass entry point of the PEI core
- #
- movl $0xFFFFFFE0, %edi
- pushl %ds:(%edi)
-
- #
- # Pass BFV into the PEI Core
- #
- movl $0xFFFFFFFC, %edi
- pushl %ds:(%edi)
-
- #
- # Pass stack size into the PEI Core
- #
- movl -4(%ebp), %ecx
- movl -8(%ebp), %edx
- pushl %ecx # RamBase
-
- subl %ecx, %edx
- pushl %edx # RamSize
-
- #
- # Pass Control into the PEI Core
- #
- call ASM_PFX(SecStartup)
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/PeiCoreEntry.asm b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/PeiCoreEntry.asm deleted file mode 100644 index 808a21b2fc..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/PeiCoreEntry.asm +++ /dev/null @@ -1,134 +0,0 @@ -;; @file
-; Find and call SecStartup
-;
-; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-;
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;;
-
-.686p
-.xmm
-.model flat, c
-.code
-
-EXTRN SecStartup:NEAR
-EXTRN PlatformInit:NEAR
-
-CallPeiCoreEntryPoint PROC PUBLIC
- ;
- ; Obtain the hob list pointer
- ;
- mov eax, [esp+4]
- ;
- ; Obtain the stack information
- ; ECX: start of range
- ; EDX: end of range
- ;
- mov ecx, [esp+8]
- mov edx, [esp+0Ch]
-
- ;
- ; Platform init
- ;
- pushad
- push edx
- push ecx
- push eax
- call PlatformInit
- pop eax
- pop eax
- pop eax
- popad
-
- ;
- ; Set stack top pointer
- ;
- mov esp, edx
-
- ;
- ; Push the hob list pointer
- ;
- push eax
-
- ;
- ; Save the value
- ; ECX: start of range
- ; EDX: end of range
- ;
- mov ebp, esp
- push ecx
- push edx
-
- ;
- ; Push processor count to stack first, then BIST status (AP then BSP)
- ;
- mov eax, 1
- cpuid
- shr ebx, 16
- and ebx, 0000000FFh
- cmp bl, 1
- jae PushProcessorCount
-
- ;
- ; Some processors report 0 logical processors. Effectively 0 = 1.
- ; So we fix up the processor count
- ;
- inc ebx
-
-PushProcessorCount:
- push ebx
-
- ;
- ; We need to implement a long-term solution for BIST capture. For now, we just copy BSP BIST
- ; for all processor threads
- ;
- xor ecx, ecx
- mov cl, bl
-PushBist:
- movd eax, mm0
- push eax
- loop PushBist
-
- ; Save Time-Stamp Counter
- movd eax, mm5
- push eax
-
- movd eax, mm6
- push eax
-
- ;
- ; Pass entry point of the PEI core
- ;
- mov edi, 0FFFFFFE0h
- push DWORD PTR ds:[edi]
-
- ;
- ; Pass BFV into the PEI Core
- ;
- mov edi, 0FFFFFFFCh
- push DWORD PTR ds:[edi]
-
- ;
- ; Pass stack size into the PEI Core
- ;
- mov ecx, [ebp - 4]
- mov edx, [ebp - 8]
- push ecx ; RamBase
-
- sub edx, ecx
- push edx ; RamSize
-
- ;
- ; Pass Control into the PEI Core
- ;
- call SecStartup
-CallPeiCoreEntryPoint ENDP
-
-END
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S deleted file mode 100644 index 52d897b1d3..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S +++ /dev/null @@ -1,322 +0,0 @@ -## @file
-# This is the code that goes from real-mode to protected mode.
-# It consumes the reset vector, calls TempRamInit API from FSP binary.
-#
-# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED
-#
-##
-
-#include "Fsp.h"
-
-ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspBase)
-ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspSize)
-
-ASM_GLOBAL ASM_PFX(_TEXT_REALMODE)
-ASM_PFX(_TEXT_REALMODE):
-#----------------------------------------------------------------------------
-#
-# Procedure: _ModuleEntryPoint
-#
-# Input: None
-#
-# Output: None
-#
-# Destroys: Assume all registers
-#
-# Description:
-#
-# Transition to non-paged flat-model protected mode from a
-# hard-coded GDT that provides exactly two descriptors.
-# This is a bare bones transition to protected mode only
-# used for a while in PEI and possibly DXE.
-#
-# After enabling protected mode, a far jump is executed to
-# transfer to PEI using the newly loaded GDT.
-#
-# Return: None
-#
-# MMX Usage:
-# MM0 = BIST State
-# MM5 = Save time-stamp counter value high32bit
-# MM6 = Save time-stamp counter value low32bit.
-#
-#----------------------------------------------------------------------------
-
-.align 4
-ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)
-ASM_PFX(_ModuleEntryPoint):
- fninit # clear any pending Floating point exceptions
- #
- # Store the BIST value in mm0
- #
- movd %eax, %mm0
-
- #
- # Save time-stamp counter value
- # rdtsc load 64bit time-stamp counter to EDX:EAX
- #
- rdtsc
- movd %edx, %mm5
- movd %ecx, %mm6
-
- #
- # Load the GDT table in GdtDesc
- #
- movl $GdtDesc, %esi
- .byte 0x66
- lgdt %cs:(%si)
-
- #
- # Transition to 16 bit protected mode
- #
- movl %cr0, %eax # Get control register 0
- orl $0x00000003, %eax # Set PE bit (bit #0) & MP bit (bit #1)
- movl %eax, %cr0 # Activate protected mode
-
- movl %cr4, %eax # Get control register 4
- orl $0x00000600, %eax # Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)
- movl %eax, %cr4
-
- #
- # Now we're in 16 bit protected mode
- # Set up the selectors for 32 bit protected mode entry
- #
- movw SYS_DATA_SEL, %ax
- movw %ax, %ds
- movw %ax, %es
- movw %ax, %fs
- movw %ax, %gs
- movw %ax, %ss
-
- #
- # Transition to Flat 32 bit protected mode
- # The jump to a far pointer causes the transition to 32 bit mode
- #
- movl ASM_PFX(ProtectedModeEntryLinearAddress), %esi
- jmp *%cs:(%si)
-
-ASM_GLOBAL ASM_PFX(_TEXT_PROTECTED_MODE)
-ASM_PFX(_TEXT_PROTECTED_MODE):
-
-#----------------------------------------------------------------------------
-#
-# Procedure: ProtectedModeEntryPoint
-#
-# Input: None
-#
-# Output: None
-#
-# Destroys: Assume all registers
-#
-# Description:
-#
-# This function handles:
-# Call two basic APIs from FSP binary
-# Initializes stack with some early data (BIST, PEI entry, etc)
-#
-# Return: None
-#
-#----------------------------------------------------------------------------
-
-.align 4
-ASM_GLOBAL ASM_PFX(ProtectedModeEntryPoint)
-ASM_PFX(ProtectedModeEntryPoint):
-
- # Find the fsp info header
- movl ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspBase), %edi
- movl ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspSize), %ecx
-
- movl FVH_SIGINATURE_OFFSET(%edi), %eax
- cmp $FVH_SIGINATURE_VALID_VALUE, %eax
- jnz FspHeaderNotFound
-
- xorl %eax, %eax
- movw FVH_EXTHEADER_OFFSET_OFFSET(%edi), %ax
- cmp %ax, 0
- jnz FspFvExtHeaderExist
-
- xorl %eax, %eax
- movw FVH_HEADER_LENGTH_OFFSET(%edi), %ax # Bypass Fv Header
- addl %eax, %edi
- jmp FspCheckFfsHeader
-
-FspFvExtHeaderExist:
- addl %eax, %edi
- movl FVH_EXTHEADER_SIZE_OFFSET(%edi), %eax # Bypass Ext Fv Header
- addl %eax, %edi
-
- # Round up to 8 byte alignment
- movl %edi, %eax
- andb $0x07, %al
- jz FspCheckFfsHeader
-
- and $0xFFFFFFF8, %edi
- add $0x08, %edi
-
-FspCheckFfsHeader:
- # Check the ffs guid
- movl (%edi), %eax
- cmp $FSP_HEADER_GUID_DWORD1, %eax
- jnz FspHeaderNotFound
-
- movl 0x4(%edi), %eax
- cmp $FSP_HEADER_GUID_DWORD2, %eax
- jnz FspHeaderNotFound
-
- movl 0x08(%edi), %eax
- cmp $FSP_HEADER_GUID_DWORD3, %eax
- jnz FspHeaderNotFound
-
- movl 0x0c(%edi), %eax
- cmp $FSP_HEADER_GUID_DWORD4, %eax
- jnz FspHeaderNotFound
-
- add $FFS_HEADER_SIZE_VALUE, %edi # Bypass the ffs header
-
- # Check the section type as raw section
- movb SECTION_HEADER_TYPE_OFFSET(%edi), %al
- cmp $0x19, %al
- jnz FspHeaderNotFound
-
- addl $RAW_SECTION_HEADER_SIZE_VALUE, %edi # Bypass the section header
- jmp FspHeaderFound
-
-FspHeaderNotFound:
- jmp .
-
-FspHeaderFound:
- # Get the fsp TempRamInit Api address
- movl FSP_HEADER_IMAGEBASE_OFFSET(%edi), %eax
- addl FSP_HEADER_TEMPRAMINIT_OFFSET(%edi), %eax
-
- # Setup the hardcode stack
- movl $TempRamInitStack, %esp
-
- # Call the fsp TempRamInit Api
- jmp *%eax
-
-TempRamInitDone:
- cmp $0x0, %eax
- jnz FspApiFailed
-
- # ECX: start of range
- # EDX: end of range
- movl %edx, %esp
- pushl %edx
- pushl %ecx
- pushl %eax # zero - no hob list yet
- call ASM_PFX(CallPeiCoreEntryPoint)
-
-FspApiFailed:
- jmp .
-
-.align 0x10
-TempRamInitStack:
- .long TempRamInitDone
- .long ASM_PFX(TempRamInitParams)
-
-#
-# ROM-based Global-Descriptor Table for the Tiano PEI Phase
-#
-.align 16
-
-#
-# GDT[0]: 0x00: Null entry, never used.
-#
-.equ NULL_SEL, . - GDT_BASE # Selector [0]
-GDT_BASE:
-BootGdtTable: .long 0
- .long 0
-#
-# Linear data segment descriptor
-#
-.equ LINEAR_SEL, . - GDT_BASE # Selector [0x8]
- .word 0xFFFF # limit 0xFFFFF
- .word 0 # base 0
- .byte 0
- .byte 0x92 # present, ring 0, data, expand-up, writable
- .byte 0xCF # page-granular, 32-bit
- .byte 0
-#
-# Linear code segment descriptor
-#
-.equ LINEAR_CODE_SEL, . - GDT_BASE # Selector [0x10]
- .word 0xFFFF # limit 0xFFFFF
- .word 0 # base 0
- .byte 0
- .byte 0x9B # present, ring 0, data, expand-up, not-writable
- .byte 0xCF # page-granular, 32-bit
- .byte 0
-#
-# System data segment descriptor
-#
-.equ SYS_DATA_SEL, . - GDT_BASE # Selector [0x18]
- .word 0xFFFF # limit 0xFFFFF
- .word 0 # base 0
- .byte 0
- .byte 0x93 # present, ring 0, data, expand-up, not-writable
- .byte 0xCF # page-granular, 32-bit
- .byte 0
-
-#
-# System code segment descriptor
-#
-.equ SYS_CODE_SEL, . - GDT_BASE # Selector [0x20]
- .word 0xFFFF # limit 0xFFFFF
- .word 0 # base 0
- .byte 0
- .byte 0x9A # present, ring 0, data, expand-up, writable
- .byte 0xCF # page-granular, 32-bit
- .byte 0
-#
-# Spare segment descriptor
-#
-.equ SYS16_CODE_SEL, . - GDT_BASE # Selector [0x28]
- .word 0xFFFF # limit 0xFFFFF
- .word 0 # base 0
- .byte 0x0E # Changed from F000 to E000.
- .byte 0x9B # present, ring 0, code, expand-up, writable
- .byte 0x00 # byte-granular, 16-bit
- .byte 0
-#
-# Spare segment descriptor
-#
-.equ SYS16_DATA_SEL, . - GDT_BASE # Selector [0x30]
- .word 0xFFFF # limit 0xFFFF
- .word 0 # base 0
- .byte 0
- .byte 0x93 # present, ring 0, data, expand-up, not-writable
- .byte 0x00 # byte-granular, 16-bit
- .byte 0
-
-#
-# Spare segment descriptor
-#
-.equ SPARE5_SEL, . - GDT_BASE # Selector [0x38]
- .word 0 # limit 0
- .word 0 # base 0
- .byte 0
- .byte 0 # present, ring 0, data, expand-up, writable
- .byte 0 # page-granular, 32-bit
- .byte 0
-.equ GDT_SIZE, . - BootGdtTable # Size, in bytes
-
-#
-# GDT Descriptor
-#
-GdtDesc: # GDT descriptor
- .word GDT_SIZE - 1 # GDT limit
- .long BootGdtTable # GDT base address
-
-ASM_PFX(ProtectedModeEntryLinearAddress):
-ProtectedModeEntryLinearOffset:
- .long ASM_PFX(ProtectedModeEntryPoint) # Offset of our 32 bit code
- .word LINEAR_CODE_SEL
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm deleted file mode 100644 index 9b2a526549..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm +++ /dev/null @@ -1,340 +0,0 @@ -;; @file
-; This is the code that goes from real-mode to protected mode.
-; It consumes the reset vector, calls TempRamInit API from FSP binary.
-;
-; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-;
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;;
-
-
-#include "Fsp.h"
-
-.686p
-.xmm
-.model small, c
-
-EXTRN CallPeiCoreEntryPoint:NEAR
-EXTRN TempRamInitParams:FAR
-
-; Pcds
-EXTRN PcdGet32 (PcdFlashFvFspBase):DWORD
-EXTRN PcdGet32 (PcdFlashFvFspSize):DWORD
-
-_TEXT_REALMODE SEGMENT PARA PUBLIC USE16 'CODE'
- ASSUME CS:_TEXT_REALMODE, DS:_TEXT_REALMODE
-
-;----------------------------------------------------------------------------
-;
-; Procedure: _ModuleEntryPoint
-;
-; Input: None
-;
-; Output: None
-;
-; Destroys: Assume all registers
-;
-; Description:
-;
-; Transition to non-paged flat-model protected mode from a
-; hard-coded GDT that provides exactly two descriptors.
-; This is a bare bones transition to protected mode only
-; used for a while in PEI and possibly DXE.
-;
-; After enabling protected mode, a far jump is executed to
-; transfer to PEI using the newly loaded GDT.
-;
-; Return: None
-;
-; MMX Usage:
-; MM0 = BIST State
-; MM5 = Save time-stamp counter value high32bit
-; MM6 = Save time-stamp counter value low32bit.
-;
-;----------------------------------------------------------------------------
-
-align 4
-_ModuleEntryPoint PROC NEAR C PUBLIC
- fninit ; clear any pending Floating point exceptions
- ;
- ; Store the BIST value in mm0
- ;
- movd mm0, eax
-
- ;
- ; Save time-stamp counter value
- ; rdtsc load 64bit time-stamp counter to EDX:EAX
- ;
- rdtsc
- movd mm5, edx
- movd mm6, eax
-
- ;
- ; Load the GDT table in GdtDesc
- ;
- mov esi, OFFSET GdtDesc
- DB 66h
- lgdt fword ptr cs:[si]
-
- ;
- ; Transition to 16 bit protected mode
- ;
- mov eax, cr0 ; Get control register 0
- or eax, 00000003h ; Set PE bit (bit #0) & MP bit (bit #1)
- mov cr0, eax ; Activate protected mode
-
- mov eax, cr4 ; Get control register 4
- or eax, 00000600h ; Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)
- mov cr4, eax
-
- ;
- ; Now we're in 16 bit protected mode
- ; Set up the selectors for 32 bit protected mode entry
- ;
- mov ax, SYS_DATA_SEL
- mov ds, ax
- mov es, ax
- mov fs, ax
- mov gs, ax
- mov ss, ax
-
- ;
- ; Transition to Flat 32 bit protected mode
- ; The jump to a far pointer causes the transition to 32 bit mode
- ;
- mov esi, offset ProtectedModeEntryLinearAddress
- jmp fword ptr cs:[si]
-
-_ModuleEntryPoint ENDP
-_TEXT_REALMODE ENDS
-
-_TEXT_PROTECTED_MODE SEGMENT PARA PUBLIC USE32 'CODE'
- ASSUME CS:_TEXT_PROTECTED_MODE, DS:_TEXT_PROTECTED_MODE
-
-;----------------------------------------------------------------------------
-;
-; Procedure: ProtectedModeEntryPoint
-;
-; Input: None
-;
-; Output: None
-;
-; Destroys: Assume all registers
-;
-; Description:
-;
-; This function handles:
-; Call two basic APIs from FSP binary
-; Initializes stack with some early data (BIST, PEI entry, etc)
-;
-; Return: None
-;
-;----------------------------------------------------------------------------
-
-align 4
-ProtectedModeEntryPoint PROC NEAR PUBLIC
-
- ; Find the fsp info header
- mov edi, PcdGet32 (PcdFlashFvFspBase)
- mov ecx, PcdGet32 (PcdFlashFvFspSize)
-
- mov eax, dword ptr [edi + FVH_SIGINATURE_OFFSET]
- cmp eax, FVH_SIGINATURE_VALID_VALUE
- jnz FspHeaderNotFound
-
- xor eax, eax
- mov ax, word ptr [edi + FVH_EXTHEADER_OFFSET_OFFSET]
- cmp ax, 0
- jnz FspFvExtHeaderExist
-
- xor eax, eax
- mov ax, word ptr [edi + FVH_HEADER_LENGTH_OFFSET] ; Bypass Fv Header
- add edi, eax
- jmp FspCheckFfsHeader
-
-FspFvExtHeaderExist:
- add edi, eax
- mov eax, dword ptr [edi + FVH_EXTHEADER_SIZE_OFFSET] ; Bypass Ext Fv Header
- add edi, eax
-
- ; Round up to 8 byte alignment
- mov eax, edi
- and al, 07h
- jz FspCheckFfsHeader
-
- and edi, 0FFFFFFF8h
- add edi, 08h
-
-FspCheckFfsHeader:
- ; Check the ffs guid
- mov eax, dword ptr [edi]
- cmp eax, FSP_HEADER_GUID_DWORD1
- jnz FspHeaderNotFound
-
- mov eax, dword ptr [edi + 4]
- cmp eax, FSP_HEADER_GUID_DWORD2
- jnz FspHeaderNotFound
-
- mov eax, dword ptr [edi + 8]
- cmp eax, FSP_HEADER_GUID_DWORD3
- jnz FspHeaderNotFound
-
- mov eax, dword ptr [edi + 0Ch]
- cmp eax, FSP_HEADER_GUID_DWORD4
- jnz FspHeaderNotFound
-
- add edi, FFS_HEADER_SIZE_VALUE ; Bypass the ffs header
-
- ; Check the section type as raw section
- mov al, byte ptr [edi + SECTION_HEADER_TYPE_OFFSET]
- cmp al, 019h
- jnz FspHeaderNotFound
-
- add edi, RAW_SECTION_HEADER_SIZE_VALUE ; Bypass the section header
- jmp FspHeaderFound
-
-FspHeaderNotFound:
- jmp $
-
-FspHeaderFound:
- ; Get the fsp TempRamInit Api address
- mov eax, dword ptr [edi + FSP_HEADER_IMAGEBASE_OFFSET]
- add eax, dword ptr [edi + FSP_HEADER_TEMPRAMINIT_OFFSET]
-
- ; Setup the hardcode stack
- mov esp, OFFSET TempRamInitStack
-
- ; Call the fsp TempRamInit Api
- jmp eax
-
-TempRamInitDone:
- cmp eax, 0
- jnz FspApiFailed
-
- ; ECX: start of range
- ; EDX: end of range
- mov esp, edx
- push edx
- push ecx
- push eax ; zero - no hob list yet
- call CallPeiCoreEntryPoint
-
-FspApiFailed:
- jmp $
-
-align 10h
-TempRamInitStack:
- DD OFFSET TempRamInitDone
- DD OFFSET TempRamInitParams
-
-ProtectedModeEntryPoint ENDP
-
-;
-; ROM-based Global-Descriptor Table for the Tiano PEI Phase
-;
-align 16
-PUBLIC BootGdtTable
-
-;
-; GDT[0]: 0x00: Null entry, never used.
-;
-NULL_SEL EQU $ - GDT_BASE ; Selector [0]
-GDT_BASE:
-BootGdtTable DD 0
- DD 0
-;
-; Linear data segment descriptor
-;
-LINEAR_SEL EQU $ - GDT_BASE ; Selector [0x8]
- DW 0FFFFh ; limit 0xFFFFF
- DW 0 ; base 0
- DB 0
- DB 092h ; present, ring 0, data, expand-up, writable
- DB 0CFh ; page-granular, 32-bit
- DB 0
-;
-; Linear code segment descriptor
-;
-LINEAR_CODE_SEL EQU $ - GDT_BASE ; Selector [0x10]
- DW 0FFFFh ; limit 0xFFFFF
- DW 0 ; base 0
- DB 0
- DB 09Bh ; present, ring 0, data, expand-up, not-writable
- DB 0CFh ; page-granular, 32-bit
- DB 0
-;
-; System data segment descriptor
-;
-SYS_DATA_SEL EQU $ - GDT_BASE ; Selector [0x18]
- DW 0FFFFh ; limit 0xFFFFF
- DW 0 ; base 0
- DB 0
- DB 093h ; present, ring 0, data, expand-up, not-writable
- DB 0CFh ; page-granular, 32-bit
- DB 0
-
-;
-; System code segment descriptor
-;
-SYS_CODE_SEL EQU $ - GDT_BASE ; Selector [0x20]
- DW 0FFFFh ; limit 0xFFFFF
- DW 0 ; base 0
- DB 0
- DB 09Ah ; present, ring 0, data, expand-up, writable
- DB 0CFh ; page-granular, 32-bit
- DB 0
-;
-; Spare segment descriptor
-;
-SYS16_CODE_SEL EQU $ - GDT_BASE ; Selector [0x28]
- DW 0FFFFh ; limit 0xFFFFF
- DW 0 ; base 0
- DB 0Eh ; Changed from F000 to E000.
- DB 09Bh ; present, ring 0, code, expand-up, writable
- DB 00h ; byte-granular, 16-bit
- DB 0
-;
-; Spare segment descriptor
-;
-SYS16_DATA_SEL EQU $ - GDT_BASE ; Selector [0x30]
- DW 0FFFFh ; limit 0xFFFF
- DW 0 ; base 0
- DB 0
- DB 093h ; present, ring 0, data, expand-up, not-writable
- DB 00h ; byte-granular, 16-bit
- DB 0
-
-;
-; Spare segment descriptor
-;
-SPARE5_SEL EQU $ - GDT_BASE ; Selector [0x38]
- DW 0 ; limit 0
- DW 0 ; base 0
- DB 0
- DB 0 ; present, ring 0, data, expand-up, writable
- DB 0 ; page-granular, 32-bit
- DB 0
-GDT_SIZE EQU $ - BootGdtTable ; Size, in bytes
-
-;
-; GDT Descriptor
-;
-GdtDesc: ; GDT descriptor
- DW GDT_SIZE - 1 ; GDT limit
- DD OFFSET BootGdtTable ; GDT base address
-
-
-ProtectedModeEntryLinearAddress LABEL FWORD
-ProtectedModeEntryLinearOffset LABEL DWORD
- DD OFFSET ProtectedModeEntryPoint ; Offset of our 32 bit code
- DW LINEAR_CODE_SEL
-
-_TEXT_PROTECTED_MODE ENDS
-END
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Stack.S b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Stack.S deleted file mode 100644 index bbfdc11ebf..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Stack.S +++ /dev/null @@ -1,74 +0,0 @@ -## @file
-# Switch the stack from temporary memory to permenent memory.
-#
-# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED
-#
-##
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# SecSwitchStack (
-# UINT32 TemporaryMemoryBase,
-# UINT32 PermenentMemoryBase
-# )#
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX (SecSwitchStack)
-ASM_PFX(SecSwitchStack):
- #
- # Save standard registers so they can be used to change stack
- #
- pushl %eax
- pushl %ebx
- pushl %ecx
- pushl %edx
-
- #
- # !!CAUTION!! this function address's is pushed into stack after
- # migration of whole temporary memory, so need save it to permenent
- # memory at first!
- #
- movl 20(%esp), %ebx # Save the first parameter
- movl 24(%esp), %ecx # Save the second parameter
-
- #
- # Save this function's return address into permenent memory at first.
- # Then, Fixup the esp point to permenent memory
- #
- movl %esp, %eax
- subl %ebx, %eax
- addl %ecx, %eax
- movl 0(%esp), %edx # copy pushed register's value to permenent memory
- movl %edx, 0(%eax)
- movl 4(%esp), %edx
- movl %edx, 4(%eax)
- movl 8(%esp), %edx
- movl %edx, 8(%eax)
- movl 12(%esp), %edx
- movl %edx, 12(%eax)
- movl 16(%esp), %edx # Update this function's return address into permenent memory
- movl %edx, 16(%eax)
- movl %eax, %esp # From now, esp is pointed to permenent memory
-
- #
- # Fixup the ebp point to permenent memory
- #
- movl %ebp, %eax
- subl %ebx, %eax
- addl %ecx, %eax
- movl %eax, %ebp # From now, ebp is pointed to permenent memory
-
- popl %edx
- popl %ecx
- popl %ebx
- popl %eax
- ret
-
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Stack.asm b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Stack.asm deleted file mode 100644 index e9618fc34a..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Stack.asm +++ /dev/null @@ -1,80 +0,0 @@ -;; @file
-; Switch the stack from temporary memory to permenent memory.
-;
-; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-;
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;;
-
- .586p
- .model flat,C
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; SecSwitchStack (
-; UINT32 TemporaryMemoryBase,
-; UINT32 PermenentMemoryBase
-; );
-;------------------------------------------------------------------------------
-SecSwitchStack PROC
- ;
- ; Save three register: eax, ebx, ecx
- ;
- push eax
- push ebx
- push ecx
- push edx
-
- ;
- ; !!CAUTION!! this function address's is pushed into stack after
- ; migration of whole temporary memory, so need save it to permenent
- ; memory at first!
- ;
-
- mov ebx, [esp + 20] ; Save the first parameter
- mov ecx, [esp + 24] ; Save the second parameter
-
- ;
- ; Save this function's return address into permenent memory at first.
- ; Then, Fixup the esp point to permenent memory
- ;
- mov eax, esp
- sub eax, ebx
- add eax, ecx
- mov edx, dword ptr [esp] ; copy pushed register's value to permenent memory
- mov dword ptr [eax], edx
- mov edx, dword ptr [esp + 4]
- mov dword ptr [eax + 4], edx
- mov edx, dword ptr [esp + 8]
- mov dword ptr [eax + 8], edx
- mov edx, dword ptr [esp + 12]
- mov dword ptr [eax + 12], edx
- mov edx, dword ptr [esp + 16] ; Update this function's return address into permenent memory
- mov dword ptr [eax + 16], edx
- mov esp, eax ; From now, esp is pointed to permenent memory
-
- ;
- ; Fixup the ebp point to permenent memory
- ;
- mov eax, ebp
- sub eax, ebx
- add eax, ecx
- mov ebp, eax ; From now, ebp is pointed to permenent memory
-
- pop edx
- pop ecx
- pop ebx
- pop eax
- ret
-SecSwitchStack ENDP
-
- END
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/PlatformInit.c b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/PlatformInit.c deleted file mode 100644 index a9703b6d1a..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/PlatformInit.c +++ /dev/null @@ -1,45 +0,0 @@ -/** @file
- Sample to provide platform init function.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-
-#include <PiPei.h>
-#include <Library/DebugLib.h>
-
-/**
- Platform initialization.
-
- @param[in] FspHobList HobList produced by FSP.
- @param[in] StartOfRange Start of temporary RAM.
- @param[in] EndOfRange End of temporary RAM.
-
-**/
-VOID
-EFIAPI
-PlatformInit (
- IN VOID *FspHobList,
- IN VOID *StartOfRange,
- IN VOID *EndOfRange
- )
-{
- //
- // Platform initialization
- // Enable Serial port here
- //
-
- DEBUG ((DEBUG_INFO, "PrintPeiCoreEntryPointParam\n"));
- DEBUG ((DEBUG_INFO, "FspHobList - 0x%x\n", FspHobList));
- DEBUG ((DEBUG_INFO, "StartOfRange - 0x%x\n", StartOfRange));
- DEBUG ((DEBUG_INFO, "EndOfRange - 0x%x\n", EndOfRange));
-}
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SaveSecContext.c b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SaveSecContext.c deleted file mode 100644 index 8f875fe6a4..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SaveSecContext.c +++ /dev/null @@ -1,114 +0,0 @@ -/** @file
- Sample to provide SaveSecContext function.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-
-#include <PiPei.h>
-#include <Library/DebugLib.h>
-#include <Ppi/TopOfTemporaryRam.h>
-#include <Ppi/SecPlatformInformation.h>
-
-/**
- Save BIST value before call FspInit.
-
- @param[in] Bist BIST value.
-
-**/
-VOID
-AsmSaveBistValue (
- IN UINT32 Bist
- );
-
-/**
- Save Ticker value before call FspInit.
-
- @param[in] Ticker Ticker value.
-
-**/
-VOID
-AsmSaveTickerValue (
- IN UINT64 Ticker
- );
-
-/**
- Save SEC context before call FspInit.
-
- @param[in] PeiServices Pointer to PEI Services Table.
-
-**/
-VOID
-EFIAPI
-SaveSecContext (
- IN CONST EFI_PEI_SERVICES **PeiServices
- )
-{
- UINT32 *Bist;
- UINT64 *Ticker;
- UINT32 Size;
- UINT32 Count;
- UINT32 TopOfTemporaryRam;
- VOID *TopOfTemporaryRamPpi;
- EFI_STATUS Status;
-
- DEBUG ((DEBUG_INFO, "SaveSecContext - 0x%x\n", PeiServices));
-
- Status = (*PeiServices)->LocatePpi (
- PeiServices,
- &gTopOfTemporaryRamPpiGuid,
- 0,
- NULL,
- (VOID **) &TopOfTemporaryRamPpi
- );
- if (EFI_ERROR (Status)) {
- return ;
- }
-
- DEBUG ((DEBUG_INFO, "TopOfTemporaryRamPpi - 0x%x\n", TopOfTemporaryRamPpi));
-
- //
- // The entries of BIST information, together with the number of them,
- // reside in the bottom of stack, left untouched by normal stack operation.
- // This routine copies the BIST information to the buffer pointed by
- // PlatformInformationRecord for output.
- //
- // |--------------| <- TopOfTemporaryRam
- // |Number of BSPs|
- // |--------------|
- // | BIST |
- // |--------------|
- // | .... |
- // |--------------|
- // | TSC[63:32] |
- // |--------------|
- // | TSC[31:00] |
- // |--------------|
- //
-
- TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof(UINT32);
- TopOfTemporaryRam -= sizeof(UINT32) * 2;
- DEBUG ((DEBUG_INFO, "TopOfTemporaryRam - 0x%x\n", TopOfTemporaryRam));
- Count = *(UINT32 *)(UINTN)(TopOfTemporaryRam - sizeof(UINT32));
- DEBUG ((DEBUG_INFO, "Count - 0x%x\n", Count));
- Size = Count * sizeof (IA32_HANDOFF_STATUS);
- DEBUG ((DEBUG_INFO, "Size - 0x%x\n", Size));
-
- Bist = (UINT32 *)(UINTN)(TopOfTemporaryRam - sizeof(UINT32) - Size);
- DEBUG ((DEBUG_INFO, "Bist - 0x%x\n", *Bist));
- Ticker = (UINT64 *)(UINTN)(TopOfTemporaryRam - sizeof(UINT32) - Size - sizeof(UINT64));
- DEBUG ((DEBUG_INFO, "Ticker - 0x%lx\n", *Ticker));
-
- // Just need record BSP
- AsmSaveBistValue (*Bist);
- AsmSaveTickerValue (*Ticker);
-}
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecGetPerformance.c b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecGetPerformance.c deleted file mode 100644 index d6085b73c7..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecGetPerformance.c +++ /dev/null @@ -1,89 +0,0 @@ -/** @file
- Sample to provide SecGetPerformance function.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-#include <Ppi/SecPerformance.h>
-#include <Ppi/TopOfTemporaryRam.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/TimerLib.h>
-#include <Library/DebugLib.h>
-
-/**
- This interface conveys performance information out of the Security (SEC) phase into PEI.
-
- This service is published by the SEC phase. The SEC phase handoff has an optional
- EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the
- PEI Foundation. As such, if the platform supports collecting performance data in SEC,
- this information is encapsulated into the data structure abstracted by this service.
- This information is collected for the boot-strap processor (BSP) on IA-32.
-
- @param[in] PeiServices The pointer to the PEI Services Table.
- @param[in] This The pointer to this instance of the PEI_SEC_PERFORMANCE_PPI.
- @param[out] Performance The pointer to performance data collected in SEC phase.
-
- @retval EFI_SUCCESS The data was successfully returned.
-
-**/
-EFI_STATUS
-EFIAPI
-SecGetPerformance (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN PEI_SEC_PERFORMANCE_PPI *This,
- OUT FIRMWARE_SEC_PERFORMANCE *Performance
- )
-{
- UINT32 Size;
- UINT32 Count;
- UINT32 TopOfTemporaryRam;
- UINT64 Ticker;
- VOID *TopOfTemporaryRamPpi;
- EFI_STATUS Status;
-
- DEBUG ((DEBUG_INFO, "SecGetPerformance\n"));
-
- Status = (*PeiServices)->LocatePpi (
- PeiServices,
- &gTopOfTemporaryRamPpiGuid,
- 0,
- NULL,
- (VOID **) &TopOfTemporaryRamPpi
- );
- if (EFI_ERROR (Status)) {
- return EFI_NOT_FOUND;
- }
-
- //
- // |--------------| <- TopOfTemporaryRam
- // |Number of BSPs|
- // |--------------|
- // | BIST |
- // |--------------|
- // | .... |
- // |--------------|
- // | TSC[63:32] |
- // |--------------|
- // | TSC[31:00] |
- // |--------------|
- //
- TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof(UINT32);
- TopOfTemporaryRam -= sizeof(UINT32) * 2;
- Count = *(UINT32 *) (UINTN) (TopOfTemporaryRam - sizeof (UINT32));
- Size = Count * sizeof (UINT64);
-
- Ticker = *(UINT64 *) (UINTN) (TopOfTemporaryRam - sizeof (UINT32) - Size - sizeof (UINT32) * 2);
- Performance->ResetEnd = GetTimeInNanoSecond (Ticker);
-
- return EFI_SUCCESS;
-}
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecPeiFspPlatformSecLibSample.inf b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecPeiFspPlatformSecLibSample.inf deleted file mode 100644 index 8d019d827d..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecPeiFspPlatformSecLibSample.inf +++ /dev/null @@ -1,94 +0,0 @@ -## @file
-# Sample to provide FSP wrapper platform sec related function.
-#
-# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-################################################################################
-#
-# Defines Section - statements that will be processed to create a Makefile.
-#
-################################################################################
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = SecPeiFspPlatformSecLibSample
- FILE_GUID = 5B2B6493-BEBB-4d44-8278-35F40F5289BC
- MODULE_TYPE = SEC
- VERSION_STRING = 1.0
- LIBRARY_CLASS = FspPlatformSecLib
-
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-################################################################################
-#
-# Sources Section - list of files that are required for the build to succeed.
-#
-################################################################################
-
-[Sources]
- FspPlatformSecLibSample.c
- SecRamInitData.c
- SaveSecContext.c
- SecPlatformInformation.c
- SecGetPerformance.c
- SecTempRamSupport.c
- PlatformInit.c
-
-[Sources.IA32]
- Ia32/SecEntry.asm
- Ia32/PeiCoreEntry.asm
- Ia32/AsmSaveSecContext.asm
- Ia32/Stack.asm
- Ia32/Fsp.h
- Ia32/SecEntry.S
- Ia32/PeiCoreEntry.S
- Ia32/AsmSaveSecContext.S
- Ia32/Stack.S
-
-################################################################################
-#
-# Package Dependency Section - list of Package files that are required for
-# this module.
-#
-################################################################################
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- UefiCpuPkg/UefiCpuPkg.dec
- IntelFspPkg/IntelFspPkg.dec
- IntelFspWrapperPkg/IntelFspWrapperPkg.dec
-
-[LibraryClasses]
- LocalApicLib
-
-[Ppis]
- gEfiSecPlatformInformationPpiGuid ## CONSUMES
- gPeiSecPerformancePpiGuid ## CONSUMES
- gEfiTemporaryRamSupportPpiGuid ## CONSUMES
-
-[Pcd]
- gFspWrapperTokenSpaceGuid.PcdPeiTemporaryRamStackSize ## CONSUMES
- gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase ## CONSUMES
- gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize ## CONSUMES
-
-[FixedPcd]
- gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress ## CONSUMES
- gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ## CONSUMES
- gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset ## CONSUMES
- gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress ## CONSUMES
- gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize ## CONSUMES
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecPlatformInformation.c b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecPlatformInformation.c deleted file mode 100644 index ebf3d12ddc..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecPlatformInformation.c +++ /dev/null @@ -1,83 +0,0 @@ -/** @file
- Sample to provide SecPlatformInformation function.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-#include <Ppi/SecPlatformInformation.h>
-#include <Ppi/TopOfTemporaryRam.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-
-/**
- This interface conveys state information out of the Security (SEC) phase into PEI.
-
- @param[in] PeiServices Pointer to the PEI Services Table.
- @param[in,out] StructureSize Pointer to the variable describing size of the input buffer.
- @param[out] PlatformInformationRecord Pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
-
- @retval EFI_SUCCESS The data was successfully returned.
- @retval EFI_BUFFER_TOO_SMALL The buffer was too small.
-
-**/
-EFI_STATUS
-EFIAPI
-SecPlatformInformation (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN OUT UINT64 *StructureSize,
- OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
- )
-{
- UINT32 *Bist;
- UINT32 Size;
- UINT32 Count;
- UINT32 TopOfTemporaryRam;
- VOID *TopOfTemporaryRamPpi;
- EFI_STATUS Status;
-
- DEBUG ((DEBUG_INFO, "SecPlatformInformation\n"));
-
- Status = (*PeiServices)->LocatePpi (
- PeiServices,
- &gTopOfTemporaryRamPpiGuid,
- 0,
- NULL,
- (VOID **) &TopOfTemporaryRamPpi
- );
- if (EFI_ERROR (Status)) {
- return EFI_NOT_FOUND;
- }
-
- //
- // The entries of BIST information, together with the number of them,
- // reside in the bottom of stack, left untouched by normal stack operation.
- // This routine copies the BIST information to the buffer pointed by
- // PlatformInformationRecord for output.
- //
- TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof (UINT32);
- TopOfTemporaryRam -= sizeof(UINT32) * 2;
- Count = *((UINT32 *)(UINTN) (TopOfTemporaryRam - sizeof (UINT32)));
- Size = Count * sizeof (IA32_HANDOFF_STATUS);
-
- if ((*StructureSize) < (UINT64) Size) {
- *StructureSize = Size;
- return EFI_BUFFER_TOO_SMALL;
- }
-
- *StructureSize = Size;
- Bist = (UINT32 *) (TopOfTemporaryRam - sizeof (UINT32) - Size);
-
- CopyMem (PlatformInformationRecord, Bist, Size);
-
- return EFI_SUCCESS;
-}
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecRamInitData.c b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecRamInitData.c deleted file mode 100644 index 26fed03611..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecRamInitData.c +++ /dev/null @@ -1,23 +0,0 @@ -/** @file
- Sample to provide TempRamInitParams data.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Library/PcdLib.h>
-
-GLOBAL_REMOVE_IF_UNREFERENCED CONST UINT32 TempRamInitParams[4] = {
- ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) + FixedPcdGet32 (PcdFlashMicroCodeOffset)),
- ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32 (PcdFlashMicroCodeOffset)),
- FixedPcdGet32 (PcdFlashCodeCacheAddress),
- FixedPcdGet32 (PcdFlashCodeCacheSize)
-};
diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecTempRamSupport.c b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecTempRamSupport.c deleted file mode 100644 index 419cf9c8e4..0000000000 --- a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecTempRamSupport.c +++ /dev/null @@ -1,154 +0,0 @@ -/** @file
- Sample to provide SecTemporaryRamSupport function.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-#include <Ppi/TemporaryRamSupport.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugAgentLib.h>
-
-/**
- Switch the stack in the temporary memory to the one in the permanent memory.
-
- This function must be invoked after the memory migration immediately. The relative
- position of the stack in the temporary and permanent memory is same.
-
- @param[in] TemporaryMemoryBase Base address of the temporary memory.
- @param[in] PermenentMemoryBase Base address of the permanent memory.
-
-**/
-VOID
-EFIAPI
-SecSwitchStack (
- IN UINT32 TemporaryMemoryBase,
- IN UINT32 PermenentMemoryBase
- );
-
-/**
- This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into
- permanent memory.
-
- @param[in] PeiServices Pointer to the PEI Services Table.
- @param[in] TemporaryMemoryBase Source Address in temporary memory from which the SEC or PEIM will copy the
- Temporary RAM contents.
- @param[in] PermanentMemoryBase Destination Address in permanent memory into which the SEC or PEIM will copy the
- Temporary RAM contents.
- @param[in] CopySize Amount of memory to migrate from temporary to permanent memory.
-
- @retval EFI_SUCCESS The data was successfully returned.
- @retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when
- TemporaryMemoryBase > PermanentMemoryBase.
-
-**/
-EFI_STATUS
-EFIAPI
-SecTemporaryRamSupport (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
- IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
- IN UINTN CopySize
- )
-{
- IA32_DESCRIPTOR IdtDescriptor;
- VOID* OldHeap;
- VOID* NewHeap;
- VOID* OldStack;
- VOID* NewStack;
- DEBUG_AGENT_CONTEXT_POSTMEM_SEC DebugAgentContext;
- BOOLEAN OldStatus;
- UINTN PeiStackSize;
-
- PeiStackSize = (UINTN)PcdGet32 (PcdPeiTemporaryRamStackSize);
- if (PeiStackSize == 0) {
- PeiStackSize = (CopySize >> 1);
- }
-
- ASSERT (PeiStackSize < CopySize);
-
- //
- // |-------------------|---->
- // | Stack | PeiStackSize
- // |-------------------|---->
- // | Heap | PeiTemporayRamSize
- // |-------------------|----> TempRamBase
- //
- // |-------------------|---->
- // | Heap | PeiTemporayRamSize
- // |-------------------|---->
- // | Stack | PeiStackSize
- // |-------------------|----> PermanentMemoryBase
- //
-
- OldHeap = (VOID*)(UINTN)TemporaryMemoryBase;
- NewHeap = (VOID*)((UINTN)PermanentMemoryBase + PeiStackSize);
-
- OldStack = (VOID*)((UINTN)TemporaryMemoryBase + CopySize - PeiStackSize);
- NewStack = (VOID*)(UINTN)PermanentMemoryBase;
-
- DebugAgentContext.HeapMigrateOffset = (UINTN)NewHeap - (UINTN)OldHeap;
- DebugAgentContext.StackMigrateOffset = (UINTN)NewStack - (UINTN)OldStack;
-
- OldStatus = SaveAndSetDebugTimerInterrupt (FALSE);
- //
- // Initialize Debug Agent to support source level debug in PEI phase after memory ready.
- // It will build HOB and fix up the pointer in IDT table.
- //
- InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, (VOID *) &DebugAgentContext, NULL);
-
- //
- // Migrate Heap
- //
- CopyMem (NewHeap, OldHeap, CopySize - PeiStackSize);
-
- //
- // Migrate Stack
- //
- CopyMem (NewStack, OldStack, PeiStackSize);
-
-
- //
- // We need *not* fix the return address because currently,
- // The PeiCore is executed in flash.
- //
-
- //
- // Rebase IDT table in permanent memory
- //
- AsmReadIdtr (&IdtDescriptor);
- IdtDescriptor.Base = IdtDescriptor.Base - (UINTN)OldStack + (UINTN)NewStack;
-
- AsmWriteIdtr (&IdtDescriptor);
-
-
- //
- // Program MTRR
- //
-
- //
- // SecSwitchStack function must be invoked after the memory migration
- // immediatly, also we need fixup the stack change caused by new call into
- // permenent memory.
- //
- SecSwitchStack (
- (UINT32) (UINTN) OldStack,
- (UINT32) (UINTN) NewStack
- );
-
- SaveAndSetDebugTimerInterrupt (OldStatus);
-
- return EFI_SUCCESS;
-}
-
diff --git a/BraswellPlatformPkg/Common/Override/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c b/BraswellPlatformPkg/Common/Override/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c deleted file mode 100644 index bc7ba44dee..0000000000 --- a/BraswellPlatformPkg/Common/Override/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c +++ /dev/null @@ -1,1094 +0,0 @@ -/** @file
- 16550 UART Serial Port library functions
-
- (C) Copyright 2014 Hewlett-Packard Development Company, L.P.<BR>
- Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-#include <IndustryStandard/Pci.h>
-#include <Library/PlatformSerialPortLib.h>
-#include <Library/PcdLib.h>
-#include <Library/IoLib.h>
-#include <Library/PciLib.h>
-#include <Library/PlatformHookLib.h>
-#include <Library/BaseLib.h>
-
-//
-// PCI Defintions.
-//
-#define PCI_BRIDGE_32_BIT_IO_SPACE 0x01
-
-//
-// 16550 UART register offsets and bitfields
-//
-#define R_UART_RXBUF 0
-#define R_UART_TXBUF 0
-#define R_UART_BAUD_LOW 0
-#define R_UART_BAUD_HIGH 1
-#define R_UART_FCR 2
-#define B_UART_FCR_FIFOE BIT0
-#define B_UART_FCR_FIFO64 BIT5
-#define R_UART_LCR 3
-#define B_UART_LCR_DLAB BIT7
-#define R_UART_MCR 4
-#define B_UART_MCR_DTRC BIT0
-#define B_UART_MCR_RTS BIT1
-#define R_UART_LSR 5
-#define B_UART_LSR_RXRDY BIT0
-#define B_UART_LSR_TXRDY BIT5
-#define B_UART_LSR_TEMT BIT6
-#define R_UART_MSR 6
-#define B_UART_MSR_CTS BIT4
-#define B_UART_MSR_DSR BIT5
-#define B_UART_MSR_RI BIT6
-#define B_UART_MSR_DCD BIT7
-
-//
-// 4-byte structure for each PCI node in PcdSerialPciDeviceInfo
-//
-typedef struct {
- UINT8 Device;
- UINT8 Function;
- UINT16 PowerManagementStatusAndControlRegister;
-} PCI_UART_DEVICE_INFO;
-
-/**
- Read an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is read from
- MMIO space. If PcdSerialUseMmio is FALSE, then the value is read from I/O space. The
- parameter Offset is added to the base address of the 16550 registers that is specified
- by PcdSerialRegisterBase.
-
- @param Base The base address register of UART device.
- @param Offset The offset of the 16550 register to read.
-
- @return The value read from the 16550 register.
-
-**/
-UINT8
-SerialPortReadRegister (
- UINTN Base,
- UINTN Offset
- )
-{
- if (PcdGetBool (PcdSerialUseMmio)) {
- return MmioRead8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride));
- } else {
- return IoRead8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride));
- }
-}
-
-/**
- Write an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is written to
- MMIO space. If PcdSerialUseMmio is FALSE, then the value is written to I/O space. The
- parameter Offset is added to the base address of the 16550 registers that is specified
- by PcdSerialRegisterBase.
-
- @param Base The base address register of UART device.
- @param Offset The offset of the 16550 register to write.
- @param Value The value to write to the 16550 register specified by Offset.
-
- @return The value written to the 16550 register.
-
-**/
-UINT8
-SerialPortWriteRegister (
- UINTN Base,
- UINTN Offset,
- UINT8 Value
- )
-{
- if (PcdGetBool (PcdSerialUseMmio)) {
- return MmioWrite8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), Value);
- } else {
- return IoWrite8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), Value);
- }
-}
-
-/**
- Update the value of an 16-bit PCI configuration register in a PCI device. If the
- PCI Configuration register specified by PciAddress is already programmed with a
- non-zero value, then return the current value. Otherwise update the PCI configuration
- register specified by PciAddress with the value specified by Value and return the
- value programmed into the PCI configuration register. All values must be masked
- using the bitmask specified by Mask.
-
- @param PciAddress PCI Library address of the PCI Configuration register to update.
- @param Value The value to program into the PCI Configuration Register.
- @param Mask Bitmask of the bits to check and update in the PCI configuration register.
-
-**/
-UINT16
-SerialPortLibUpdatePciRegister16 (
- UINTN PciAddress,
- UINT16 Value,
- UINT16 Mask
- )
-{
- UINT16 CurrentValue;
-
- CurrentValue = PciRead16 (PciAddress) & Mask;
- if (CurrentValue != 0) {
- return CurrentValue;
- }
- return PciWrite16 (PciAddress, Value & Mask);
-}
-
-/**
- Update the value of an 32-bit PCI configuration register in a PCI device. If the
- PCI Configuration register specified by PciAddress is already programmed with a
- non-zero value, then return the current value. Otherwise update the PCI configuration
- register specified by PciAddress with the value specified by Value and return the
- value programmed into the PCI configuration register. All values must be masked
- using the bitmask specified by Mask.
-
- @param PciAddress PCI Library address of the PCI Configuration register to update.
- @param Value The value to program into the PCI Configuration Register.
- @param Mask Bitmask of the bits to check and update in the PCI configuration register.
-
- @return The Secondary bus number that is actually programed into the PCI to PCI Bridge device.
-
-**/
-UINT32
-SerialPortLibUpdatePciRegister32 (
- UINTN PciAddress,
- UINT32 Value,
- UINT32 Mask
- )
-{
- UINT32 CurrentValue;
-
- CurrentValue = PciRead32 (PciAddress) & Mask;
- if (CurrentValue != 0) {
- return CurrentValue;
- }
- return PciWrite32 (PciAddress, Value & Mask);
-}
-
-/**
- Retrieve the I/O or MMIO base address register for the PCI UART device.
-
- This function assumes Root Bus Numer is Zero, and enables I/O and MMIO in PCI UART
- Device if they are not already enabled.
-
- @return The base address register of the UART device.
-
-**/
-UINTN
-GetSerialRegisterBase (
- VOID
- )
-{
- UINTN PciLibAddress;
- UINTN BusNumber;
- UINTN SubordinateBusNumber;
- UINT32 ParentIoBase;
- UINT32 ParentIoLimit;
- UINT16 ParentMemoryBase;
- UINT16 ParentMemoryLimit;
- UINT32 IoBase;
- UINT32 IoLimit;
- UINT16 MemoryBase;
- UINT16 MemoryLimit;
- UINTN SerialRegisterBase;
- UINTN BarIndex;
- UINT32 RegisterBaseMask;
- PCI_UART_DEVICE_INFO *DeviceInfo;
-
- //
- // Get PCI Device Info
- //
- DeviceInfo = (PCI_UART_DEVICE_INFO *) PcdGetPtr (PcdSerialPciDeviceInfo);
-
- //
- // If PCI Device Info is empty, then assume fixed address UART and return PcdSerialRegisterBase
- //
- if (DeviceInfo->Device == 0xff) {
- return (UINTN)PcdGet64 (PcdSerialRegisterBase);
- }
-
- //
- // Assume PCI Bus 0 I/O window is 0-64KB and MMIO windows is 0-4GB
- //
- ParentMemoryBase = 0 >> 16;
- ParentMemoryLimit = 0xfff00000 >> 16;
- ParentIoBase = 0 >> 12;
- ParentIoLimit = 0xf000 >> 12;
-
- //
- // Enable I/O and MMIO in PCI Bridge
- // Assume Root Bus Numer is Zero.
- //
- for (BusNumber = 0; (DeviceInfo + 1)->Device != 0xff; DeviceInfo++) {
- //
- // Compute PCI Lib Address to PCI to PCI Bridge
- //
- PciLibAddress = PCI_LIB_ADDRESS (BusNumber, DeviceInfo->Device, DeviceInfo->Function, 0);
-
- //
- // Retrieve and verify the bus numbers in the PCI to PCI Bridge
- //
- BusNumber = PciRead8 (PciLibAddress + PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET);
- SubordinateBusNumber = PciRead8 (PciLibAddress + PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET);
- if (BusNumber == 0 || BusNumber > SubordinateBusNumber) {
- return 0;
- }
-
- //
- // Retrieve and verify the I/O or MMIO decode window in the PCI to PCI Bridge
- //
- if (PcdGetBool (PcdSerialUseMmio)) {
- MemoryLimit = PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.MemoryLimit)) & 0xfff0;
- MemoryBase = PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.MemoryBase)) & 0xfff0;
-
- //
- // If PCI Bridge MMIO window is disabled, then return 0
- //
- if (MemoryLimit < MemoryBase) {
- return 0;
- }
-
- //
- // If PCI Bridge MMIO window is not in the address range decoded by the parent PCI Bridge, then return 0
- //
- if (MemoryBase < ParentMemoryBase || MemoryBase > ParentMemoryLimit || MemoryLimit > ParentMemoryLimit) {
- return 0;
- }
- ParentMemoryBase = MemoryBase;
- ParentMemoryLimit = MemoryLimit;
- } else {
- IoLimit = PciRead8 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoLimit));
- if ((IoLimit & PCI_BRIDGE_32_BIT_IO_SPACE ) == 0) {
- IoLimit = IoLimit >> 4;
- } else {
- IoLimit = (PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoLimitUpper16)) << 4) | (IoLimit >> 4);
- }
- IoBase = PciRead8 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoBase));
- if ((IoBase & PCI_BRIDGE_32_BIT_IO_SPACE ) == 0) {
- IoBase = IoBase >> 4;
- } else {
- IoBase = (PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoBaseUpper16)) << 4) | (IoBase >> 4);
- }
-
- //
- // If PCI Bridge I/O window is disabled, then return 0
- //
- if (IoLimit < IoBase) {
- return 0;
- }
-
- //
- // If PCI Bridge I/O window is not in the address range decoded by the parent PCI Bridge, then return 0
- //
- if (IoBase < ParentIoBase || IoBase > ParentIoLimit || IoLimit > ParentIoLimit) {
- return 0;
- }
- ParentIoBase = IoBase;
- ParentIoLimit = IoLimit;
- }
- }
-
- //
- // Compute PCI Lib Address to PCI UART
- //
- PciLibAddress = PCI_LIB_ADDRESS (BusNumber, DeviceInfo->Device, DeviceInfo->Function, 0);
-
- //
- // Find the first IO or MMIO BAR
- //
- RegisterBaseMask = 0xFFFFFFF0;
- for (BarIndex = 0; BarIndex < PCI_MAX_BAR; BarIndex ++) {
- SerialRegisterBase = PciRead32 (PciLibAddress + PCI_BASE_ADDRESSREG_OFFSET + BarIndex * 4);
- if (PcdGetBool (PcdSerialUseMmio) && ((SerialRegisterBase & BIT0) == 0)) {
- //
- // MMIO BAR is found
- //
- RegisterBaseMask = 0xFFFFFFF0;
- break;
- }
-
- if ((!PcdGetBool (PcdSerialUseMmio)) && ((SerialRegisterBase & BIT0) != 0)) {
- //
- // IO BAR is found
- //
- RegisterBaseMask = 0xFFFFFFF8;
- break;
- }
- }
-
- //
- // MMIO or IO BAR is not found.
- //
- if (BarIndex == PCI_MAX_BAR) {
- return 0;
- }
-
- //
- // Program UART BAR
- //
- SerialRegisterBase = SerialPortLibUpdatePciRegister32 (
- PciLibAddress + PCI_BASE_ADDRESSREG_OFFSET + BarIndex * 4,
- (UINT32)PcdGet64 (PcdSerialRegisterBase),
- RegisterBaseMask
- );
-
- //
- // Verify that the UART BAR is in the address range decoded by the parent PCI Bridge
- //
- if (PcdGetBool (PcdSerialUseMmio)) {
- if (((SerialRegisterBase >> 16) & 0xfff0) < ParentMemoryBase || ((SerialRegisterBase >> 16) & 0xfff0) > ParentMemoryLimit) {
- return 0;
- }
- } else {
- if ((SerialRegisterBase >> 12) < ParentIoBase || (SerialRegisterBase >> 12) > ParentIoLimit) {
- return 0;
- }
- }
-
- //
- // Enable I/O and MMIO in PCI UART Device if they are not already enabled
- //
- PciOr16 (
- PciLibAddress + PCI_COMMAND_OFFSET,
- PcdGetBool (PcdSerialUseMmio) ? EFI_PCI_COMMAND_MEMORY_SPACE : EFI_PCI_COMMAND_IO_SPACE
- );
-
- //
- // Force D0 state if a Power Management and Status Register is specified
- //
- if (DeviceInfo->PowerManagementStatusAndControlRegister != 0x00) {
- if ((PciRead16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister) & (BIT0 | BIT1)) != 0x00) {
- PciAnd16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister, (UINT16)~(BIT0 | BIT1));
- //
- // If PCI UART was not in D0, then make sure FIFOs are enabled, but do not reset FIFOs
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_FCR, (UINT8)(PcdGet8 (PcdSerialFifoControl) & (B_UART_FCR_FIFOE | B_UART_FCR_FIFO64)));
- }
- }
-
- //
- // Get PCI Device Info
- //
- DeviceInfo = (PCI_UART_DEVICE_INFO *) PcdGetPtr (PcdSerialPciDeviceInfo);
-
- //
- // Enable I/O or MMIO in PCI Bridge
- // Assume Root Bus Numer is Zero.
- //
- for (BusNumber = 0; (DeviceInfo + 1)->Device != 0xff; DeviceInfo++) {
- //
- // Compute PCI Lib Address to PCI to PCI Bridge
- //
- PciLibAddress = PCI_LIB_ADDRESS (BusNumber, DeviceInfo->Device, DeviceInfo->Function, 0);
-
- //
- // Enable the I/O or MMIO decode windows in the PCI to PCI Bridge
- //
- PciOr16 (
- PciLibAddress + PCI_COMMAND_OFFSET,
- PcdGetBool (PcdSerialUseMmio) ? EFI_PCI_COMMAND_MEMORY_SPACE : EFI_PCI_COMMAND_IO_SPACE
- );
-
- //
- // Force D0 state if a Power Management and Status Register is specified
- //
- if (DeviceInfo->PowerManagementStatusAndControlRegister != 0x00) {
- if ((PciRead16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister) & (BIT0 | BIT1)) != 0x00) {
- PciAnd16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister, (UINT16)~(BIT0 | BIT1));
- }
- }
-
- BusNumber = PciRead8 (PciLibAddress + PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET);
- }
-
- return SerialRegisterBase;
-}
-
-/**
- Return whether the hardware flow control signal allows writing.
-
- @param SerialRegisterBase The base address register of UART device.
-
- @retval TRUE The serial port is writable.
- @retval FALSE The serial port is not writable.
-**/
-BOOLEAN
-SerialPortWritable (
- UINTN SerialRegisterBase
- )
-{
- if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {
- if (PcdGetBool (PcdSerialDetectCable)) {
- //
- // Wait for both DSR and CTS to be set
- // DSR is set if a cable is connected.
- // CTS is set if it is ok to transmit data
- //
- // DSR CTS Description Action
- // === === ======================================== ========
- // 0 0 No cable connected. Wait
- // 0 1 No cable connected. Wait
- // 1 0 Cable connected, but not clear to send. Wait
- // 1 1 Cable connected, and clear to send. Transmit
- //
- return (BOOLEAN) ((SerialPortReadRegister (SerialRegisterBase, R_UART_MSR) & (B_UART_MSR_DSR | B_UART_MSR_CTS)) == (B_UART_MSR_DSR | B_UART_MSR_CTS));
- } else {
- //
- // Wait for both DSR and CTS to be set OR for DSR to be clear.
- // DSR is set if a cable is connected.
- // CTS is set if it is ok to transmit data
- //
- // DSR CTS Description Action
- // === === ======================================== ========
- // 0 0 No cable connected. Transmit
- // 0 1 No cable connected. Transmit
- // 1 0 Cable connected, but not clear to send. Wait
- // 1 1 Cable connected, and clar to send. Transmit
- //
- return (BOOLEAN) ((SerialPortReadRegister (SerialRegisterBase, R_UART_MSR) & (B_UART_MSR_DSR | B_UART_MSR_CTS)) != (B_UART_MSR_DSR));
- }
- }
-
- return TRUE;
-}
-
-/**
- Initialize the serial device hardware.
-
- If no initialization is required, then return RETURN_SUCCESS.
- If the serial device was successfully initialized, then return RETURN_SUCCESS.
- If the serial device could not be initialized, then return RETURN_DEVICE_ERROR.
-
- @retval RETURN_SUCCESS The serial device was initialized.
- @retval RETURN_DEVICE_ERROR The serial device could not be initialized.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortInitialize (
- VOID
- )
-{
- RETURN_STATUS Status;
- UINTN SerialRegisterBase;
- UINT32 Divisor;
- UINT32 CurrentDivisor;
- BOOLEAN Initialized;
-
- //
- // Perform platform specific initialization required to enable use of the 16550 device
- // at the location specified by PcdSerialUseMmio and PcdSerialRegisterBase.
- //
- Status = PlatformHookSerialPortInitialize ();
- if (RETURN_ERROR (Status)) {
- return Status;
- }
-
- //
- // Calculate divisor for baud generator
- // Ref_Clk_Rate / Baud_Rate / 16
- //
- Divisor = PcdGet32 (PcdSerialClockRate) / (PcdGet32 (PcdSerialBaudRate) * 16);
- if ((PcdGet32 (PcdSerialClockRate) % (PcdGet32 (PcdSerialBaudRate) * 16)) >= PcdGet32 (PcdSerialBaudRate) * 8) {
- Divisor++;
- }
-
- //
- // Get the base address of the serial port in either I/O or MMIO space
- //
- SerialRegisterBase = GetSerialRegisterBase ();
- if (SerialRegisterBase ==0) {
- return RETURN_DEVICE_ERROR;
- }
-
- //
- // See if the serial port is already initialized
- //
- Initialized = TRUE;
- if ((SerialPortReadRegister (SerialRegisterBase, R_UART_LCR) & 0x3F) != (PcdGet8 (PcdSerialLineControl) & 0x3F)) {
- Initialized = FALSE;
- }
- SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_LCR) | B_UART_LCR_DLAB));
- CurrentDivisor = SerialPortReadRegister (SerialRegisterBase, R_UART_BAUD_HIGH) << 8;
- CurrentDivisor |= (UINT32) SerialPortReadRegister (SerialRegisterBase, R_UART_BAUD_LOW);
- SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_LCR) & ~B_UART_LCR_DLAB));
- if (CurrentDivisor != Divisor) {
- Initialized = FALSE;
- }
- if (Initialized) {
- return RETURN_SUCCESS;
- }
-
- //
- // Wait for the serial port to be ready.
- // Verify that both the transmit FIFO and the shift register are empty.
- //
- while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) != (B_UART_LSR_TEMT | B_UART_LSR_TXRDY));
-
- //
- // Configure baud rate
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, B_UART_LCR_DLAB);
- SerialPortWriteRegister (SerialRegisterBase, R_UART_BAUD_HIGH, (UINT8) (Divisor >> 8));
- SerialPortWriteRegister (SerialRegisterBase, R_UART_BAUD_LOW, (UINT8) (Divisor & 0xff));
-
- //
- // Clear DLAB and configure Data Bits, Parity, and Stop Bits.
- // Strip reserved bits from PcdSerialLineControl
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, (UINT8)(PcdGet8 (PcdSerialLineControl) & 0x3F));
-
- //
- // Enable and reset FIFOs
- // Strip reserved bits from PcdSerialFifoControl
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_FCR, 0x00);
- SerialPortWriteRegister (SerialRegisterBase, R_UART_FCR, (UINT8)(PcdGet8 (PcdSerialFifoControl) & (B_UART_FCR_FIFOE | B_UART_FCR_FIFO64)));
-
- //
- // Put Modem Control Register(MCR) into its reset state of 0x00.
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, 0x00);
-
- return RETURN_SUCCESS;
-}
-
-/**
- Write data from buffer to serial device.
-
- Writes NumberOfBytes data bytes from Buffer to the serial device.
- The number of bytes actually written to the serial device is returned.
- If the return value is less than NumberOfBytes, then the write operation failed.
-
- If Buffer is NULL, then ASSERT().
-
- If NumberOfBytes is zero, then return 0.
-
- @param Buffer Pointer to the data buffer to be written.
- @param NumberOfBytes Number of bytes to written to the serial device.
-
- @retval 0 NumberOfBytes is 0.
- @retval >0 The number of bytes written to the serial device.
- If this value is less than NumberOfBytes, then the read operation failed.
-
-**/
-UINTN
-EFIAPI
-SerialPortWrite (
- IN UINT8 *Buffer,
- IN UINTN NumberOfBytes
- )
-{
- UINTN SerialRegisterBase;
- UINTN Result;
- UINTN Index;
- UINTN FifoSize;
-
- if (Buffer == NULL) {
- return 0;
- }
-
- SerialRegisterBase = GetSerialRegisterBase ();
- if (SerialRegisterBase ==0) {
- return 0;
- }
-
- if (NumberOfBytes == 0) {
- //
- // Flush the hardware
- //
-
- //
- // Wait for both the transmit FIFO and shift register empty.
- //
- while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) != (B_UART_LSR_TEMT | B_UART_LSR_TXRDY));
-
- //
- // Wait for the hardware flow control signal
- //
- while (!SerialPortWritable (SerialRegisterBase));
- return 0;
- }
-
- //
- // Compute the maximum size of the Tx FIFO
- //
- FifoSize = 1;
- if ((PcdGet8 (PcdSerialFifoControl) & B_UART_FCR_FIFOE) != 0) {
- if ((PcdGet8 (PcdSerialFifoControl) & B_UART_FCR_FIFO64) == 0) {
- FifoSize = 16;
- } else {
- FifoSize = PcdGet32 (PcdSerialExtendedTxFifoSize);
- }
- }
-
- Result = NumberOfBytes;
- while (NumberOfBytes != 0) {
- //
- // Wait for the serial port to be ready, to make sure both the transmit FIFO
- // and shift register empty.
- //
- while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & B_UART_LSR_TEMT) == 0);
-
- //
- // Fill then entire Tx FIFO
- //
- for (Index = 0; Index < FifoSize && NumberOfBytes != 0; Index++, NumberOfBytes--, Buffer++) {
- //
- // Wait for the hardware flow control signal
- //
- while (!SerialPortWritable (SerialRegisterBase));
-
- //
- // Write byte to the transmit buffer.
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_TXBUF, *Buffer);
- }
- }
- return Result;
-}
-
-/**
- Reads data from a serial device into a buffer.
-
- @param Buffer Pointer to the data buffer to store the data read from the serial device.
- @param NumberOfBytes Number of bytes to read from the serial device.
-
- @retval 0 NumberOfBytes is 0.
- @retval >0 The number of bytes read from the serial device.
- If this value is less than NumberOfBytes, then the read operation failed.
-
-**/
-UINTN
-EFIAPI
-SerialPortRead (
- OUT UINT8 *Buffer,
- IN UINTN NumberOfBytes
- )
-{
- UINTN SerialRegisterBase;
- UINTN Result;
- UINT8 Mcr;
-
- if (NULL == Buffer) {
- return 0;
- }
-
- SerialRegisterBase = GetSerialRegisterBase ();
- if (SerialRegisterBase ==0) {
- return 0;
- }
-
- Mcr = (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_MCR) & ~B_UART_MCR_RTS);
-
- for (Result = 0; NumberOfBytes-- != 0; Result++, Buffer++) {
- //
- // Wait for the serial port to have some data.
- //
- while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & B_UART_LSR_RXRDY) == 0) {
- if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {
- //
- // Set RTS to let the peer send some data
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, (UINT8)(Mcr | B_UART_MCR_RTS));
- }
- }
- if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {
- //
- // Clear RTS to prevent peer from sending data
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, Mcr);
- }
-
- //
- // Read byte from the receive buffer.
- //
- *Buffer = SerialPortReadRegister (SerialRegisterBase, R_UART_RXBUF);
- }
-
- return Result;
-}
-
-
-/**
- Polls a serial device to see if there is any data waiting to be read.
-
- Polls aserial device to see if there is any data waiting to be read.
- If there is data waiting to be read from the serial device, then TRUE is returned.
- If there is no data waiting to be read from the serial device, then FALSE is returned.
-
- @retval TRUE Data is waiting to be read from the serial device.
- @retval FALSE There is no data waiting to be read from the serial device.
-
-**/
-BOOLEAN
-EFIAPI
-SerialPortPoll (
- VOID
- )
-{
- UINTN SerialRegisterBase;
-
- SerialRegisterBase = GetSerialRegisterBase ();
- if (SerialRegisterBase ==0) {
- return FALSE;
- }
-
- //
- // Read the serial port status
- //
- if ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & B_UART_LSR_RXRDY) != 0) {
- if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {
- //
- // Clear RTS to prevent peer from sending data
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_MCR) & ~B_UART_MCR_RTS));
- }
- return TRUE;
- }
-
- if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {
- //
- // Set RTS to let the peer send some data
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_MCR) | B_UART_MCR_RTS));
- }
-
- return FALSE;
-}
-
-/**
- Sets the control bits on a serial device.
-
- @param Control Sets the bits of Control that are settable.
-
- @retval RETURN_SUCCESS The new control bits were set on the serial device.
- @retval RETURN_UNSUPPORTED The serial device does not support this operation.
- @retval RETURN_DEVICE_ERROR The serial device is not functioning correctly.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortSetControl (
- IN UINT32 Control
- )
-{
- UINTN SerialRegisterBase;
- UINT8 Mcr;
-
- //
- // First determine the parameter is invalid.
- //
- if ((Control & (~(EFI_SERIAL_REQUEST_TO_SEND | EFI_SERIAL_DATA_TERMINAL_READY |
- EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE))) != 0) {
- return RETURN_UNSUPPORTED;
- }
-
- SerialRegisterBase = GetSerialRegisterBase ();
- if (SerialRegisterBase ==0) {
- return RETURN_UNSUPPORTED;
- }
-
- //
- // Read the Modem Control Register.
- //
- Mcr = SerialPortReadRegister (SerialRegisterBase, R_UART_MCR);
- Mcr &= (~(B_UART_MCR_DTRC | B_UART_MCR_RTS));
-
- if ((Control & EFI_SERIAL_DATA_TERMINAL_READY) == EFI_SERIAL_DATA_TERMINAL_READY) {
- Mcr |= B_UART_MCR_DTRC;
- }
-
- if ((Control & EFI_SERIAL_REQUEST_TO_SEND) == EFI_SERIAL_REQUEST_TO_SEND) {
- Mcr |= B_UART_MCR_RTS;
- }
-
- //
- // Write the Modem Control Register.
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, Mcr);
-
- return RETURN_SUCCESS;
-}
-
-/**
- Retrieve the status of the control bits on a serial device.
-
- @param Control A pointer to return the current control signals from the serial device.
-
- @retval RETURN_SUCCESS The control bits were read from the serial device.
- @retval RETURN_UNSUPPORTED The serial device does not support this operation.
- @retval RETURN_DEVICE_ERROR The serial device is not functioning correctly.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortGetControl (
- OUT UINT32 *Control
- )
-{
- UINTN SerialRegisterBase;
- UINT8 Msr;
- UINT8 Mcr;
- UINT8 Lsr;
-
- SerialRegisterBase = GetSerialRegisterBase ();
- if (SerialRegisterBase ==0) {
- return RETURN_UNSUPPORTED;
- }
-
- *Control = 0;
-
- //
- // Read the Modem Status Register.
- //
- Msr = SerialPortReadRegister (SerialRegisterBase, R_UART_MSR);
-
- if ((Msr & B_UART_MSR_CTS) == B_UART_MSR_CTS) {
- *Control |= EFI_SERIAL_CLEAR_TO_SEND;
- }
-
- if ((Msr & B_UART_MSR_DSR) == B_UART_MSR_DSR) {
- *Control |= EFI_SERIAL_DATA_SET_READY;
- }
-
- if ((Msr & B_UART_MSR_RI) == B_UART_MSR_RI) {
- *Control |= EFI_SERIAL_RING_INDICATE;
- }
-
- if ((Msr & B_UART_MSR_DCD) == B_UART_MSR_DCD) {
- *Control |= EFI_SERIAL_CARRIER_DETECT;
- }
-
- //
- // Read the Modem Control Register.
- //
- Mcr = SerialPortReadRegister (SerialRegisterBase, R_UART_MCR);
-
- if ((Mcr & B_UART_MCR_DTRC) == B_UART_MCR_DTRC) {
- *Control |= EFI_SERIAL_DATA_TERMINAL_READY;
- }
-
- if ((Mcr & B_UART_MCR_RTS) == B_UART_MCR_RTS) {
- *Control |= EFI_SERIAL_REQUEST_TO_SEND;
- }
-
- if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {
- *Control |= EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE;
- }
-
- //
- // Read the Line Status Register.
- //
- Lsr = SerialPortReadRegister (SerialRegisterBase, R_UART_LSR);
-
- if ((Lsr & (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) == (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) {
- *Control |= EFI_SERIAL_OUTPUT_BUFFER_EMPTY;
- }
-
- if ((Lsr & B_UART_LSR_RXRDY) == 0) {
- *Control |= EFI_SERIAL_INPUT_BUFFER_EMPTY;
- }
-
- return RETURN_SUCCESS;
-}
-
-/**
- Sets the baud rate, receive FIFO depth, transmit/receice time out, parity,
- data bits, and stop bits on a serial device.
-
- @param BaudRate The requested baud rate. A BaudRate value of 0 will use the
- device's default interface speed.
- On output, the value actually set.
- @param ReveiveFifoDepth The requested depth of the FIFO on the receive side of the
- serial interface. A ReceiveFifoDepth value of 0 will use
- the device's default FIFO depth.
- On output, the value actually set.
- @param Timeout The requested time out for a single character in microseconds.
- This timeout applies to both the transmit and receive side of the
- interface. A Timeout value of 0 will use the device's default time
- out value.
- On output, the value actually set.
- @param Parity The type of parity to use on this serial device. A Parity value of
- DefaultParity will use the device's default parity value.
- On output, the value actually set.
- @param DataBits The number of data bits to use on the serial device. A DataBits
- vaule of 0 will use the device's default data bit setting.
- On output, the value actually set.
- @param StopBits The number of stop bits to use on this serial device. A StopBits
- value of DefaultStopBits will use the device's default number of
- stop bits.
- On output, the value actually set.
-
- @retval RETURN_SUCCESS The new attributes were set on the serial device.
- @retval RETURN_UNSUPPORTED The serial device does not support this operation.
- @retval RETURN_INVALID_PARAMETER One or more of the attributes has an unsupported value.
- @retval RETURN_DEVICE_ERROR The serial device is not functioning correctly.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortSetAttributes (
- IN OUT UINT64 *BaudRate,
- IN OUT UINT32 *ReceiveFifoDepth,
- IN OUT UINT32 *Timeout,
- IN OUT EFI_PARITY_TYPE *Parity,
- IN OUT UINT8 *DataBits,
- IN OUT EFI_STOP_BITS_TYPE *StopBits
- )
-{
- UINTN SerialRegisterBase;
- UINT32 SerialBaudRate;
- UINTN Divisor;
- UINT8 Lcr;
- UINT8 LcrData;
- UINT8 LcrParity;
- UINT8 LcrStop;
-
- SerialRegisterBase = GetSerialRegisterBase ();
- if (SerialRegisterBase ==0) {
- return RETURN_UNSUPPORTED;
- }
-
- //
- // Check for default settings and fill in actual values.
- //
- if (*BaudRate == 0) {
- *BaudRate = PcdGet32 (PcdSerialBaudRate);
- }
- SerialBaudRate = (UINT32) *BaudRate;
-
- if (*DataBits == 0) {
- LcrData = (UINT8) (PcdGet8 (PcdSerialLineControl) & 0x3);
- *DataBits = LcrData + 5;
- } else {
- if ((*DataBits < 5) || (*DataBits > 8)) {
- return RETURN_INVALID_PARAMETER;
- }
- //
- // Map 5..8 to 0..3
- //
- LcrData = (UINT8) (*DataBits - (UINT8) 5);
- }
-
- if (*Parity == DefaultParity) {
- LcrParity = (UINT8) ((PcdGet8 (PcdSerialLineControl) >> 3) & 0x7);
- switch (LcrParity) {
- case 0:
- *Parity = NoParity;
- break;
-
- case 3:
- *Parity = EvenParity;
- break;
-
- case 1:
- *Parity = OddParity;
- break;
-
- case 7:
- *Parity = SpaceParity;
- break;
-
- case 5:
- *Parity = MarkParity;
- break;
-
- default:
- break;
- }
- } else {
- switch (*Parity) {
- case NoParity:
- LcrParity = 0;
- break;
-
- case EvenParity:
- LcrParity = 3;
- break;
-
- case OddParity:
- LcrParity = 1;
- break;
-
- case SpaceParity:
- LcrParity = 7;
- break;
-
- case MarkParity:
- LcrParity = 5;
- break;
-
- default:
- return RETURN_INVALID_PARAMETER;
- }
- }
-
- if (*StopBits == DefaultStopBits) {
- LcrStop = (UINT8) ((PcdGet8 (PcdSerialLineControl) >> 2) & 0x1);
- switch (LcrStop) {
- case 0:
- *StopBits = OneStopBit;
- break;
-
- case 1:
- if (*DataBits == 5) {
- *StopBits = OneFiveStopBits;
- } else {
- *StopBits = TwoStopBits;
- }
- break;
-
- default:
- break;
- }
- } else {
- switch (*StopBits) {
- case OneStopBit:
- LcrStop = 0;
- break;
-
- case OneFiveStopBits:
- case TwoStopBits:
- LcrStop = 1;
- break;
-
- default:
- return RETURN_INVALID_PARAMETER;
- }
- }
-
- //
- // Calculate divisor for baud generator
- // Ref_Clk_Rate / Baud_Rate / 16
- //
- Divisor = PcdGet32 (PcdSerialClockRate) / (SerialBaudRate * 16);
- if ((PcdGet32 (PcdSerialClockRate) % (SerialBaudRate * 16)) >= SerialBaudRate * 8) {
- Divisor++;
- }
-
- //
- // Configure baud rate
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, B_UART_LCR_DLAB);
- SerialPortWriteRegister (SerialRegisterBase, R_UART_BAUD_HIGH, (UINT8) (Divisor >> 8));
- SerialPortWriteRegister (SerialRegisterBase, R_UART_BAUD_LOW, (UINT8) (Divisor & 0xff));
-
- //
- // Clear DLAB and configure Data Bits, Parity, and Stop Bits.
- // Strip reserved bits from line control value
- //
- Lcr = (UINT8) ((LcrParity << 3) | (LcrStop << 2) | LcrData);
- SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, (UINT8) (Lcr & 0x3F));
-
- return RETURN_SUCCESS;
-}
-
diff --git a/BraswellPlatformPkg/Common/Override/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf b/BraswellPlatformPkg/Common/Override/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf deleted file mode 100644 index 42feb21059..0000000000 --- a/BraswellPlatformPkg/Common/Override/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf +++ /dev/null @@ -1,48 +0,0 @@ -## @file
-# SerialPortLib instance for 16550 UART.
-#
-# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010018
- BASE_NAME = BaseSerialPortLib16550
- FILE_GUID = 9E7C00CF-355A-4d4e-BF60-0428CFF95540
- MODULE_TYPE = BASE
- VERSION_STRING = 1.1
- LIBRARY_CLASS = SerialPortLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- BraswellPlatformPkg/BraswellPlatformPkg.dec
-
-[LibraryClasses]
- PcdLib
- IoLib
- PlatformHookLib
- PciLib
-
-[Sources]
- BaseSerialPortLib16550.c
-
-[Pcd]
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable ## SOMETIMES_CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride ## CONSUMES
|