diff options
| author | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-05-19 04:49:40 +0000 |
|---|---|---|
| committer | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-05-19 04:49:40 +0000 |
| commit | 364aa45efb0eeb5b36d849f6360bcfa3bfb0f917 (patch) | |
| tree | af7b103262aff891f76b62e9f468ae692943e677 /ArmEbPkg | |
| parent | 3b7e958efd1c94ff2a5f5a3dd7543b206b102690 (diff) | |
| download | edk2-platforms-364aa45efb0eeb5b36d849f6360bcfa3bfb0f917.tar.xz | |
Fix GCC build issue
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10517 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmEbPkg')
| -rw-r--r-- | ArmEbPkg/ArmEbPkg.dsc | 12 | ||||
| -rwxr-xr-x | ArmEbPkg/Sec/ModuleEntryPoint.asm | 3 |
2 files changed, 10 insertions, 5 deletions
diff --git a/ArmEbPkg/ArmEbPkg.dsc b/ArmEbPkg/ArmEbPkg.dsc index 911d7ae302..023269f022 100644 --- a/ArmEbPkg/ArmEbPkg.dsc +++ b/ArmEbPkg/ArmEbPkg.dsc @@ -189,14 +189,20 @@ [BuildOptions] + RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu Cortex-A8 --thumb + RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu Cortex-A8 + RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG + + GCC:*_*_ARM_ARCHCC_FLAGS == -march=armv7-a -mthumb
+ GCC:*_*_ARM_ARCHASM_FLAGS == -march=armv7-a
+ GCC:*_*_ARM_ARCHDLINK_FLAGS == -arch armv7-a + GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG +
XCODE:*_*_ARM_ARCHCC_FLAGS == -arch armv7 -march=armv7 XCODE:*_*_ARM_ARCHASM_FLAGS == -arch armv7 XCODE:*_*_ARM_ARCHDLINK_FLAGS == -arch armv7 XCODE:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG - RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu Cortex-A8 --thumb - RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu Cortex-A8 - RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG ################################################################################ # diff --git a/ArmEbPkg/Sec/ModuleEntryPoint.asm b/ArmEbPkg/Sec/ModuleEntryPoint.asm index d9d5bb64f2..e77b5057a8 100755 --- a/ArmEbPkg/Sec/ModuleEntryPoint.asm +++ b/ArmEbPkg/Sec/ModuleEntryPoint.asm @@ -37,8 +37,7 @@ _ModuleEntryPoint orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
mcr p15, 0, r0, c1, c0, 2
mov r0, #0x40000000 // Set EN bit in FPEXC
- msr FPEXC,r0
-
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
// Set CPU vectors to start of DRAM
LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
|