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| author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-09-27 16:26:03 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-09-27 16:26:03 +0000 |
| commit | 3127615b4d6ce75b5c22780847a83124c5f2e552 (patch) | |
| tree | f9752e3610116f8b5380f48540823826fed8c83c /ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S | |
| parent | aa84fef5fe4579ef21b223cf68428bf55b0f4f43 (diff) | |
| download | edk2-platforms-3127615b4d6ce75b5c22780847a83124c5f2e552.tar.xz | |
ArmPkg: Introduce ArmCpuLib to abstract ARM Cpu specific initialization (2)
Missed new files.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12450 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S')
| -rw-r--r-- | ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S new file mode 100644 index 0000000000..0d6a62b740 --- /dev/null +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S @@ -0,0 +1,52 @@ +//
+// Copyright (c) 2011, ARM Limited. All rights reserved.
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//
+
+#include <Library/ArmCpuLib.h>
+#include <Chipset/ArmCortexA9.h>
+
+.text
+.align 3
+
+GCC_ASM_EXPORT(ArmCpuSynchronizeWait)
+GCC_ASM_EXPORT(ArmGetScuBaseAddress)
+GCC_ASM_IMPORT(CArmCpuSynchronizeWait)
+
+// VOID
+// ArmCpuSynchronizeWait (
+// IN ARM_CPU_SYNCHRONIZE_EVENT Event
+// );
+ASM_PFX(ArmCpuSynchronizeWait):
+ cmp r0, #ARM_CPU_EVENT_BOOT_MEM_INIT
+ // The SCU enabled is the event to tell us the Init Boot Memory is initialized
+ beq ArmWaitScuEnabled
+ b CArmCpuSynchronizeWait
+
+// IN None
+// OUT r0 = SCU Base Address
+ASM_PFX(ArmGetScuBaseAddress):
+ // Read Configuration Base Address Register. ArmCBar cannot be called to get
+ // the Configuration BAR as a stack is not necessary setup. The SCU is at the
+ // offset 0x0000 from the Private Memory Region.
+ mrc p15, 4, r0, c15, c0, 0
+ bx lr
+
+ASM_PFX(ArmWaitScuEnabled):
+ // Read Configuration Base Address Register. ArmCBar cannot be called to get
+ // the Configuration BAR as a stack is not necessary setup. The SCU is at the
+ // offset 0x0000 from the Private Memory Region.
+ mrc p15, 4, r0, c15, c0, 0
+ add r0, r0, #A9_SCU_CONTROL_OFFSET
+ ldr r0, [r0]
+ cmp r0, #1
+ bne ArmWaitScuEnabled
+ bx lr
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