diff options
author | Guo Mang <mang.guo@intel.com> | 2017-08-02 09:54:47 +0800 |
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committer | Guo Mang <mang.guo@intel.com> | 2017-09-05 19:45:08 +0800 |
commit | 6c128c65b5ec0e5b8b5a0ccb165f3afd29e485f8 (patch) | |
tree | 444372d92a0ae8991fe4d15eb3937df43690dfda /ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S | |
parent | b207c6434d7a5a4502975d322312e07017e8a8cb (diff) | |
download | edk2-platforms-6c128c65b5ec0e5b8b5a0ccb165f3afd29e485f8.tar.xz |
Remove core packages since we can get them from edk2 repository
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S')
-rw-r--r-- | ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S deleted file mode 100644 index 5db5861922..0000000000 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S +++ /dev/null @@ -1,30 +0,0 @@ -//
-// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLib.h>
-#include <Library/ArmCpuLib.h>
-#include <Chipset/ArmCortexA9.h>
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(ArmGetScuBaseAddress)
-
-// IN None
-// OUT r0 = SCU Base Address
-ASM_PFX(ArmGetScuBaseAddress):
- // Read Configuration Base Address Register. ArmCBar cannot be called to get
- // the Configuration BAR as a stack is not necessary setup. The SCU is at the
- // offset 0x0000 from the Private Memory Region.
- mrc p15, 4, r0, c15, c0, 0
- bx lr
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