diff options
| author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-05-02 19:55:32 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-05-02 19:55:32 +0000 |
| commit | b1d41be7c9c0dc18cf9b73785eee6a20f13db126 (patch) | |
| tree | 6cf436c0af3f6196985ef9680972a681337de484 /ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S | |
| parent | f463bb00ad63cdfbec22519c9ae878f43760e97d (diff) | |
| download | edk2-platforms-b1d41be7c9c0dc18cf9b73785eee6a20f13db126.tar.xz | |
ArmPkg/ArmCpuLib: Replaced complex functions ArmCpuSynchronizeWait & ArmCpuSynchronizeSignal by sev & wfe
Previsouly the synchronization of MpCore was using the SGI (Software
Generated Interrupt) to synchronize MpCore during the early boot.
This commit replaced this mechanism by the more appropriate SEV/WFE
instructions (Send/Wait Event instructions).
That also eases the port to a new cpu/platform.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13249 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S')
| -rw-r--r-- | ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S | 30 |
1 files changed, 1 insertions, 29 deletions
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S index c69c8d44c5..5db5861922 100644 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S @@ -1,5 +1,5 @@ //
-// Copyright (c) 2011, ARM Limited. All rights reserved.
+// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -18,24 +18,7 @@ .text
.align 3
-GCC_ASM_EXPORT(ArmCpuSynchronizeWait)
GCC_ASM_EXPORT(ArmGetScuBaseAddress)
-GCC_ASM_IMPORT(CArmCpuSynchronizeWait)
-
-// VOID
-// ArmCpuSynchronizeWait (
-// IN ARM_CPU_SYNCHRONIZE_EVENT Event
-// );
-ASM_PFX(ArmCpuSynchronizeWait):
- cmp r0, #ARM_CPU_EVENT_BOOT_MEM_INIT
- // The SCU enabled is the event to tell us the Init Boot Memory is initialized
- beq ASM_PFX(ArmWaitScuEnabled)
- // Case when the stack has been set up
- push {r1,lr}
- LoadConstantToReg (ASM_PFX(CArmCpuSynchronizeWait), r1)
- blx r1
- pop {r1,lr}
- bx lr
// IN None
// OUT r0 = SCU Base Address
@@ -45,14 +28,3 @@ ASM_PFX(ArmGetScuBaseAddress): // offset 0x0000 from the Private Memory Region.
mrc p15, 4, r0, c15, c0, 0
bx lr
-
-ASM_PFX(ArmWaitScuEnabled):
- // Read Configuration Base Address Register. ArmCBar cannot be called to get
- // the Configuration BAR as a stack is not necessary setup. The SCU is at the
- // offset 0x0000 from the Private Memory Region.
- mrc p15, 4, r0, c15, c0, 0
- add r0, r0, #A9_SCU_CONTROL_OFFSET
- ldr r0, [r0]
- cmp r0, #1
- bne ASM_PFX(ArmWaitScuEnabled)
- bx lr
|