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authorOlivier Martin <olivier.martin@arm.com>2014-07-04 14:41:30 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2014-07-04 14:41:30 +0000
commit1b0ac0dedf19041512de152f047cc5a943598521 (patch)
tree6047781ccdb5a7eaacab3907d4971a8b440b50f4 /ArmPkg/Drivers/ArmGic/ArmGicLib.c
parentf5241b5725aab99189c733df6b03687656f8b1e8 (diff)
downloadedk2-platforms-1b0ac0dedf19041512de152f047cc5a943598521.tar.xz
ArmPkg/ArmGic: Returned the InterruptId in ArmGicAcknowledgeInterrupt()
The InterruptId has a different width for GicV2 and GicV3 (respectively 10bit and 24bit). The function prototype has been changed to return this value to make the caller GIC architecture version independent. Otherwise, we would have need to expose a different mask to allow the caller to retrieve this value from the read register. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15628 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Drivers/ArmGic/ArmGicLib.c')
-rw-r--r--ArmPkg/Drivers/ArmGic/ArmGicLib.c31
1 files changed, 29 insertions, 2 deletions
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmGicLib.c
index 666008638c..41e970bc49 100644
--- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c
+++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c
@@ -14,6 +14,7 @@
#include <Base.h>
#include <Library/ArmGicLib.h>
+#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include "GicV2/ArmGicV2Lib.h"
@@ -49,13 +50,39 @@ ArmGicSendSgiTo (
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId);
}
+/*
+ * Acknowledge and return the value of the Interrupt Acknowledge Register
+ *
+ * InterruptId is returned separately from the register value because in
+ * the GICv2 the register value contains the CpuId and InterruptId while
+ * in the GICv3 the register value is only the InterruptId.
+ *
+ * @param GicInterruptInterfaceBase Base Address of the GIC CPU Interface
+ * @param InterruptId InterruptId read from the Interrupt Acknowledge Register
+ *
+ * @retval value returned by the Interrupt Acknowledge Register
+ *
+ */
UINTN
EFIAPI
ArmGicAcknowledgeInterrupt (
- IN UINTN GicInterruptInterfaceBase
+ IN UINTN GicInterruptInterfaceBase,
+ OUT UINTN *InterruptId
)
{
- return ArmGicV2AcknowledgeInterrupt (GicInterruptInterfaceBase);
+ UINTN Value;
+
+ Value = ArmGicV2AcknowledgeInterrupt (GicInterruptInterfaceBase);
+
+ // InterruptId is required for the caller to know if a valid or spurious
+ // interrupt has been read
+ ASSERT (InterruptId != NULL);
+
+ if (InterruptId != NULL) {
+ *InterruptId = Value & ARM_GIC_ICCIAR_ACKINTID;
+ }
+
+ return Value;
}
VOID