diff options
author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-02-14 15:54:05 +0000 |
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committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-02-14 15:54:05 +0000 |
commit | 9207c5d75871fed9f98ee6548e9d420e4d11f340 (patch) | |
tree | 9aed63dded8225111836499ff537b657d098994c /ArmPkg/Drivers/CpuDxe/Mmu.c | |
parent | cbafa15e29200af525acbdb5929c8d55b774a8a3 (diff) | |
download | edk2-platforms-9207c5d75871fed9f98ee6548e9d420e4d11f340.tar.xz |
ArmPkg: Changed ARM CPU SetMemoryAttributes to always use strongly ordered for the EFI_MEMORY_UC attribute
Changed ARM CPU SetMemoryAttributes to always use strongly ordered for the EFI_MEMORY_UC attribute.
Signed-off-by:
Reviewed-by: eugenecohen
Reviewed-by: yanivtal
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13011 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Drivers/CpuDxe/Mmu.c')
-rw-r--r-- | ArmPkg/Drivers/CpuDxe/Mmu.c | 18 |
1 files changed, 4 insertions, 14 deletions
diff --git a/ArmPkg/Drivers/CpuDxe/Mmu.c b/ArmPkg/Drivers/CpuDxe/Mmu.c index 6218b5d27f..f54350b5a2 100644 --- a/ArmPkg/Drivers/CpuDxe/Mmu.c +++ b/ArmPkg/Drivers/CpuDxe/Mmu.c @@ -498,13 +498,8 @@ UpdatePageEntries ( case EFI_MEMORY_UC:
// modify cacheability attributes
EntryMask |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK;
- if (FeaturePcdGet(PcdEfiUncachedMemoryToStronglyOrdered)) {
- // map to strongly ordered
- EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0
- } else {
- // map to normal non-cachable
- EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
- }
+ // map to strongly ordered
+ EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0
break;
case EFI_MEMORY_WC:
@@ -646,13 +641,8 @@ UpdateSectionEntries ( case EFI_MEMORY_UC:
// modify cacheability attributes
EntryMask |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK;
- if (FeaturePcdGet(PcdEfiUncachedMemoryToStronglyOrdered)) {
- // map to strongly ordered
- EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0
- } else {
- // map to normal non-cachable
- EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
- }
+ // map to strongly ordered
+ EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0
break;
case EFI_MEMORY_WC:
|