diff options
| author | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-02-02 23:19:30 +0000 |
|---|---|---|
| committer | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-02-02 23:19:30 +0000 |
| commit | 2ac288f9199196dfc4ab05bee0a7815ca361174a (patch) | |
| tree | 66ba7102ed0f7e8b6deab5416f868aa43c82ad50 /ArmPkg/Drivers/PL390Gic/PL390GicNonSec.c | |
| parent | 5d23922674950ec2d2654b4c606692696681b544 (diff) | |
| download | edk2-platforms-2ac288f9199196dfc4ab05bee0a7815ca361174a.tar.xz | |
Fix issue with fixing tabs.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11297 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Drivers/PL390Gic/PL390GicNonSec.c')
| -rw-r--r-- | ArmPkg/Drivers/PL390Gic/PL390GicNonSec.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/ArmPkg/Drivers/PL390Gic/PL390GicNonSec.c b/ArmPkg/Drivers/PL390Gic/PL390GicNonSec.c index 9a9006f0a3..526af02d3e 100644 --- a/ArmPkg/Drivers/PL390Gic/PL390GicNonSec.c +++ b/ArmPkg/Drivers/PL390Gic/PL390GicNonSec.c @@ -21,11 +21,11 @@ EFIAPI PL390GicEnableInterruptInterface (
IN INTN GicInterruptInterfaceBase
)
-{\s\s
-\s\s/*
-\s\s * Enable the CPU interface in Non-Secure world
-\s\s * Note: The ICCICR register is banked when Security extensions are implemented\s\s
-\s\s */
+{
+ /*
+ * Enable the CPU interface in Non-Secure world
+ * Note: The ICCICR register is banked when Security extensions are implemented
+ */
MmioWrite32(GicInterruptInterfaceBase + GIC_ICCICR,0x00000001);
}
@@ -50,7 +50,7 @@ PL390GicSendSgiTo ( IN INTN CPUTargetList
)
{
-\s\sMmioWrite32(GicDistributorBase + GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16));
+ MmioWrite32(GicDistributorBase + GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16));
}
UINT32
@@ -65,9 +65,9 @@ PL390GicAcknowledgeSgiFrom ( InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);
//Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID
-\s\sif (((CoreId & 0x7) << 10) == (InterruptId & 0x1C00)) {
-\s\s //Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
-\s\s\s\sMmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);
+ if (((CoreId & 0x7) << 10) == (InterruptId & 0x1C00)) {
+ //Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
+ MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);
return 1;
} else {
return 0;
@@ -87,9 +87,9 @@ PL390GicAcknowledgeSgi2From ( InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);
//Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID
-\s\sif((((CoreId & 0x7) << 10) | (SgiId & 0x3FF)) == (InterruptId & 0x1FFF)) {
-\s\s //Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
-\s\s\s\sMmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);
+ if((((CoreId & 0x7) << 10) | (SgiId & 0x3FF)) == (InterruptId & 0x1FFF)) {
+ //Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
+ MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);
return 1;
} else {
return 0;
|