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authoroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2013-05-10 12:41:27 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2013-05-10 12:41:27 +0000
commitbebda7ceec3d3024c76b3c2ed0c9b4e502a13d61 (patch)
tree9c2d34dc7e57c2c52224c2990946778d955359fe /ArmPkg/Drivers/PL390Gic/PL390GicSec.c
parentbc7b889a033a2617b650fbb5596d4f02530090bd (diff)
downloadedk2-platforms-bebda7ceec3d3024c76b3c2ed0c9b4e502a13d61.tar.xz
ArmPlatformPkg/ArmPlatformLib: Added support for ArmPlatformIsPrimaryCore()
Checking if a core if the primary/boot core used to be done with the macro IS_PRIMARY_CORE(). Some platforms exposes configuration registers to change the primary core. Replacing the macro IS_PRIMARY_CORE() by ArmPlatformIsPrimaryCore() allows some flexibility in the way to check the primary core. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Acked-by: Ryan Harkin <ryan.harkin@linaro.org> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14344 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Drivers/PL390Gic/PL390GicSec.c')
-rw-r--r--ArmPkg/Drivers/PL390Gic/PL390GicSec.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
index 6244575772..bae76e441b 100644
--- a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
+++ b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@@ -14,6 +14,7 @@
#include <Base.h>
#include <Library/ArmLib.h>
+#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/ArmGicLib.h>
@@ -51,7 +52,7 @@ ArmGicSetupNonSecure (
}
// Only the primary core should set the Non Secure bit to the SPIs (Shared Peripheral Interrupt).
- if (IS_PRIMARY_CORE(MpId)) {
+ if (ArmPlatformIsPrimaryCore (MpId)) {
// Ensure all GIC interrupts are Non-Secure
for (Index = 0; Index < (ArmGicGetMaxNumInterrupts (GicDistributorBase) / 32); Index++) {
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), 0xffffffff);