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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2016-05-11 10:38:47 +0200
committerArd Biesheuvel <ard.biesheuvel@linaro.org>2016-05-12 13:53:08 +0200
commitcf580da1bc4c16026cb1732f741a892b2d3d3d67 (patch)
treed4b3b771dbfb0914e8af897c27b3c8668084e185 /ArmPkg/Include/Library
parent14b2ebc30c8bc98f668fa78171b659e2cdc33aa5 (diff)
downloadedk2-platforms-cf580da1bc4c16026cb1732f741a892b2d3d3d67.tar.xz
ArmPkg/ArmLib: don't invalidate entire I-cache on range operation
Instead of cleaning the data cache to the PoU by virtual address and subsequently invalidating the entire I-cache, invalidate only the range that we just cleaned. This way, we don't invalidate other cachelines unnecessarily. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'ArmPkg/Include/Library')
-rw-r--r--ArmPkg/Include/Library/ArmLib.h10
1 files changed, 8 insertions, 2 deletions
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index 1689f0072d..4608b0cccc 100644
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -183,13 +183,19 @@ ArmInvalidateDataCacheEntryByMVA (
VOID
EFIAPI
-ArmCleanDataCacheEntryToPoUByMVA(
+ArmCleanDataCacheEntryToPoUByMVA (
IN UINTN Address
);
VOID
EFIAPI
-ArmCleanDataCacheEntryByMVA(
+ArmInvalidateInstructionCacheEntryToPoUByMVA (
+ IN UINTN Address
+ );
+
+VOID
+EFIAPI
+ArmCleanDataCacheEntryByMVA (
IN UINTN Address
);