Sync up ArmPkg with patch from mailing list. Changed name of BdsLib.h to BdsUnixLib.h and fixed a lot of issues with Xcode building.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11293 6f19259b-4bc3-4df7-8a09-765794883524

5 files changed, 211 insertions, 3 deletions

diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index a7920a0204..de3cddf66c 100644
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -43,7 +43,11 @@ typedef enum {
   ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED,
   ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
   ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH,
-  ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
+  ARM_MEMORY_REGION_ATTRIBUTE_DEVICE,
+  ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED,
+  ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK,
+  ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_THROUGH,
+  ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE
 } ARM_MEMORY_REGION_ATTRIBUTES;
 
 typedef struct {
@@ -145,6 +149,12 @@ Cp15CacheInfo (
   VOID
   );
 
+BOOLEAN
+EFIAPI
+ArmIsMPCore (
+  VOID
+  );
+
 VOID
 EFIAPI
 ArmInvalidateDataCache (
@@ -226,6 +236,12 @@ ArmDisableMmu (
 
 VOID
 EFIAPI
+ArmDisableCachesAndMmu (
+  VOID
+  );
+
+VOID
+EFIAPI
 ArmEnableInterrupts (
   VOID
   );
@@ -241,6 +257,7 @@ EFIAPI
 ArmGetInterruptState (
   VOID
   );
+
 VOID
 EFIAPI
 ArmEnableFiq (
@@ -280,13 +297,13 @@ ArmSetDomainAccessControl (
 
 VOID
 EFIAPI
-ArmSetTranslationTableBaseAddress (
+ArmSetTTBR0 (
   IN  VOID  *TranslationTableBase
   );
 
 VOID *
 EFIAPI
-ArmGetTranslationTableBaseAddress (
+ArmGetTTBR0BaseAddress (
   VOID
   );
 
diff --git a/ArmPkg/Include/Library/ArmMPCoreMailBoxLib.h b/ArmPkg/Include/Library/ArmMPCoreMailBoxLib.h
new file mode 100644
index 0000000000..1588c31782
--- /dev/null
+++ b/ArmPkg/Include/Library/ArmMPCoreMailBoxLib.h
@@ -0,0 +1,22 @@
+/** @file

+*

+*  Copyright (c) 2011, ARM Limited. All rights reserved.

+*  

+*  This program and the accompanying materials                          

+*  are licensed and made available under the terms and conditions of the BSD License         

+*  which accompanies this distribution.  The full text of the license may be found at        

+*  http://opensource.org/licenses/bsd-license.php                                            

+*

+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     

+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             

+*

+**/

+

+#ifndef _ARM_MPCORE_MAILBOX_LIB_H_

+#define _ARM_MPCORE_MAILBOX_LIB_H_

+

+VOID ArmClearMPCoreMailbox(VOID);

+

+UINTN ArmGetMPCoreMailbox(VOID);

+

+#endif

diff --git a/ArmPkg/Include/Library/ArmTrustZoneLib.h b/ArmPkg/Include/Library/ArmTrustZoneLib.h
new file mode 100644
index 0000000000..8eeb6a2fee
--- /dev/null
+++ b/ArmPkg/Include/Library/ArmTrustZoneLib.h
@@ -0,0 +1,69 @@
+/** @file

+*

+*  Copyright (c) 2011, ARM Limited. All rights reserved.

+*  

+*  This program and the accompanying materials                          

+*  are licensed and made available under the terms and conditions of the BSD License         

+*  which accompanies this distribution.  The full text of the license may be found at        

+*  http://opensource.org/licenses/bsd-license.php                                            

+*

+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     

+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             

+*

+**/

+

+#ifndef __ARM_TRUSTZONE_LIB_H__

+#define __ARM_TRUSTZONE_LIB_H__

+

+#include <Uefi.h>

+

+// Setup TZ Protection Controller

+#define TZPC_DECPROT_0  0

+#define TZPC_DECPROT_1  1

+#define TZPC_DECPROT_2  2

+#define TZPC_DECPROT_MAX  2

+

+/**

+    FIXME: Need documentation

+**/

+EFI_STATUS TZPCSetDecProtBits(UINTN tzpc_base, UINTN tzpc_id, UINTN bits);

+

+/**

+    FIXME: Need documentation

+**/

+EFI_STATUS TZPCClearDecProtBits(UINTN tzpc_base, UINTN tzpc_id, UINTN bits);

+

+// Setup TZ Address Space Controller

+#define TZASC_REGION_ENABLED        1

+#define TZASC_REGION_DISABLED       0

+#define TZASC_REGION_SIZE_32KB      0xE

+#define TZASC_REGION_SIZE_64KB      0xF

+#define TZASC_REGION_SIZE_128KB     0x10

+#define TZASC_REGION_SIZE_256KB     0x11

+#define TZASC_REGION_SIZE_512KB     0x12

+#define TZASC_REGION_SIZE_1MB       0x13

+#define TZASC_REGION_SIZE_2MB       0x14

+#define TZASC_REGION_SIZE_4MB       0x15

+#define TZASC_REGION_SIZE_8MB       0x16

+#define TZASC_REGION_SIZE_16MB      0x17

+#define TZASC_REGION_SIZE_32MB      0x18

+#define TZASC_REGION_SIZE_64MB      0x19

+#define TZASC_REGION_SIZE_128MB     0x1A

+#define TZASC_REGION_SIZE_256MB     0x1B

+#define TZASC_REGION_SIZE_512MB     0x1C

+#define TZASC_REGION_SIZE_1GB       0x1D

+#define TZASC_REGION_SIZE_2GB       0x1E

+#define TZASC_REGION_SIZE_4GB       0x1F

+#define TZASC_REGION_SECURITY_SR    (1 << 3)

+#define TZASC_REGION_SECURITY_SW    (1 << 2)

+#define TZASC_REGION_SECURITY_SRW   (TZASC_REGION_SECURITY_SR|TZASC_REGION_SECURITY_SW)

+#define TZASC_REGION_SECURITY_NSR   (1 << 1)

+#define TZASC_REGION_SECURITY_NSW   1

+#define TZASC_REGION_SECURITY_NSRW  (TZASC_REGION_SECURITY_NSR|TZASC_REGION_SECURITY_NSW)

+

+/**

+    FIXME: Need documentation

+**/

+EFI_STATUS TZASCSetRegion(UINTN tzasc_base, UINTN region_id, UINTN enabled, UINTN low_address, UINTN high_address, UINTN size, UINTN security);

+

+#endif

diff --git a/ArmPkg/Include/Library/BdsUnixLib.h b/ArmPkg/Include/Library/BdsUnixLib.h
new file mode 100644
index 0000000000..969f951124
--- /dev/null
+++ b/ArmPkg/Include/Library/BdsUnixLib.h
@@ -0,0 +1,38 @@
+/** @file

+*

+*  Copyright (c) 2011, ARM Limited. All rights reserved.

+*  

+*  This program and the accompanying materials                          

+*  are licensed and made available under the terms and conditions of the BSD License         

+*  which accompanies this distribution.  The full text of the license may be found at        

+*  http://opensource.org/licenses/bsd-license.php                                            

+*

+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     

+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             

+*

+**/

+

+#ifndef __BDS_ENTRY_H__

+#define __BDS_ENTRY_H__

+

+EFI_STATUS

+BdsConnectAllDrivers ( VOID );

+

+EFI_STATUS

+BdsBootLinux (

+    IN  CONST CHAR16* LinuxKernel,

+    IN  CONST CHAR8*  ATag,

+    IN  CONST CHAR16* Fdt

+);

+

+EFI_STATUS

+BdsLoadApplication (

+    IN  CHAR16* EfiApp

+);

+

+EFI_STATUS

+BdsLoadApplicationFromPath (

+    IN  CHAR16* EfiAppPath

+);

+

+#endif

diff --git a/ArmPkg/Include/Library/L2X0CacheLib.h b/ArmPkg/Include/Library/L2X0CacheLib.h
new file mode 100644
index 0000000000..4f95b993d0
--- /dev/null
+++ b/ArmPkg/Include/Library/L2X0CacheLib.h
@@ -0,0 +1,62 @@
+/** @file

+*

+*  Copyright (c) 2011, ARM Limited. All rights reserved.

+*

+*  This program and the accompanying materials

+*  are licensed and made available under the terms and conditions of the BSD License

+*  which accompanies this distribution.  The full text of the license may be found at

+*  http://opensource.org/licenses/bsd-license.php

+*

+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+*

+**/

+

+#ifndef L2CACHELIB_H_

+#define L2CACHELIB_H_

+

+#define L2_LATENCY                          7

+

+#define L2_TAG_ACCESS_LATENCY               L2_LATENCY

+#define L2_TAG_SETUP_LATENCY                L2_LATENCY

+#define L2_DATA_ACCESS_LATENCY              L2_LATENCY

+#define L2_DATA_SETUP_LATENCY               L2_LATENCY

+

+

+#define L2X0_CACHEID            0x000

+#define L2X0_CTRL               0x100

+#define L2X0_AUXCTRL            0x104

+#define L230_TAG_LATENCY        0x108

+#define L230_DATA_LATENCY       0x10C

+#define L2X0_INTCLEAR           0x220

+#define L2X0_CACHE_SYNC			0x730

+#define L2X0_INVWAY             0x77C

+#define L2X0_CLEAN_WAY          0x7BC

+#define L2X0_PFCTRL             0xF60

+#define L2X0_PWRCTRL            0xF80

+

+#define L2X0_CACHEID_IMPLEMENTER_ARM        0x41

+#define L2X0_CACHEID_PARTNUM_PL310          0x03

+

+#define L2X0_CTRL_ENABLED                   0x1

+#define L2X0_CTRL_DISABLED                  0x0

+

+#define L2X0_AUXCTRL_EXCLUSIVE              (1<<12)

+#define L2X0_AUXCTRL_WAYSIZE_16KB           (0x001 << 17)

+#define L2X0_AUXCTRL_WAYSIZE_32KB           (0x010 << 17)

+#define L2X0_AUXCTRL_WAYSIZE_64KB           (0x011 << 17)

+#define L2X0_AUXCTRL_WAYSIZE_128KB          (0x100 << 17)

+#define L2X0_AUXCTRL_WAYSIZE_256KB          (0x101 << 17)

+#define L2X0_AUXCTRL_WAYSIZE_512KB          (0x110 << 17)

+#define L2X0_AUXCTRL_EM                     (1 << 20)

+#define L2x0_AUXCTRL_AW_AWCACHE             (0x00 << 23)

+#define L2x0_AUXCTRL_AW_NOALLOC             (0x01 << 23)

+#define L2x0_AUXCTRL_AW_OVERRIDE            (0x10 << 23)

+#define L2X0_AUXCTRL_SBO                    (1 << 25)

+#define L2X0_AUXCTRL_NSAC                   (1 << 27)

+#define L2x0_AUXCTRL_DPREFETCH              (1 << 28)

+#define L2x0_AUXCTRL_IPREFETCH              (1 << 29)

+

+VOID L2x0CacheInit(UINTN L2x0Base, BOOLEAN CacheEnabled);

+

+#endif /* L2CACHELIB_H_ */