diff options
| author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-06-11 11:26:42 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-06-11 11:26:42 +0000 |
| commit | f501f5d1b568c294b22ecf6455833fae806fd80d (patch) | |
| tree | a4ab9c79d6239185f5a4c4164f0fdb11b4928868 /ArmPkg/Include | |
| parent | d355ba4855592b7664d5ca36f6516d937e3aa4a4 (diff) | |
| download | edk2-platforms-f501f5d1b568c294b22ecf6455833fae806fd80d.tar.xz | |
ArmPkg/PL35xSmc: Split the SMC initialization in multiple Chip Select initialization functions
Some ArmVExpress-based tiles do not map all the ArmVExpress Chips into their memory map.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11797 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Include')
| -rw-r--r-- | ArmPkg/Include/Drivers/PL354Smc.h | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/ArmPkg/Include/Drivers/PL354Smc.h b/ArmPkg/Include/Drivers/PL354Smc.h new file mode 100644 index 0000000000..0da47f9982 --- /dev/null +++ b/ArmPkg/Include/Drivers/PL354Smc.h @@ -0,0 +1,57 @@ +/** @file
+*
+* Copyright (c) 2011, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef PL354SMC_H_
+#define PL354SMC_H_
+
+#define PL354_SMC_DIRECT_CMD_OFFSET 0x10
+#define PL354_SMC_SET_CYCLES_OFFSET 0x14
+#define PL354_SMC_SET_OPMODE_OFFSET 0x18
+
+#define PL354_SMC_DIRECT_CMD_ADDR(addr) ((addr) & 0xFFFFF)
+#define PL354_SMC_DIRECT_CMD_ADDR_SET_CRE (1 << 20)
+#define PL354_SMC_DIRECT_CMD_ADDR_CMD_MODE_UPDATE (3 << 21)
+#define PL354_SMC_DIRECT_CMD_ADDR_CMD_UPDATE (2 << 21)
+#define PL354_SMC_DIRECT_CMD_ADDR_CMD_MODE (1 << 21)
+#define PL354_SMC_DIRECT_CMD_ADDR_CMD_UPDATE_AXI (0 << 21)
+#define PL354_SMC_DIRECT_CMD_ADDR_CS(interf,chip) (((interf) << 25) | ((chip) << 23))
+
+#define PL354_SMC_SET_OPMODE_MEM_WIDTH_8 (0 << 0)
+#define PL354_SMC_SET_OPMODE_MEM_WIDTH_16 (1 << 0)
+#define PL354_SMC_SET_OPMODE_MEM_WIDTH_32 (2 << 0)
+#define PL354_SMC_SET_OPMODE_SET_RD_SYNC (1 << 2)
+#define PL354_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_1 (0 << 3)
+#define PL354_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_4 (1 << 3)
+#define PL354_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_8 (2 << 3)
+#define PL354_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_16 (3 << 3)
+#define PL354_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_32 (4 << 3)
+#define PL354_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT (5 << 3)
+#define PL354_SMC_SET_OPMODE_SET_WR_SYNC (1 << 6)
+#define PL354_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_1 (0 << 7)
+#define PL354_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_4 (1 << 7)
+#define PL354_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_8 (2 << 7)
+#define PL354_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_16 (3 << 7)
+#define PL354_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_32 (4 << 7)
+#define PL354_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT (5 << 7)
+#define PL354_SMC_SET_OPMODE_SET_BAA (1 << 10)
+#define PL354_SMC_SET_OPMODE_SET_ADV (1 << 11)
+#define PL354_SMC_SET_OPMODE_SET_BLS (1 << 12)
+#define PL354_SMC_SET_OPMODE_SET_BURST_ALIGN_ANY (0 << 13)
+#define PL354_SMC_SET_OPMODE_SET_BURST_ALIGN_32 (1 << 13)
+#define PL354_SMC_SET_OPMODE_SET_BURST_ALIGN_64 (2 << 13)
+#define PL354_SMC_SET_OPMODE_SET_BURST_ALIGN_128 (3 << 13)
+#define PL354_SMC_SET_OPMODE_SET_BURST_ALIGN_256 (4 << 13)
+
+
+#endif
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