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authorAJFISH <AJFISH@6f19259b-4bc3-4df7-8a09-765794883524>2010-01-12 18:47:28 +0000
committerAJFISH <AJFISH@6f19259b-4bc3-4df7-8a09-765794883524>2010-01-12 18:47:28 +0000
commitc2b5ca8b562776a04359e72f13a95aed001af738 (patch)
tree462b83c018a113ff4e3400ceacdfbe5c936d1d90 /ArmPkg/Library/ArmLib/Arm9
parent06dc4de11b391315b24ac0445991d0b11c861d42 (diff)
downloadedk2-platforms-c2b5ca8b562776a04359e72f13a95aed001af738.tar.xz
Need to add some extra functions to the libraries to support paging in the CpuDxe driver (still working on that). Also looks like some of the .INF file hade the token used to search replace the copyright headers and not the headers so I updated that.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9716 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Library/ArmLib/Arm9')
-rw-r--r--ArmPkg/Library/ArmLib/Arm9/Arm9ArmLib.inf16
-rwxr-xr-xArmPkg/Library/ArmLib/Arm9/Arm9ArmLibPrePi.inf16
-rw-r--r--ArmPkg/Library/ArmLib/Arm9/Arm9Support.S6
-rw-r--r--ArmPkg/Library/ArmLib/Arm9/Arm9Support.asm6
4 files changed, 42 insertions, 2 deletions
diff --git a/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLib.inf b/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLib.inf
index 9a940394e2..467e9ba621 100644
--- a/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLib.inf
+++ b/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLib.inf
@@ -1,4 +1,18 @@
-#%HEADER%
+#/** @file
+# Semihosting serail port lib
+#
+# Copyright (c) 2008 - 2010, Apple Inc.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = Arm9ArmLib
diff --git a/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLibPrePi.inf b/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLibPrePi.inf
index 909ce27616..900e20423d 100755
--- a/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLibPrePi.inf
+++ b/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLibPrePi.inf
@@ -1,4 +1,18 @@
-#%HEADER%
+#/** @file
+# Semihosting serail port lib
+#
+# Copyright (c) 2008 - 2010, Apple Inc.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = Arm9ArmLibPrePi
diff --git a/ArmPkg/Library/ArmLib/Arm9/Arm9Support.S b/ArmPkg/Library/ArmLib/Arm9/Arm9Support.S
index 5c9afe9347..d76afb90f5 100644
--- a/ArmPkg/Library/ArmLib/Arm9/Arm9Support.S
+++ b/ArmPkg/Library/ArmLib/Arm9/Arm9Support.S
@@ -23,6 +23,7 @@
.globl ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA)
.globl ASM_PFX(ArmEnableMmu)
.globl ASM_PFX(ArmDisableMmu)
+.globl ASM_PFX(ArmMmuEnabled)
.globl ASM_PFX(ArmEnableDataCache)
.globl ASM_PFX(ArmDisableDataCache)
.globl ASM_PFX(ArmEnableInstructionCache)
@@ -75,6 +76,11 @@ ASM_PFX(ArmEnableMmu):
mcr p15,0,R0,c1,c0,0
bx LR
+ASM_PFX(ArmMmuEnabled):
+ mrc p15,0,R0,c1,c0,0
+ and R0,R0,#1
+ bx LR
+
ASM_PFX(ArmDisableMmu):
mrc p15,0,R0,c1,c0,0
bic R0,R0,#1
diff --git a/ArmPkg/Library/ArmLib/Arm9/Arm9Support.asm b/ArmPkg/Library/ArmLib/Arm9/Arm9Support.asm
index 3204d6607f..82634c7929 100644
--- a/ArmPkg/Library/ArmLib/Arm9/Arm9Support.asm
+++ b/ArmPkg/Library/ArmLib/Arm9/Arm9Support.asm
@@ -21,6 +21,7 @@
EXPORT ArmCleanInvalidateDataCacheEntryByMVA
EXPORT ArmEnableMmu
EXPORT ArmDisableMmu
+ EXPORT ArmMmuEnabled
EXPORT ArmEnableDataCache
EXPORT ArmDisableDataCache
EXPORT ArmEnableInstructionCache
@@ -77,6 +78,11 @@ ArmEnableMmu
mcr p15,0,R0,c1,c0,0
bx LR
+ArmMmuEnabled
+ mrc p15,0,R0,c1,c0,0
+ and R0,R0,#1
+ bx LR
+
ArmDisableMmu
mrc p15,0,R0,c1,c0,0
bic R0,R0,#1