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| author | Olivier Martin <olivier.martin@arm.com> | 2014-04-24 10:37:48 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2014-04-24 10:37:48 +0000 |
| commit | 8bb7f03adeac67550af51472979f6f2a1162b217 (patch) | |
| tree | 93f2deb527e613792c37e2df9717583035ba208e /ArmPkg/Library/ArmLib | |
| parent | 50c455da008b74fea56489c5543fa585727b3211 (diff) | |
| download | edk2-platforms-8bb7f03adeac67550af51472979f6f2a1162b217.tar.xz | |
ArmPkg/ArmLib: Fixed AArch64 MMU code when a region overlaps 2 level-3 page tables
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15483 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Library/ArmLib')
| -rw-r--r-- | ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c index bababab880..fee4cfc4ab 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c @@ -397,8 +397,11 @@ GetBlockEntryListFromAddress ( BlockEntry = TranslationTable;
}
} else {
- // Case of Invalid Entry and we are at a page level above of the one targetted.
if (IndexLevel != PageLevel) {
+ //
+ // Case when we have an Invalid Entry and we are at a page level above of the one targetted.
+ //
+
// Create a new translation table
TranslationTable = (UINT64*)AllocatePages (EFI_SIZE_TO_PAGES((TT_ENTRY_COUNT * sizeof(UINT64)) + TT_ALIGNMENT_DESCRIPTION_TABLE));
if (TranslationTable == NULL) {
@@ -412,6 +415,11 @@ GetBlockEntryListFromAddress ( *BlockEntry = ((UINTN)TranslationTable & TT_ADDRESS_MASK_DESCRIPTION_TABLE) | TT_TYPE_TABLE_ENTRY;
// Update the last block entry with the newly created translation table
*LastBlockEntry = TT_LAST_BLOCK_ADDRESS(TranslationTable, TT_ENTRY_COUNT);
+ } else {
+ //
+ // Case when the new region is part of an existing page table
+ //
+ *LastBlockEntry = TT_LAST_BLOCK_ADDRESS(TranslationTable, TT_ENTRY_COUNT);
}
}
}
@@ -531,8 +539,7 @@ ArmConfigureMmu ( UINT64 TCR;
RETURN_STATUS Status;
- if(MemoryTable == NULL)
- {
+ if(MemoryTable == NULL) {
ASSERT (MemoryTable != NULL);
return RETURN_INVALID_PARAMETER;
}
|