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authorKurt Kennett <Kurt.Kennett@microsoft.com>2016-09-26 22:45:02 +0000
committerArd Biesheuvel <ard.biesheuvel@linaro.org>2016-09-26 15:50:28 -0700
commitf6be48e9907d8bb8f8534df50049ce428c38f719 (patch)
tree3a49643c540ace2287a3bef37b29a255ccb72485 /ArmPkg
parent7188b4557a607c667175e026b60c6648a438e829 (diff)
downloadedk2-platforms-f6be48e9907d8bb8f8534df50049ce428c38f719.tar.xz
ArmPkg/CpuDxe: Fix MMU initialization problem
During Mmu initialization in the CpuDxe, for a page table any bits set in the 'NextSectionAttributes' are garbage and were set from bits that are actually part of the pagetable address. We clear it out to zero so that the SyncCacheConfigPage will use the page attributes instead of trying to convert the (bogus) section attributes into page attributes. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Kurt Kennett <kurt.kennett@microsoft.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Diffstat (limited to 'ArmPkg')
-rw-r--r--ArmPkg/Drivers/CpuDxe/Arm/Mmu.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
index 63da8ba8cb..14fc22d7a5 100644
--- a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
@@ -297,6 +297,11 @@ SyncCacheConfig (
}
NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;
} else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(FirstLevelTable[i])) {
+ // In this case any bits set in the 'NextSectionAttributes' are garbage and were set from
+ // bits that are actually part of the pagetable address. We clear it out to zero so that
+ // the SyncCacheConfigPage will use the page attributes instead of trying to convert the
+ // section attributes into page attributes
+ NextSectionAttributes = 0;
Status = SyncCacheConfigPage (
i,FirstLevelTable[i],
NumberOfDescriptors, MemorySpaceMap,