ArmPkg/ArmLib: Fix AARCH64 page table entry filling overrun

Update the LastBlockEntry return value when allocating a new page table block
and the parent page table entry is not valid.  Discovered when producing page
table entries for a memory region that spans multiple page table entries of a
parent page table block.  Not very memory space efficient because the rest of
the code could calculate a required page level that is deeper than some blocks
of the memory region might require.  Case that found the problem:
MemoryRegion->VirtualBase = 0
MemoryRegion->Length = 0x7F000000
This fix will create an un-needed level of page table for address
range 0 -> 0x40000000

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Garrett Kirkendall <garrett.kirkendall@amd.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15177 6f19259b-4bc3-4df7-8a09-765794883524

1 files changed, 2 insertions, 0 deletions

diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c
index bca397dcff..42b4963913 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c
@@ -401,6 +401,8 @@ GetBlockEntryListFromAddress (
 

         // Fill the new BlockEntry with the TranslationTable

         *BlockEntry = ((UINTN)TranslationTable & TT_ADDRESS_MASK_DESCRIPTION_TABLE) | TT_TYPE_TABLE_ENTRY;

+        // Update the last block entry with the newly created translation table

+        *LastBlockEntry = TT_LAST_BLOCK_ADDRESS(TranslationTable, TT_ENTRY_COUNT);

       }

     }

   }